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| author | Sam Nelson | 2015-06-10 11:48:14 -0500 |
|---|---|---|
| committer | Sam Nelson | 2015-06-18 15:25:46 -0500 |
| commit | 3dc0a28d7dfcfbd9b7a619b614a1a0d750bcae48 (patch) | |
| tree | f37fd66852ce32495ee5fd7f51b472c3a3a4cb8b | |
| parent | 7228d1cee8ea6c42ddb801688173e600f64c440e (diff) | |
| download | hyplnk-lld-3dc0a28d7dfcfbd9b7a619b614a1a0d750bcae48.tar.gz hyplnk-lld-3dc0a28d7dfcfbd9b7a619b614a1a0d750bcae48.tar.xz hyplnk-lld-3dc0a28d7dfcfbd9b7a619b614a1a0d750bcae48.zip | |
cicInterruptExample: Add volatile for EMU count record
Signed-off-by: Sam Nelson <sam.nelson@ti.com>
| -rwxr-xr-x | example/cicInterruptExample/src/cicInterruptExample.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/example/cicInterruptExample/src/cicInterruptExample.c b/example/cicInterruptExample/src/cicInterruptExample.c index 2bf7ec2..2902ef9 100755 --- a/example/cicInterruptExample/src/cicInterruptExample.c +++ b/example/cicInterruptExample/src/cicInterruptExample.c | |||
| @@ -103,8 +103,8 @@ CSL_PllcRegsOvly pllcRegs = (CSL_PllcRegsOvly)(CSL_PLLC_REGS); | |||
| 103 | #define hyplnk_EXAMPLE_CIC0_1_DELAY_CYCLES_BETWEEN_INTERRUPTS 2000 | 103 | #define hyplnk_EXAMPLE_CIC0_1_DELAY_CYCLES_BETWEEN_INTERRUPTS 2000 |
| 104 | 104 | ||
| 105 | #ifdef EMUCNT_PROFILE | 105 | #ifdef EMUCNT_PROFILE |
| 106 | uint32_t recordEmucnt0Start[hyplnk_EXAMPLE_NUM_DSP_CORES][hyplnk_EXAMPLE_NUM_INTERRUPTS]; | 106 | volatile uint32_t recordEmucnt0End[hyplnk_EXAMPLE_NUM_DSP_CORES][hyplnk_EXAMPLE_NUM_INTERRUPTS]; |
| 107 | uint32_t recordEmucnt0End[hyplnk_EXAMPLE_NUM_DSP_CORES][hyplnk_EXAMPLE_NUM_INTERRUPTS]; | 107 | volatile uint32_t recordEmucnt0Start[hyplnk_EXAMPLE_NUM_DSP_CORES][hyplnk_EXAMPLE_NUM_INTERRUPTS]; |
| 108 | #endif | 108 | #endif |
| 109 | 109 | ||
| 110 | /* ARM side needs 24 independent interrupts, for example: | 110 | /* ARM side needs 24 independent interrupts, for example: |