summaryrefslogtreecommitdiffstats
Commit message (Expand)AuthorAgeFilesLines
* Merge pull request #3 in PROCESSOR-SDK/ibl from PRSDK-5675 to masterHEADmasterMahesh Radhakrishnan2019-09-161-8/+8
|\
| * PRSDK-5675: Renaming the .exe targets to .bin targets for compatibility with ...Mahesh Radhakrishnan2019-09-161-8/+8
|/
* Merge pull request #2 in PROCESSOR-SDK/ibl from david_prsdk_5675 to masterMahesh Radhakrishnan2019-08-087-0/+0
|\
| * to fix prsdk 5675David Zhou2019-06-287-0/+0
|/
* Merge pull request #1 in PROCESSOR-SDK/ibl from PRSDK-787 to masterIvan Pang2017-02-063-6/+6
|\
| * c66x: corrected PREDIV and updated size limitations in utilsIvan Pang2017-01-273-6/+6
|/
* i2cConfig.gel: changed to hard copy since symbolic link does not get packaged...Ivan Pang2016-06-271-1/+1627
* MCSDK 3.0: update CGT version for Alpha-6 releaseDEV.MCSDK-03.00.03.15DEV.MCSDK-03.00.02.14DEV.MCSDK-03.00.02.13DEV.MCSDK-03.00.01.12DEV.MCSDK-03.00.00.12BDEV.MCSDK-03.00.00.09BDEV.MCSDK-03.00.00.09DEV.MCSDK-03.00.00.08DEV.MCSDK-03.00.00.07DEV.MCSDK-03.00.00.06Hao Zhang2013-01-112-4/+4
* Updated 6657 DDR3 configCasey Smith2012-12-032-2/+2
* MCSDK 3.0: reverse the change to add symbolic link to i2cConfig.gelDEV.MCSDK-03.00.00.05Hao Zhang2012-11-281-0/+1
* MCSDK 3.0: add support for Keystone II devicesHao Zhang2012-11-1949-318/+4413
* Updated version in release.shDEV.BIOS.MCSDK.02.01.02.05Casey Smith2012-11-011-1/+1
* Updated PLL sequence and 66x and 665x devices and updated versionCasey Smith2012-10-054-60/+87
* Corrected sed command in makestg2DEV.BIOS.MCSDK.02.01.01.04Casey Smith2012-09-101-1/+1
* Updated nandemif25.c from EI for 6657 nand sizeIvan Pang2012-08-191-51/+49
* NAND fix for 6657 (provided by EI)Ivan Pang2012-07-151-12/+82
* Fixed a bug for C6657 tftp bootIvan Pang2012-06-191-1/+1
* Corrected PCIE_BAR2 value for 6657; corrected DDR leveling value for 6657DEV.MAD_UTILS.IBL.01.00.00.15Ivan Pang2012-05-202-2/+2
* Corrected merge for 6657 iblIvan Pang2012-05-155-4/+12
* Bumped up IBL version; fixed a string cmp in iblConfigIvan Pang2012-05-094-6/+6
* Added support for C6657Ivan Pang2012-05-0938-37/+4050
* removed clearing of DDR3 initializations in IBL helping NAND boot, after root...Aravind Batni2012-05-093-14/+0
* fixed the return for the pscDelay function to eliminate the trap in pscWait()Aravind Batni2012-05-092-2/+2
* updated the PLL sequence for PA for C6670/C6678Aravind Batni2012-05-091-0/+2
* Updated version to 1.0.0.14DEV.MAD_UTILS.IBL.01.00.00.14Ivan Pang2012-04-033-5/+5
* Fixed romparser bug, resolved SDOCM00087159Ivan Pang2012-04-031-1/+2
* IBL: i2c delay function updateDEV.MAD_UTILS.IBL.01.00.03.13Sajesh Kumar Saran2012-03-161-2/+3
* NAND GPIO ndelay loop updateSajesh Kumar Saran2012-03-163-7/+9
* Clearing DDR3 memory in IBL (workaround for failing to load NAND image)DEV.MAD_UTILS.IBL.01.00.00.13Ivan Pang2012-03-083-1/+13
* IBL updates. Change to version 1.0.0.13Ivan Pang2012-02-216-31/+9
* DDR config updates for Shannon PG 2.0Ivan Pang2012-02-211-4/+4
* iblConfig: refix DHCP for 6670linux-c6x-2.0-rc3linux-c6x-2.0-rc2linux-c6x-2.0Bill Mills2011-12-071-4/+4
* iblConfig now accepts ethboot changes from input.txtDEV.MAD_UTILS.IBL.01.00.00.12Ivan Pang2011-11-282-4/+93
* Code review changes to ensure ddr3_mem_test() picking up types.h definitionPrabhu Kuttiyam2011-11-282-17/+8
* Renamed ifdef flag, init uart from iblmainPrabhu Kuttiyam2011-11-284-6/+9
* Merge branch 'linux-c6x-2.0.x' into boot-rel-expPrabhu Kuttiyam2011-11-2821-58/+181
|\
| * Refix c64x: uart API and null_uartBill Mills2011-11-2313-15/+136
| * UPdate Version to 1.0.0.12Sandeep Paulraj2011-11-233-10/+5
| * Add volatile to DDRPLLCTL1Prabhu Kuttiyam2011-11-221-1/+1
| * Merge branch 'boot-rel-exp'Prabhu Kuttiyam2011-11-2214-379/+408
| |\
| * | setupenvMsys.sh to use CGT 7.2.4 instead of CCS's c6000 libraryIvan Pang2011-11-171-2/+2
| * | IBL Config fixesIvan Pang2011-11-173-30/+37
* | | Code review changes, restructuring codePrabhu Kuttiyam2011-11-289-92/+112
| |/ |/|
* | Clean up UART prints, UART driver, etc.IBL_EXP_11_21Prabhu Kuttiyam2011-11-214-126/+161
* | Fixed length of UART printPrabhu Kuttiyam2011-11-191-7/+8
* | Modified IBL to re-init PLL in DDR controller, added UARTPrabhu Kuttiyam2011-11-198-225/+234
* | for loop for pll + ddr_ctr_configPrabhu Kuttiyam2011-11-172-3/+33
* | new pll sequence of 1.main 2.pa 3.ddrPrabhu Kuttiyam2011-11-174-24/+11
* | Updated ddr_controller wait to reflect proper values, adding DDR PLL init in ...IBL_EXP_11_16Prabhu Kuttiyam2011-11-163-22/+31
* | DDR controller Pre-code review updates/comments, cleaned up c66xinit.cPrabhu Kuttiyam2011-11-162-19/+8