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authorIvan Pang2012-05-25 09:06:21 -0500
committerIvan Pang2012-05-25 09:06:21 -0500
commit8f0084983c93108b7901861b4176d5b21ee4edc8 (patch)
treec0a2356749c075e8b97a017324d7ac3a0f6b3687
parentcc9b1ccd10223a636073f1642653cfba74435b62 (diff)
downloadmcsdk-tools-DEV.BIOS.MCSDK.02.00.09.21.tar.gz
mcsdk-tools-DEV.BIOS.MCSDK.02.00.09.21.tar.xz
mcsdk-tools-DEV.BIOS.MCSDK.02.00.09.21.zip
Added 6657 support for pcie linux loaderDEV.BIOS.MCSDK.02.00.09.21
-rw-r--r--boot_loader/examples/pcie/linux_host_loader/pciedemo.c25
1 files changed, 24 insertions, 1 deletions
diff --git a/boot_loader/examples/pcie/linux_host_loader/pciedemo.c b/boot_loader/examples/pcie/linux_host_loader/pciedemo.c
index 9be0aea..e5ab281 100644
--- a/boot_loader/examples/pcie/linux_host_loader/pciedemo.c
+++ b/boot_loader/examples/pcie/linux_host_loader/pciedemo.c
@@ -25,6 +25,7 @@
25 * added PCIE over EDMA throughput measurement 25 * added PCIE over EDMA throughput measurement
26 * - 1.4: Add a DSP local reset demo; fix pushData() to handle cases when 26 * - 1.4: Add a DSP local reset demo; fix pushData() to handle cases when
27 * sections within different memory regions in a header file 27 * sections within different memory regions in a header file
28 * - 1.5: Support 6657 boot
28 ***************************************************************************************/ 29 ***************************************************************************************/
29 30
30#include <linux/module.h> 31#include <linux/module.h>
@@ -54,7 +55,8 @@ MODULE_LICENSE("GPL v2");
54/* Must select a platform */ 55/* Must select a platform */
55#define EVMC6678L 1 56#define EVMC6678L 1
56#define EVMC6670L 0 57#define EVMC6670L 0
57 58#define EVMC6657L 0
59
58#if BIG_ENDIAN 60#if BIG_ENDIAN
59#define myIoread32 ioread32be 61#define myIoread32 ioread32be
60#define myIowrite32 iowrite32be 62#define myIowrite32 iowrite32be
@@ -71,6 +73,10 @@ MODULE_LICENSE("GPL v2");
71#define MAGIC_ADDR 0x008FFFFC 73#define MAGIC_ADDR 0x008FFFFC
72#endif 74#endif
73 75
76#if EVMC6657L
77#define MAGIC_ADDR 0x008FFFFC
78#endif
79
74/* Include header array */ 80/* Include header array */
75#if HELLO_WORLD_DEMO 81#if HELLO_WORLD_DEMO
76 82
@@ -84,6 +90,11 @@ MODULE_LICENSE("GPL v2");
84#include "pcieBootCode_6670.h" /* "Hello world" boot example */ 90#include "pcieBootCode_6670.h" /* "Hello world" boot example */
85#endif 91#endif
86 92
93#if EVMC6657L
94#include "pcieDdrInit_6657.h" /* DDR init */
95#include "pcieBootCode_6657.h" /* "Hello world" boot example */
96#endif
97
87#endif 98#endif
88 99
89#if POST_DEMO 100#if POST_DEMO
@@ -96,6 +107,10 @@ MODULE_LICENSE("GPL v2");
96#include "post_6670.h" /* POST boot example */ 107#include "post_6670.h" /* POST boot example */
97#endif 108#endif
98 109
110#if EVMC6657L
111#include "post_6657.h" /* POST boot example */
112#endif
113
99#endif 114#endif
100 115
101#if EDMA_INTC_DEMO 116#if EDMA_INTC_DEMO
@@ -958,6 +973,10 @@ uint32_t writeDSPMemory(uint32_t coreNum, uint32_t DSPMemAddr, uint32_t *buffer,
958 case 2: 973 case 2:
959 case 3: 974 case 3:
960#endif 975#endif
976#if EVMC6657L
977 case 0:
978 case 1:
979#endif
961 DSPMemAddr &= 0x00FFFFFF; 980 DSPMemAddr &= 0x00FFFFFF;
962 tempReg = ioread32(ptrReg + IB_OFFSET(1)/4); 981 tempReg = ioread32(ptrReg + IB_OFFSET(1)/4);
963 iowrite32(tempReg + coreNum*0x01000000, ptrReg + IB_OFFSET(1)/4); /* pointing to a different core */ 982 iowrite32(tempReg + coreNum*0x01000000, ptrReg + IB_OFFSET(1)/4); /* pointing to a different core */
@@ -1042,6 +1061,10 @@ uint32_t readDSPMemory(uint32_t coreNum, uint32_t DSPMemAddr, uint32_t *buffer,
1042 case 2: 1061 case 2:
1043 case 3: 1062 case 3:
1044#endif 1063#endif
1064#if EVMC6657L
1065 case 0:
1066 case 1:
1067#endif
1045 DSPMemAddr &= 0x00FFFFFF; 1068 DSPMemAddr &= 0x00FFFFFF;
1046 tempReg = ioread32(ptrReg + IB_OFFSET(1)/4); 1069 tempReg = ioread32(ptrReg + IB_OFFSET(1)/4);
1047 iowrite32(tempReg + coreNum*0x1000000, ptrReg + IB_OFFSET(1)/4); /* pointing to a different core */ 1070 iowrite32(tempReg + coreNum*0x1000000, ptrReg + IB_OFFSET(1)/4); /* pointing to a different core */