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author | Hao Zhang | 2011-05-12 13:04:23 -0500 |
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committer | Hao Zhang | 2011-05-12 13:04:23 -0500 |
commit | 17e0825a5b0b1895f37e4a0cd563d5f97827e545 (patch) | |
tree | 195086f46e9edb732d54b446a245815a6466be3c | |
parent | 4c0888eae308fbb560f58c05ac8d1011fde959f7 (diff) | |
download | mcsdk-tools-17e0825a5b0b1895f37e4a0cd563d5f97827e545.tar.gz mcsdk-tools-17e0825a5b0b1895f37e4a0cd563d5f97827e545.tar.xz mcsdk-tools-17e0825a5b0b1895f37e4a0cd563d5f97827e545.zip |
Updated readme to tools scripts
23 files changed, 154 insertions, 1067 deletions
diff --git a/boot_loader/IBL_Makefile b/boot_loader/IBL_Makefile deleted file mode 100644 index 3a498fd..0000000 --- a/boot_loader/IBL_Makefile +++ /dev/null | |||
@@ -1,398 +0,0 @@ | |||
1 | #* | ||
2 | #* | ||
3 | #* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/ | ||
4 | #* | ||
5 | #* | ||
6 | #* Redistribution and use in source and binary forms, with or without | ||
7 | #* modification, are permitted provided that the following conditions | ||
8 | #* are met: | ||
9 | #* | ||
10 | #* Redistributions of source code must retain the above copyright | ||
11 | #* notice, this list of conditions and the following disclaimer. | ||
12 | #* | ||
13 | #* Redistributions in binary form must reproduce the above copyright | ||
14 | #* notice, this list of conditions and the following disclaimer in the | ||
15 | #* documentation and/or other materials provided with the | ||
16 | #* distribution. | ||
17 | #* | ||
18 | #* Neither the name of Texas Instruments Incorporated nor the names of | ||
19 | #* its contributors may be used to endorse or promote products derived | ||
20 | #* from this software without specific prior written permission. | ||
21 | #* | ||
22 | #* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
23 | #* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
24 | #* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
25 | #* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
26 | #* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
27 | #* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
28 | #* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
29 | #* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
30 | #* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
31 | #* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
32 | #* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
33 | #* | ||
34 | |||
35 | |||
36 | #******************************************************************************************* | ||
37 | #* FILE PURPOSE: Top level make for the IBL | ||
38 | #******************************************************************************************* | ||
39 | #* FILE NAME: Makefile | ||
40 | #* | ||
41 | #* DESCRIPTION: Builds the Intermediate Boot Loader (IBL) | ||
42 | #* | ||
43 | #* Usage: make c6455 | c6472 | c6474 | c6457 | c661x | ||
44 | #* [DEBUG=yes] /* Compiles for debug */ | ||
45 | #* [ETH=no] /* Disables ethernet support */ | ||
46 | #* [BIS=no] /* Disables BIS interpreter */ | ||
47 | #* [COFF=no] /* Disables COFF interpreter */ | ||
48 | #* [BLOB=no] /* Disables BLOB interpreter */ | ||
49 | #* [ELF=no] /* Disables ELF interpreter */ | ||
50 | #* [NAND=no] /* Disables NAND support through EMIF/SPI/GPIO */ | ||
51 | #* [NAND_SPI=no] /* Disables NAND support through SPI */ | ||
52 | #* [NAND_EMIF=no] /* Disables NAND support through EMIF */ | ||
53 | #* [NAND_GPIO=no] /* Disables NAND support through GPIO */ | ||
54 | #* [NOR=no] /* Disables NOR through EMIF/SPI */ | ||
55 | #* [NOR_SPI=no] /* Disables NOR support through SPI */ | ||
56 | #* [NOR_EMIF=no] /* Disables NOR support through EMIF */ | ||
57 | #* [SPI=no] /* Disables SPI */ | ||
58 | #* [I2C=no] /* Disables I2C */ | ||
59 | #* [EMIF=no] /* Disables EMIF */ | ||
60 | #* [MULTI_BOOT=no] /* Disables Multi-boot feature */ | ||
61 | #* [SPI_MODE=<0,1,2,3>] /* Selects the SPI operating mode */ | ||
62 | #* [SPI_ADDR_WIDTH=<16,24>] /* Selects the SPI address width */ | ||
63 | #* [SPI_NPIN=<4,5>] /* Selects the number of pins on the interface */ | ||
64 | #* [SPI_CSEL=<1,2>] /* Sets the SPI CSEL value in 5 pin mode */ | ||
65 | #* [SPI_C2TDEL=x] /* Sets the SPI C to T delay value */ | ||
66 | #* [SPI_CLKDIV=x] /* Sets the SPI module clock divider */ | ||
67 | #* [SPI_USE_ROM=yes] /* Uses SPI interface parameters from boot ROM, if available */ | ||
68 | #* [ENDIAN= both | big | little] /* Selects the endian of the build */ | ||
69 | #* [I2C_BUS_ADDR= 0x50 | 0x51] /* The initial I2C bus address */ | ||
70 | #* [COMPACT_I2C=yes] /* Mimimizes the size of the I2C */ | ||
71 | #* [I2C_MAP_ADDR= 0x500 | 0x800] /* The IBL configuration parameter offset */ | ||
72 | #* | ||
73 | #* | ||
74 | #* or to make a board specific configuraiton | ||
75 | #* | ||
76 | #* make evm_c6455 | evm_c6472 | evm_c6474 | evm_c6457 | evm_c661x | ||
77 | #* | ||
78 | #* or to test the builds by making all the devices and testing excludes | ||
79 | #* | ||
80 | #* make test_build | ||
81 | #******************************************************************************************* | ||
82 | |||
83 | IBLS_C6X= c6455 c6472 c6474 c6457 c661x | ||
84 | EVMS_C6X= evm_c6455 evm_c6472 evm_c6474 | ||
85 | |||
86 | |||
87 | # Excluding functions from the build reduces the I2C eeprom memory used and | ||
88 | # speeds the initial boot time. Note that boot table cannot be excluded | ||
89 | # because it is required for the two stage I2C load process | ||
90 | |||
91 | CEXCLUDES= | ||
92 | |||
93 | ifeq ($(ETH),no) | ||
94 | CEXCLUDES+= ETH | ||
95 | endif | ||
96 | |||
97 | ifeq ($(BIS),no) | ||
98 | CEXCLUDES+= BIS | ||
99 | endif | ||
100 | |||
101 | ifeq ($(COFF),no) | ||
102 | CEXCLUDES+= COFF | ||
103 | endif | ||
104 | |||
105 | ifeq ($(BLOB),no) | ||
106 | CEXCLUDES+= BLOB | ||
107 | endif | ||
108 | |||
109 | ifeq ($(ELF),no) | ||
110 | CEXCLUDES+= ELF | ||
111 | endif | ||
112 | |||
113 | ifeq ($(NAND),no) | ||
114 | CEXCLUDES+= NAND_SPI | ||
115 | CEXCLUDES+= NAND_EMIF | ||
116 | CEXCLUDES+= NAND_GPIO | ||
117 | |||
118 | else | ||
119 | |||
120 | ifeq ($(NAND_SPI),no) | ||
121 | CEXCLUDES+= NAND_SPI | ||
122 | endif | ||
123 | |||
124 | ifeq ($(NAND_EMIF),no) | ||
125 | CEXCLUDES+= NAND_EMIF | ||
126 | endif | ||
127 | |||
128 | ifeq ($(NAND_GPIO),no) | ||
129 | CEXCLUDES+= NAND_GPIO | ||
130 | endif | ||
131 | |||
132 | endif | ||
133 | |||
134 | |||
135 | ifeq ($(NOR),no) | ||
136 | CEXCLUDES+= NOR_SPI | ||
137 | CEXCLUDES+= NOR_EMIF | ||
138 | |||
139 | else | ||
140 | |||
141 | ifeq ($(NOR_SPI),no) | ||
142 | CEXCLUDES+= NOR_SPI | ||
143 | endif | ||
144 | |||
145 | ifeq ($(NOR_EMIF),no) | ||
146 | CEXCLUDES+= NOR_EMIF | ||
147 | endif | ||
148 | |||
149 | endif | ||
150 | |||
151 | |||
152 | ifeq ($(I2C),no) | ||
153 | CEXCLUDES+= I2C | ||
154 | endif | ||
155 | |||
156 | |||
157 | ifeq ($(SPI),no) | ||
158 | |||
159 | ifeq (,$(findstring NAND_SPI, $(CEXCLUDES))) | ||
160 | CEXCLUDES+= NAND_SPI | ||
161 | endif | ||
162 | |||
163 | ifeq (,$(findstring NOR_SPI, $(CEXCLUDES))) | ||
164 | CEXCLUDES+= NOR_SPI | ||
165 | endif | ||
166 | |||
167 | endif | ||
168 | |||
169 | |||
170 | ifeq ($(EMIF),no) | ||
171 | |||
172 | ifeq (,$(findstring NAND_EMIF, $(CEXCLUDES))) | ||
173 | CEXCLUDES+= NAND_EMIF | ||
174 | endif | ||
175 | |||
176 | ifeq (,$(findstring NOR_EMIF, $(CEXCLUDES))) | ||
177 | CEXCLUDES+= NOR_EMIF | ||
178 | endif | ||
179 | |||
180 | endif | ||
181 | |||
182 | ifeq ($(MULTI_BOOT),no) | ||
183 | CEXCLUDES+= MULTI_BOOT | ||
184 | endif | ||
185 | |||
186 | # The endian of the build. The default target builds a single ROM image with both endians present | ||
187 | ifeq ($(ENDIAN),big) | ||
188 | ENDIAN_MODE=big | ||
189 | else | ||
190 | ifeq ($(ENDIAN),little) | ||
191 | ENDIAN_MODE=little | ||
192 | else | ||
193 | ENDIAN_MODE=both | ||
194 | endif | ||
195 | endif | ||
196 | |||
197 | # The i2c ROM bus address. The code will advance accross I2C bus address boundaries (the code must | ||
198 | # be blocked so that a single block doesn't cross a boundary, however). | ||
199 | ifndef I2C_BUS_ADDR | ||
200 | I2C_BUS_ADDR=0x50 | ||
201 | endif | ||
202 | |||
203 | ifndef I2C_MAP_ADDR | ||
204 | ifeq ($(ENDIAN),big) | ||
205 | I2C_MAP_ADDR=0x800 | ||
206 | else | ||
207 | I2C_MAP_ADDR=0x500 | ||
208 | endif | ||
209 | endif | ||
210 | |||
211 | |||
212 | # The SPI configuration parameters | ||
213 | ifndef SPI_MODE | ||
214 | SPI_MODE=1 | ||
215 | endif | ||
216 | |||
217 | ifndef SPI_ADDR_WIDTH | ||
218 | SPI_ADDR_WIDTH=24 | ||
219 | endif | ||
220 | |||
221 | ifndef SPI_NPIN | ||
222 | SPI_NPIN=5 | ||
223 | endif | ||
224 | |||
225 | ifndef SPI_CSEL | ||
226 | SPI_CSEL=2 | ||
227 | endif | ||
228 | |||
229 | ifndef SPI_C2TDEL | ||
230 | SPI_C2TDEL=4 | ||
231 | endif | ||
232 | |||
233 | ifndef SPI_CLKDIV | ||
234 | SPI_CLKDIV=8 | ||
235 | endif | ||
236 | |||
237 | ifneq ($(SPI_USE_ROM),0) | ||
238 | SPI_ROM=1 | ||
239 | else | ||
240 | SPI_ROM=0 | ||
241 | endif | ||
242 | |||
243 | SPI_DEFS= SPI_MODE=$(SPI_MODE) | ||
244 | SPI_DEFS+= SPI_ADDR_WIDTH=$(SPI_ADDR_WIDTH) | ||
245 | SPI_DEFS+= SPI_NPIN=$(SPI_NPIN) | ||
246 | SPI_DEFS+= SPI_CSEL=$(SPI_CSEL) | ||
247 | SPI_DEFS+= SPI_C2TDEL=$(SPI_C2TDEL) | ||
248 | SPI_DEFS+= SPI_CLKDIV=$(SPI_CLKDIV) | ||
249 | SPI_DEFS+= SPI_ROM=$(SPI_ROM) | ||
250 | |||
251 | |||
252 | .PHONY: all $(IBLS_C6X) evm_c6455 evm_c6472 evm_c6474 evm_c6457 evm_c6618 | ||
253 | .PHONY: test_c661x test_c6455 test_c6472 test_c6474 test_c6457 clean | ||
254 | |||
255 | |||
256 | all: | ||
257 | @echo must specify a target [ $(IBLS_C6X) $(EVMS_C6X) ] | ||
258 | |||
259 | |||
260 | # The debug flag changes compiler options | ||
261 | ifndef DEBUG | ||
262 | DEBUG=no | ||
263 | endif | ||
264 | export DEBUG | ||
265 | |||
266 | |||
267 | $(IBLS_C6X): | ||
268 | make -f makestg1 ARCH=c64x TARGET=$@ I2C_BUS_ADDR=$(I2C_BUS_ADDR) I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=$(COMPACT_I2C) ENDIAN_MODE=$(ENDIAN_MODE) CEXCLUDES='$(CEXCLUDES)' SPI_DEFS='$(SPI_DEFS)' $@ | ||
269 | |||
270 | # Configurations for individual evms | ||
271 | # The c6455 EVM has a 128k eeprom (64k at 0x50, 64k at 0x51), so both endians are built with full functionality | ||
272 | evm_c6455: | ||
273 | make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES='MULTI_BOOT' c6455 | ||
274 | |||
275 | # The c6472 EVM has a 128k eeprom (64k at 0x50, 64k at 0x51), so both endians are built with full functionality | ||
276 | evm_c6472: | ||
277 | make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES='MULTI_BOOT' c6472 | ||
278 | |||
279 | # The 6474 EVM has a 32k eeprom. A stripped down version is build with only one endian. | ||
280 | evm_c6474: | ||
281 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=little CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' I2C_SIZE_BYTES=0x8000 c6474 | ||
282 | cp ibl_c6474/i2crom.dat ibl_c6474/i2crom_0x50_c6474_le.dat | ||
283 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=big CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' I2C_SIZE_BYTES=0x8000 c6474 | ||
284 | cp ibl_c6474/i2crom.dat ibl_c6474/i2crom_0x50_c6474_be.dat | ||
285 | |||
286 | evm_c6474l: | ||
287 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=little CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' c6474 | ||
288 | cp ibl_c6474/i2crom.dat ibl_c6474/i2crom_0x50_c6474l_le.dat | ||
289 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=big CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' c6474 | ||
290 | cp ibl_c6474/i2crom.dat ibl_c6474/i2crom_0x50_c6474l_be.dat | ||
291 | |||
292 | # The 6457 EVM | ||
293 | evm_c6457: | ||
294 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=little CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' c6457 | ||
295 | cp ibl_c6457/i2crom.dat ibl_c6457/i2crom_0x50_c6457_le.dat | ||
296 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x200 COMPACT_I2C=yes ENDIAN_MODE=big CEXCLUDES='ELF NAND_GPIO BIS MULTI_BOOT' c6457 | ||
297 | cp ibl_c6457/i2crom.dat ibl_c6457/i2crom_0x50_c6457_be.dat | ||
298 | |||
299 | # The 6608 EVM | ||
300 | EVM_6608_SPI_DEFS= SPI_MODE=1 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=1 SPI_CLKDIV=8 SPI_ROM=1 | ||
301 | |||
302 | evm_c6608: | ||
303 | make -f makestg1 ARCH=c64x TARGET=c661x I2C=no I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=0x500 ENDIAN_MODE=little CEXCLUDES=I2C SPI_DEFS='$(EVM_6608_SPI_DEFS)' c661x | ||
304 | |||
305 | # The 667x EVM SPI/NOR Boot | ||
306 | EVM_667x_SPI_DEFS= SPI_MODE=1 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=1 SPI_CLKDIV=8 SPI_ROM=1 | ||
307 | |||
308 | evm_c667x_spi: | ||
309 | make -f makestg1 ARCH=c64x TARGET=c661x I2C=no I2C_BUS_ADDR=0x51 I2C_MAP_ADDR=0x500 ENDIAN_MODE=little CEXCLUDES=I2C SPI_DEFS='$(EVM_667x_SPI_DEFS)' c661x | ||
310 | |||
311 | evm_c667x_i2c: | ||
312 | make -f makestg1 I2C_BUS_ADDR=$(I2C_BUS_ADDR) I2C_MAP_ADDR=$(I2C_MAP_ADDR) ENDIAN_MODE=$(ENDIAN) ARCH=c64x TARGET=c661x SPI=no INTERNAL_UTILS=no SPI_DEFS='$(EVM_667x_SPI_DEFS)' c661x | ||
313 | |||
314 | test_c661x: | ||
315 | make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NOR_SPI' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x | ||
316 | make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NAND_SPI' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x | ||
317 | make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NOR_EMIF' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x | ||
318 | make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NAND_EMIF' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x | ||
319 | make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='NAND_EMIF NOR_EMIF' SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x | ||
320 | make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES='SPI NOR_SPI NAND_SPI' I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no c661x | ||
321 | make -f makestg1 ARCH=c64x TARGET=c661x ENDIAN_MODE=both CEXCLUDES=I2C SPI_DEFS='SPI_ROM=1 SPI_MODE=3 SPI_ADDR_WIDTH=24 SPI_NPIN=5 SPI_CSEL=2 SPI_C2TDEL=8 SPI_CLKDIV=0x20' c661x | ||
322 | |||
323 | # Test - builds all the targets, with single component exclusion | ||
324 | |||
325 | test_c6455: | ||
326 | make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES= c6455 | ||
327 | make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=ETH c6455 | ||
328 | make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=NAND_GPIO c6455 | ||
329 | make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=BIS c6455 | ||
330 | make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=COFF c6455 | ||
331 | make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=ELF c6455 | ||
332 | make -f makestg1 ARCH=c64x TARGET=c6455 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=BLOB c6455 | ||
333 | |||
334 | test_c6457: | ||
335 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES= c6457 | ||
336 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=ETH c6457 | ||
337 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=NAND_GPIO c6457 | ||
338 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=BIS c6457 | ||
339 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=COFF c6457 | ||
340 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=ELF c6457 | ||
341 | make -f makestg1 ARCH=c64x TARGET=c6457 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=BLOB c6457 | ||
342 | |||
343 | test_c6472: | ||
344 | make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES= c6472 | ||
345 | make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=ETH c6472 | ||
346 | make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=NAND_GPIO c6472 | ||
347 | make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=BIS c6472 | ||
348 | make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=COFF c6472 | ||
349 | make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=ELF c6472 | ||
350 | make -f makestg1 ARCH=c64x TARGET=c6472 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=no ENDIAN_MODE=both CEXCLUDES=BLOB c6472 | ||
351 | |||
352 | test_c6474: | ||
353 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES= c6474 | ||
354 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=ETH c6474 | ||
355 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=NAND_GPIO c6474 | ||
356 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=BIS c6474 | ||
357 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=COFF c6474 | ||
358 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=ELF c6474 | ||
359 | make -f makestg1 ARCH=c64x TARGET=c6474 I2C_BUS_ADDR=0x50 I2C_MAP_ADDR=$(I2C_MAP_ADDR) COMPACT_I2C=yes ENDIAN_MODE=both CEXCLUDES=BLOB c6474 | ||
360 | |||
361 | |||
362 | test_build: test_c6455 test_c6457 test_c6472 test_c6474 test_c661x | ||
363 | |||
364 | |||
365 | # will need to add a line for each additional ARCH type added | ||
366 | clean: | ||
367 | make -f makestg2 clean ARCH=c64x TARGET=c6472 | ||
368 | make -f makestg2 cleant ARCH=c64x TARGET=c6472 | ||
369 | make -f makestg2 cleant ARCH=c64x TARGET=c6474 | ||
370 | make -f makestg2 cleant ARCH=c64x TARGET=c6455 | ||
371 | make -f makestg2 cleant ARCH=c64x TARGET=c6457 | ||
372 | make -f makestg2 cleant ARCH=c64x TARGET=c661x | ||
373 | make -C ../util/bconvert clean | ||
374 | make -C ../util/btoccs clean | ||
375 | make -C ../util/i2cConfig clean ARCH=c64x TARGET=c6455 | ||
376 | make -C ../util/i2cConfig clean ARCH=c64x TARGET=c6472 | ||
377 | make -C ../util/i2cConfig clean ARCH=c64x TARGET=c6474 | ||
378 | make -C ../util/i2cConfig clean ARCH=c64x TARGET=c6457 | ||
379 | make -C ../util/i2cConfig clean ARCH=c64x TARGET=c661x | ||
380 | make -C ../util/romparse clean | ||
381 | make -C ../test/test1 clean | ||
382 | make -C ../test/test2 clean | ||
383 | find ../ -name *.oc | xargs rm -f | ||
384 | find ../ -name *.dc | xargs rm -f | ||
385 | find ../ -name *.oa | xargs rm -f | ||
386 | find ../ -name *.da | xargs rm -f | ||
387 | find ../ -name *.tmp | xargs rm -f | ||
388 | find ../ -name cdefdep | xargs rm -f | ||
389 | |||
390 | |||
391 | |||
392 | |||
393 | |||
394 | |||
395 | |||
396 | |||
397 | |||
398 | |||
diff --git a/boot_loader/IBL_README.txt b/boot_loader/IBL_README.txt deleted file mode 100644 index 9c4b8e0..0000000 --- a/boot_loader/IBL_README.txt +++ /dev/null | |||
@@ -1,52 +0,0 @@ | |||
1 | C6x Bootloader | ||
2 | |||
3 | Tools required to build IBL: | ||
4 | 1. MinGW MSYS v1.0.11 (http://downloads.sourceforge.net/mingw/MSYS-1.0.11.exe) | ||
5 | 2. TI Code Gen Tools 7.2.0 (bundled with CCSv5) | ||
6 | |||
7 | |||
8 | Steps to build IBL: | ||
9 | 1. Refer to tools\boot_loader\ibl\doc\release_info.txt on how to build IBL for C66x | ||
10 | |||
11 | |||
12 | Steps to program IBL: | ||
13 | |||
14 | 1. Program IBL ROM data to I2C EEPROM bus address 0x51: | ||
15 | a. Copy tools\boot_loader\ibl\src\make\ibl_c661x\i2crom.dat to tools\writer\eeprom\evmc66xxl\bin directory and rename | ||
16 | it to "app.dat". | ||
17 | |||
18 | b. Change bus_addr to "81" (0x51) in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt and save the file. | ||
19 | |||
20 | c. Refer to tools\writer\eeprom\evmc66xxl\docs\README.txt on how to program the CCS data file to EEPROM. | ||
21 | |||
22 | |||
23 | 2. Program boot configuration table to I2C EEPROM bus address 0x51: | ||
24 | a. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM | ||
25 | |||
26 | b. Load program tools\boot_loader\ibl\src\util\i2cConfig\i2cparam_c661x_le.out to CCS | ||
27 | |||
28 | c. Run the program and a message "Run the GEL for for the device to be configured, press return to program the I2C" | ||
29 | will be printed on the CCS console. | ||
30 | |||
31 | d. Load tools\boot_loader\ibl\src\util\i2cConfig\i2cConfig.gel (in CCSv5 Tools->GEL Files, right click mouse in GEL Files | ||
32 | window and select "Load GEL" | ||
33 | |||
34 | e. Run the GEL script EVMC66xx IBL->setConfig_c66xx_main, wait for 10 seconds to ensure that the script configuration is completed. | ||
35 | |||
36 | |||
37 | Supported boot modes: | ||
38 | |||
39 | IBL supports three I2C boot modes: NOR boot, NAND boot and EMAC boot. Both NOR boot and NAND boot support maximum 2 images, EMAC | ||
40 | boot supports only 1 image. For all the I2C boot modes, user needs to set the boot dip switches to I2C master, bus address 0x51. | ||
41 | |||
42 | NOR Boot: | ||
43 | Boot parameter index 0 and 1 selects to boot image 0 and 1 from the NOR flash, by default the boot configuration table sets the | ||
44 | NOR offset address to be 0 and image format to be ELF for image 0. | ||
45 | |||
46 | NAND Boot: | ||
47 | Boot parameter index 2 and 3 selects to boot image 0 and 1 from the NAND flash, by default the boot configuration table sets the | ||
48 | NAND offset address to be 16384 (start of block 1) and image format to be BBLOB for image 0. | ||
49 | |||
50 | EMAC Boot: | ||
51 | Boot parameter index 4 selects to boot an image from a remote TFTP server, by default the boot configuration table sets the | ||
52 | server IP to be 192.168.2.101, board IP to be 192.168.2.100 and image format to be ELF. | ||
diff --git a/boot_loader/IBL_buildibl b/boot_loader/IBL_buildibl index 7ed7ea5..4d06619 100644 --- a/boot_loader/IBL_buildibl +++ b/boot_loader/IBL_buildibl | |||
@@ -1,7 +1,7 @@ | |||
1 | cd ibl/src/make | 1 | cd ibl/src/make |
2 | 2 | ||
3 | source setupenvMsys.sh | 3 | source setupenvMsys.sh |
4 | make evm_c667x_i2c ENDIAN=little I2C_BUS_ADDR=0x51 INTERNAL_UTILS=no | 4 | make evm_c667x_i2c ENDIAN=little I2C_BUS_ADDR=0x51 |
5 | 5 | ||
6 | cd ../../../ | 6 | cd ../../../ |
7 | 7 | ||
diff --git a/boot_loader/IBL_makestg1 b/boot_loader/IBL_makestg1 deleted file mode 100644 index c77490f..0000000 --- a/boot_loader/IBL_makestg1 +++ /dev/null | |||
@@ -1,135 +0,0 @@ | |||
1 | #******************************************************************************************* | ||
2 | #* FILE PURPOSE: Top level make for the IBL | ||
3 | #******************************************************************************************* | ||
4 | #* FILE NAME: Makefile | ||
5 | #* | ||
6 | #* DESCRIPTION: Builds the Intermediate Boot Loader (IBL) | ||
7 | #* | ||
8 | #* Usage: make c6455 | c6472 | c6474 | c6457 | c661x [DEBUG=yes] [ETH=no] [NAND=no] \ | ||
9 | #* [BIS=no] [COFF=no] [BLOB=no] [ELF=no] [ENDIAN= both | big | little] [I2C_BUS_ADDR= 0x50 | 0x51] \ | ||
10 | #* [COMPACT_I2C=yes] [I2C_SIZE_BYTES=..] | ||
11 | #******************************************************************************************* | ||
12 | |||
13 | IBLS_C6X= c6455 c6472 c6474 c6474l c6457 c661x | ||
14 | |||
15 | |||
16 | # Excluding functions from the build reduces the I2C eeprom memory used and | ||
17 | # speeds the initial boot time. Note that boot table cannot be excluded | ||
18 | # because it is required for the two stage I2C load process | ||
19 | |||
20 | # The endian of the build. The default target builds a single ROM image with both endians present | ||
21 | ifeq ($(ENDIAN_MODE),big) | ||
22 | I2CROM= big_endian | ||
23 | STAGE1_TARGET= be_target | ||
24 | else | ||
25 | ifeq ($(ENDIAN_MODE),little) | ||
26 | I2CROM= little_endian | ||
27 | STAGE1_TARGET= le_target | ||
28 | else | ||
29 | I2CROM= both | ||
30 | STAGE1_TARGET= be_target le_target compare | ||
31 | endif | ||
32 | endif | ||
33 | |||
34 | EXCLUDES= $(CEXCLUDES) | ||
35 | |||
36 | |||
37 | # The default i2c size. This is used only for the i2c writer utility | ||
38 | ifndef I2C_SIZE_BYTES | ||
39 | I2C_SIZE_BYTES=0x20000 | ||
40 | endif | ||
41 | |||
42 | # exclusions based on device capability | ||
43 | ifeq ($(TARGET),c6455) | ||
44 | C64X_EXCLUDES=yes | ||
45 | endif | ||
46 | |||
47 | ifeq ($(TARGET),c6457) | ||
48 | C64X_EXCLUDES=yes | ||
49 | endif | ||
50 | |||
51 | ifeq ($(TARGET),c6472) | ||
52 | C64X_EXCLUDES=yes | ||
53 | endif | ||
54 | |||
55 | ifeq ($(TARGET),c6474) | ||
56 | C64X_EXCLUDES=yes | ||
57 | endif | ||
58 | |||
59 | ifeq ($(C64X_EXCLUDES),yes) | ||
60 | |||
61 | ifeq (,$(findstring SPI, $(EXCLUDES))) | ||
62 | EXCLUDES+= SPI | ||
63 | endif | ||
64 | |||
65 | ifeq (,$(findstring NOR_SPI, $(EXCLUDES))) | ||
66 | EXCLUDES+= NOR_SPI | ||
67 | endif | ||
68 | |||
69 | ifeq (,$(findstring NOR_EMIF, $(EXCLUDES))) | ||
70 | EXCLUDES+= NOR_EMIF | ||
71 | endif | ||
72 | |||
73 | ifeq (,$(findstring NAND_SPI, $(EXCLUDES))) | ||
74 | EXCLUDES+= NAND_SPI | ||
75 | endif | ||
76 | |||
77 | ifeq (,$(findstring NAND_EMIF, $(EXCLUDES))) | ||
78 | EXCLUDES+= NAND_EMIF | ||
79 | endif | ||
80 | |||
81 | endif | ||
82 | |||
83 | ifeq ($(TARGET),c661x) | ||
84 | EXCLUDES+= NAND_GPIO | ||
85 | endif | ||
86 | |||
87 | |||
88 | # Prevent I2C/SPI rom creation based on defines | ||
89 | ROMS= | ||
90 | |||
91 | ifeq (,$(findstring I2C, $(EXCLUDES))) | ||
92 | ROMS+= i2crom | ||
93 | endif | ||
94 | |||
95 | ifeq (,$(findstring SPI, $(EXCLUDES))) | ||
96 | ROMS+= spiRom | ||
97 | endif | ||
98 | |||
99 | |||
100 | # Excludes identify which components are not part of the build | ||
101 | export EXCLUDES | ||
102 | |||
103 | .PHONY: all be_target le_target compare $(IBLS_C6X) | ||
104 | |||
105 | all: | ||
106 | @echo must specify a target [ $(IBLS_C6X) ] | ||
107 | |||
108 | |||
109 | |||
110 | be_target: | ||
111 | @echo EXCLUDES= $(EXCLUDES) | ||
112 | make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=big I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) I2C_BUS_ADDR=$(I2C_BUS_ADDR) INTERNAL_UTILS=$(INTERNAL_UTILS) SPI_DEFS='$(SPI_DEFS)' utils | ||
113 | make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=big I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) I2C_BUS_ADDR=$(I2C_BUS_ADDR) SPI_DEFS='$(SPI_DEFS)' $(TARGET) | ||
114 | |||
115 | le_target: | ||
116 | make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=little I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) I2C_BUS_ADDR=$(I2C_BUS_ADDR) INTERNAL_UTILS=$(INTERNAL_UTILS) SPI_DEFS='$(SPI_DEFS)' utils | ||
117 | make -f makestg2 ARCH=c64x TARGET=$(TARGET) ENDIAN=little I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) I2C_BUS_ADDR=$(I2C_BUS_ADDR) SPI_DEFS='$(SPI_DEFS)' $(TARGET) | ||
118 | |||
119 | compare: | ||
120 | make -f makestg2 ARCH=c64x TARGET=$(TARGET) compare | ||
121 | |||
122 | |||
123 | $(IBLS_C6X): $(STAGE1_TARGET) | ||
124 | make -f makestg2 ARCH=c64x TARGET=$@ I2CROM=$(I2CROM) I2C_BUS_ADDR=$(I2C_BUS_ADDR) I2C_MAP_ADDRESS=$(I2C_MAP_ADDRESS) COMPACT_I2C=$(COMPACT_I2C) SPI_DEFS='$(SPI_DEFS)' $(ROMS) | ||
125 | |||
126 | |||
127 | |||
128 | |||
129 | |||
130 | |||
131 | |||
132 | |||
133 | |||
134 | |||
135 | |||
diff --git a/boot_loader/IBL_makestg2 b/boot_loader/IBL_makestg2 deleted file mode 100644 index 760329a..0000000 --- a/boot_loader/IBL_makestg2 +++ /dev/null | |||
@@ -1,284 +0,0 @@ | |||
1 | #***************************************************************************** | ||
2 | #* FILE PURPOSE: 2nd stage makefile for the intermediate boot loader | ||
3 | #***************************************************************************** | ||
4 | #* FILE NAME: makestg2 | ||
5 | #* | ||
6 | #* DESCRIPTION: This makefile is invoked with build specific options | ||
7 | #* | ||
8 | #****************************************************************************** | ||
9 | |||
10 | ifndef IBL_ROOT | ||
11 | IBL_ROOT=.. | ||
12 | endif | ||
13 | |||
14 | CFG_MODULES= main device | ||
15 | MODULES= ethboot nandboot driver hw interp ecc norboot | ||
16 | |||
17 | # Note that the Hw module is a two stage clean and handled seperately | ||
18 | CLEAN_MODULES=$(addprefix clean_,$(subst hw,,$(MODULES))) | ||
19 | CLEAN_MODULES+=$(addprefix clean_,$(CFG_MODULES)) | ||
20 | |||
21 | |||
22 | TARGETS= c6472 c6474 c6474l c6455 c6457 c661x | ||
23 | |||
24 | # The main module needs to know the device address of the i2c where the image map resides | ||
25 | MAINDEFS=-DIBL_CFG_I2C_MAP_TABLE_DATA_BUS_ADDR=$(I2C_BUS_ADDR) | ||
26 | |||
27 | # Add build time exclusion definitions | ||
28 | MAINDEFS+=$(addprefix -DEXCLUDE_,$(EXCLUDES)) | ||
29 | |||
30 | # Add SPI definitions | ||
31 | SPI_CFG= $(addprefix -D,$(SPI_DEFS)) | ||
32 | |||
33 | |||
34 | # Common symbols are functions which are loaded with the stage load of the IBL, and | ||
35 | # also referenced from the second stage | ||
36 | #COMMON_SYMBOLS= hwI2Cinit hwI2cMasterRead iblBootBtbl iblMalloc iblFree iblMemset iblMemcpy | ||
37 | COMMON_SYMBOLS= iblBootBtbl iblMalloc iblFree iblMemset iblMemcpy | ||
38 | |||
39 | ifeq ($(ENDIAN),little) | ||
40 | HEX_OPT= -order L | ||
41 | IEXT= le | ||
42 | else | ||
43 | HEX_OPT= -order M | ||
44 | IEXT= be | ||
45 | endif | ||
46 | |||
47 | ifeq ($(COMPACT_I2C),yes) | ||
48 | COMPACT= -compact | ||
49 | endif | ||
50 | |||
51 | include $(IBL_ROOT)/make/$(ARCH)/makedefs.mk | ||
52 | |||
53 | export ARCH | ||
54 | export TARGET | ||
55 | |||
56 | .PHONY: $(TARGETS) i2crom spiRom compare iblInit iblMain $(MODULES) $(CFG_MODULES) | ||
57 | .PHONY: utils clean clean_modules hwClean cleant | ||
58 | |||
59 | $(TARGETS): iblMain | ||
60 | |||
61 | ifeq ($(TARGET),c661x) | ||
62 | HAS_SPI=1 | ||
63 | else | ||
64 | HAS_SPI=0 | ||
65 | endif | ||
66 | |||
67 | ifeq ($(INTERNAL_UTILS), no) | ||
68 | HAS_INTERNAL_UTILS = 0 | ||
69 | else | ||
70 | HAS_INTERNAL_UTILS = 1 | ||
71 | endif | ||
72 | |||
73 | ifeq (EXCLUDE_SPI, $(strip $(findstring EXCLUDE_SPI, $(MAINDEFS)))) | ||
74 | HAS_SPI=0 | ||
75 | endif | ||
76 | |||
77 | ifeq (EXCLUDE_I2C, $(strip $(findstring EXCLUDE_I2C, $(MAINDEFS)))) | ||
78 | HAS_I2C=0 | ||
79 | else | ||
80 | HAS_I2C=1 | ||
81 | endif | ||
82 | |||
83 | # The I2C creation options. The I2C map file is run through the C pre-processor to generate | ||
84 | # the desired I2C mapping. There are three possible configurations - an i2c which has | ||
85 | # both endians present, or an I2C with only one of the endians | ||
86 | |||
87 | I2C_BE_FILE= '"ibl_$(TARGET)/ibl.i2c.be.ccs"' | ||
88 | I2C_LE_FILE= '"ibl_$(TARGET)/ibl.i2c.le.ccs"' | ||
89 | I2C_INIT_BE_FILE= '"ibl_$(TARGET)/ibl_init.i2c.be.ccs"' | ||
90 | I2C_INIT_LE_FILE= '"ibl_$(TARGET)/ibl_init.i2c.le.ccs"' | ||
91 | |||
92 | I2C_DEFS= -DI2C_BUS_ADDR=$(I2C_BUS_ADDR) | ||
93 | I2C_DEFS+= -DI2C_MAP_ADDR=$(I2C_MAP_ADDR) | ||
94 | |||
95 | ifeq ($(I2CROM),both) | ||
96 | I2C_DEFS+= -DINIT_EXE_FILE=$(I2C_INIT_LE_FILE) | ||
97 | I2C_DEFS+= -DEXE_FILE_1=$(I2C_LE_FILE) | ||
98 | I2C_DEFS+= -DPAD_FILE_ID_1=1 | ||
99 | I2C_DEFS+= -DEXE_FILE_2=$(I2C_BE_FILE) | ||
100 | I2C_DEFS+= -DPAD_FILE_ID_2=2 | ||
101 | |||
102 | SPI_CFG+= -DINIT_EXE_FILE=$(I2C_INIT_LE_FILE) | ||
103 | SPI_CFG+= -DEXE_FILE_1=$(I2C_LE_FILE) | ||
104 | SPI_CFG+= -DPAD_FILE_ID_1=1 | ||
105 | SPI_CFG+= -DEXE_FILE_2=$(I2C_BE_FILE) | ||
106 | SPI_CFG+= -DPAD_FILE_ID_2=2 | ||
107 | |||
108 | else | ||
109 | I2C_DEFS+= -DPAD_FILE_ID_1=1 | ||
110 | I2C_DEFS+= -DPAD_FILE_ID_2=1 | ||
111 | |||
112 | SPI_CFG+= -DPAD_FILE_ID_1=1 | ||
113 | SPI_CFG+= -DPAD_FILE_ID_2=1 | ||
114 | |||
115 | ifeq ($(I2CROM),little_endian) | ||
116 | I2C_DEFS+= -DINIT_EXE_FILE=$(I2C_INIT_LE_FILE) | ||
117 | I2C_DEFS+= -DEXE_FILE_1=$(I2C_LE_FILE) | ||
118 | I2C_DEFS+= -DEXE_FILE_2='""' | ||
119 | |||
120 | SPI_CFG+= -DINIT_EXE_FILE=$(I2C_INIT_LE_FILE) | ||
121 | SPI_CFG+= -DEXE_FILE_1=$(I2C_LE_FILE) | ||
122 | SPI_CFG+= -DEXE_FILE_2='""' | ||
123 | |||
124 | else | ||
125 | I2C_DEFS+= -DINIT_EXE_FILE=$(I2C_INIT_BE_FILE) | ||
126 | I2C_DEFS+= -DEXE_FILE_1='""' | ||
127 | I2C_DEFS+= -DEXE_FILE_2=$(I2C_BE_FILE) | ||
128 | |||
129 | SPI_CFG+= -DINIT_EXE_FILE=$(I2C_INIT_BE_FILE) | ||
130 | SPI_CFG+= -DEXE_FILE_1='""' | ||
131 | SPI_CFG+= -DEXE_FILE_2=$(I2C_BE_FILE) | ||
132 | |||
133 | endif | ||
134 | endif | ||
135 | |||
136 | ifeq ($(HAS_SPI),0) | ||
137 | SPI_CFG= | ||
138 | endif | ||
139 | |||
140 | i2crom: | ||
141 | $(CC) -ppo -I../cfg/$(TARGET) $(I2C_DEFS) ibl_$(TARGET)/$@.map.pre | ||
142 | ../util/romparse/romparse $(COMPACT) -rom_base $(I2C_BUS_ADDR) ibl_$(TARGET)/$@.map.pp | ||
143 | $(CP) i2crom.ccs ibl_$(TARGET)/$@.ccs | ||
144 | $(CP) i2crom.ccs ibl_$(TARGET)/$@.dat | ||
145 | ../util/btoccs/ccs2bin -swap ibl_$(TARGET)/$@.ccs ibl_$(TARGET)/$@.bin | ||
146 | $(RM) i2crom.ccs ibl_le.b ibl.b | ||
147 | |||
148 | spiRom: | ||
149 | @echo Making SPI ROM | ||
150 | $(CC) -ppo -I../cfg/$(TARGET) $(SPI_CFG) ibl_$(TARGET)/$@.map.pre | ||
151 | ../util/romparse/romparse $(COMPACT) -fill 0xff -rom_base 0 ibl_$(TARGET)/$@.map.pp | ||
152 | $(CP) i2crom.ccs ibl_$(TARGET)/$@.ccs | ||
153 | $(CP) i2crom.ccs ibl_$(TARGET)/$@.dat | ||
154 | |||
155 | |||
156 | |||
157 | |||
158 | |||
159 | # Target compare checks if the iblInit is compiled the same for both endians | ||
160 | compare: | ||
161 | @echo - | ||
162 | @sh -c 'if diff -q ibl_$(TARGET)/ibl_init.le.ccs ibl_$(TARGET)/ibl_init.be.ccs ; then echo IBL init endian neutral ; else echo !!! WARNING !!!! IBL ini NOT endian neutral !!! ; fi ' | ||
163 | @echo - | ||
164 | |||
165 | # For the init code a raw image is created as well as the i2c code to verify | ||
166 | # endian independent code is generated. The symbols required for linking | ||
167 | # the full application are then extracted | ||
168 | iblInit: $(CFG_MODULES) $(MODULES) | ||
169 | cat ibl_$(TARGET)/ibl_init_objs_template.inc | sed -e s/ENDIAN_TAG/$(IEXT)/g > ibl_$(TARGET)/ibl_init_objs.tmp | ||
170 | $(CC) -ppo $(MAINDEFS) -DENDIAN_TAG=$(IEXT) ibl_$(TARGET)/ibl_init_objs.tmp | ||
171 | $(CP) ibl_$(TARGET)/ibl_init_objs.pp ibl_$(TARGET)/ibl_init_objs.inc | ||
172 | $(LD) -o ibl_$(TARGET)/ibl_$(TARGET)_init.out -m ibl_$(TARGET)/ibl_$(TARGET)_init.map ibl_$(TARGET)/ibl_init.cmd $(RTLIBS) | ||
173 | $(CP) ibl_$(TARGET)/ibl_$(TARGET)_init.out ibl_$(TARGET)/ibl_$(TARGET)_init.$(IEXT).out | ||
174 | $(RM) -f ibl_$(TARGET)/ibl_init_obj.inc | ||
175 | |||
176 | hex6x $(HEX_OPT) ibl_$(TARGET)/ibl_init_image.rmd ibl_$(TARGET)/ibl_$(TARGET)_init.out | ||
177 | $(CP) ibl_le.b ibl_$(TARGET)/ibl.b | ||
178 | ../util/btoccs/b2ccs ibl_$(TARGET)/ibl.b ibl_$(TARGET)/ibl_init.$(IEXT).ccs | ||
179 | |||
180 | hex6x $(HEX_OPT) ibl_$(TARGET)/ibl_init.rmd ibl_$(TARGET)/ibl_$(TARGET)_init.out | ||
181 | ../util/bconvert/bconvert64x -$(IEXT) ibl_le.b ibl.b | ||
182 | $(CP) ibl.b ibl_$(TARGET) | ||
183 | ../util/btoccs/b2i2c ibl_$(TARGET)/ibl.b ibl_$(TARGET)/ibl.i2c.b | ||
184 | ../util/btoccs/b2ccs ibl_$(TARGET)/ibl.i2c.b ibl_$(TARGET)/ibl_init.i2c.$(IEXT).ccs | ||
185 | |||
186 | sed -e 's/\\r//' ../util/symExtract/symExtract > ../util/symExtract/symExtract_unix | ||
187 | bash ../util/symExtract/symExtract_unix ibl_$(TARGET)/ibl_$(TARGET)_init.map ibl_$(TARGET)/ibl_init_symbols.inc $(COMMON_SYMBOLS) | ||
188 | rm -f ../util/symExtract/symExtract_unix | ||
189 | |||
190 | |||
191 | iblMain: iblInit $(CFG_MODULES) $(MODULES) | ||
192 | cat ibl_$(TARGET)/ibl_objs_template.inc | sed -e s/ENDIAN_TAG/$(IEXT)/g > ibl_$(TARGET)/ibl_objs.tmp | ||
193 | $(CC) -ppo $(MAINDEFS) -DENDIAN_TAG=$(IEXT) ibl_$(TARGET)/ibl_objs.tmp | ||
194 | $(CP) ibl_$(TARGET)/ibl_objs.pp ibl_$(TARGET)/ibl_objs.inc | ||
195 | $(LD) -o ibl_$(TARGET)/ibl_$(TARGET).out -m ibl_$(TARGET)/ibl_$(TARGET).$(IEXT).map ibl_$(TARGET)/ibl.cmd $(RTLIBS) | ||
196 | $(CP) ibl_$(TARGET)/ibl_$(TARGET).out ibl_$(TARGET)/ibl_$(TARGET).$(IEXT).out | ||
197 | $(RM) -f ibl_$(TARGET)/ibl_obj.inc | ||
198 | |||
199 | hex6x $(HEX_OPT) ibl_$(TARGET)/ibl.rmd ibl_$(TARGET)/ibl_$(TARGET).out | ||
200 | ../util/bconvert/bconvert64x -$(IEXT) ibl_le.b ibl.b | ||
201 | $(CP) ibl.b ibl_$(TARGET) | ||
202 | ../util/btoccs/b2i2c ibl_$(TARGET)/ibl.b ibl_$(TARGET)/ibl.i2c.b | ||
203 | ../util/btoccs/b2ccs ibl_$(TARGET)/ibl.i2c.b ibl_$(TARGET)/ibl.i2c.$(IEXT).ccs | ||
204 | |||
205 | |||
206 | $(MODULES): | ||
207 | @echo making $@ | ||
208 | make -C $(IBL_ROOT)/$@/$(ARCH)/make $@ | ||
209 | |||
210 | $(CFG_MODULES): | ||
211 | @echo making $@ SPI_CFG=$(SPI_CFG) CDEFS=$(CDEFS) EXCLUDES=$(EXCLUDES) | ||
212 | make -C $(IBL_ROOT)/$@/$(ARCH)/make CDEFS='$(MAINDEFS) $(SPI_CFG)' $@ | ||
213 | |||
214 | utils: | ||
215 | ifeq ($(HAS_SPI),1) | ||
216 | ifeq ($(HAS_INTERNAL_UTILS),1) | ||
217 | make -C $(IBL_ROOT)/util/spiWrite TARGET=$(TARGET) SPI_DEFS='$(SPI_DEFS)' MAINDEFS='$(MAINDEFS) $(SPI_CFG)' $(TARGET) | ||
218 | make -C $(IBL_ROOT)/util/spiConfig TARGET=$(TARGET) SPI_DEFS='$(SPI_DEFS)' MAINDEFS='$(MAINDEFS) $(SPI_CFG)' $(TARGET) | ||
219 | endif | ||
220 | endif | ||
221 | make -C $(IBL_ROOT)/util/btoccs | ||
222 | make -C $(IBL_ROOT)/util/romparse TARGET=$(TARGET) | ||
223 | ifeq ($(HAS_I2C),1) | ||
224 | ifeq ($(HAS_INTERNAL_UTILS),1) | ||
225 | make -C $(IBL_ROOT)/util/i2cRead TARGET=$(TARGET) $(TARGET) | ||
226 | make -C $(IBL_ROOT)/util/i2cWrite TARGET=$(TARGET) I2C_SIZE_BYTES=$(I2C_SIZE_BYTES) MAINDEFS='$(MAINDEFS) $(SPI_CFG)' $(TARGET) | ||
227 | endif | ||
228 | make -C $(IBL_ROOT)/util/i2cConfig $(TARGET) MAINDEFS='$(MAINDEFS) $(SPI_CFG)' | ||
229 | endif | ||
230 | make -C $(IBL_ROOT)/util/bconvert | ||
231 | |||
232 | clean: $(CLEAN_MODULES) hwClean | ||
233 | |||
234 | |||
235 | $(CLEAN_MODULES): | ||
236 | @echo cleaning $(subst clean_, ,$@) | ||
237 | make -C $(IBL_ROOT)/$(subst clean_,,$@)/$(ARCH)/make clean ARCH=c64x TARGET=$(TARGET) | ||
238 | |||
239 | hwClean: | ||
240 | @echo cleaning hw | ||
241 | make -C $(IBL_ROOT)/hw/$(ARCH)/make cleant ARCH=$(ARCH) TARGET=$(TARGET) | ||
242 | |||
243 | cleant: | ||
244 | rm -rf ibl_$(TARGET)/ibl_$(TARGET).be.out | ||
245 | rm -rf ibl_$(TARGET)/ibl_$(TARGET).le.out | ||
246 | rm -rf ibl_$(TARGET)/ibl_$(TARGET).be.map | ||
247 | rm -rf ibl_$(TARGET)/ibl_$(TARGET).le.map | ||
248 | rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.map | ||
249 | rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.out | ||
250 | rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.be.map | ||
251 | rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.be.out | ||
252 | rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.le.map | ||
253 | rm -rf ibl_$(TARGET)/ibl_$(TARGET)_init.le.out | ||
254 | rm -rf ibl_$(TARGET)/ibl_$(TARGET).out | ||
255 | rm -rf ibl_$(TARGET)/ibl_$(TARGET).map | ||
256 | rm -rf ibl_$(TARGET)/ibl_le.b | ||
257 | rm -rf ibl_$(TARGET)/ibl.b | ||
258 | rm -rf ibl_$(TARGET)/ibl.i2c.b | ||
259 | rm -rf ibl_$(TARGET)/ibl.i2c.be.ccs | ||
260 | rm -rf ibl_$(TARGET)/ibl.i2c.le.ccs | ||
261 | rm -rf ibl_$(TARGET)/ibl_init.i2c.be.ccs | ||
262 | rm -rf ibl_$(TARGET)/ibl_init.i2c.le.ccs | ||
263 | rm -rf ibl_$(TARGET)/ibl_init.le.ccs | ||
264 | rm -rf ibl_$(TARGET)/ibl_init.be.ccs | ||
265 | rm -rf ibl_$(TARGET)/i2crom*.ccs | ||
266 | rm -rf ibl_$(TARGET)/i2crom*.dat | ||
267 | rm -rf ibl_$(TARGET)/i2crom*.bin | ||
268 | rm -rf ibl_$(TARGET)/i2crom*.map.pp | ||
269 | rm -rf ibl_$(TARGET)/ibl_init_objs.inc | ||
270 | rm -rf ibl_$(TARGET)/ibl_init_objs.pp | ||
271 | rm -rf ibl_$(TARGET)/ibl_init_symbols.inc | ||
272 | rm -rf ibl_$(TARGET)/ibl_objs.inc | ||
273 | rm -rf ibl_$(TARGET)/ibl_objs.pp | ||
274 | rm -rf ibl_$(TARGET)/ibl_objs.tmp | ||
275 | rm -rf ibl_$(TARGET)/spiRom*.dat | ||
276 | rm -rf ibl_$(TARGET)/spiRom*.map.pp | ||
277 | |||
278 | |||
279 | |||
280 | |||
281 | |||
282 | |||
283 | |||
284 | |||
diff --git a/boot_loader/IBL_release_info.txt b/boot_loader/IBL_release_info.txt deleted file mode 100644 index 678089a..0000000 --- a/boot_loader/IBL_release_info.txt +++ /dev/null | |||
@@ -1,34 +0,0 @@ | |||
1 | ===================================================== | ||
2 | C6x Bootloader Release Note | ||
3 | Version: 1.0.0.4 | ||
4 | May 2011 | ||
5 | ===================================================== | ||
6 | |||
7 | 1) Supported TARGETS: | ||
8 | - C6455 | ||
9 | - C6472 | ||
10 | - C6474 | ||
11 | - C661x | ||
12 | |||
13 | 2) Supported ENDIAN | ||
14 | - big | ||
15 | - little | ||
16 | |||
17 | 3) Required toolset | ||
18 | - TI CGEN compiler CGT_C6000_7.2.0 | ||
19 | |||
20 | 4) Build Instructions | ||
21 | |||
22 | - Change directory to ibl\src\make | ||
23 | - Modify the environment setup script to match the tool chain installation | ||
24 | directory: | ||
25 | For building in MINGW-MSYS Bash shell modify setupenvMsys.sh | ||
26 | For building in Linux Bash shell modify setupenvLnx.sh | ||
27 | - Set the environment by running "setupenv.bat" or "source setupenvMsys.sh" | ||
28 | - For building run: | ||
29 | make evm_c667x_i2c ENDIAN=little I2C_BUS_ADDR=0x51 INTERNAL_UTILS=no | ||
30 | or: | ||
31 | make <TARGET> ENDIAN=[little|big] | ||
32 | make c6455 ENDIAN=liitle | ||
33 | make c6455 ENDIAN=big | ||
34 | |||
diff --git a/boot_loader/IBL_setupenvMsys.sh b/boot_loader/IBL_setupenvMsys.sh deleted file mode 100644 index 66855aa..0000000 --- a/boot_loader/IBL_setupenvMsys.sh +++ /dev/null | |||
@@ -1,15 +0,0 @@ | |||
1 | #!/bin/bash | ||
2 | |||
3 | # Environment setup to be done if using MSYS Bash shell for build | ||
4 | |||
5 | # Specify the base directory of the c6000 compiler with UNIX style path separator | ||
6 | export C6X_BASE_DIR='"C:/Program Files/Texas Instruments/ccsv5/tools/compiler/c6000"' | ||
7 | |||
8 | # Specify the base directory of the c6000 compiler in format understandable by the MSYS Bash shell | ||
9 | export C6X_BASE_DIR_MSYS=/c/Program\ Files/Texas\ Instruments/ccsv5/tools/compiler/c6000 | ||
10 | |||
11 | # Don't modify the below variables. They are derived from the above definitions | ||
12 | export PATH=$PATH:$C6X_BASE_DIR_MSYS/bin | ||
13 | export TOOLSC6X=$C6X_BASE_DIR | ||
14 | export TOOLSC6XDOS=$C6X_BASE_DIR | ||
15 | |||
diff --git a/boot_loader/MAD_README.txt b/boot_loader/MAD_README.txt deleted file mode 100644 index d1ce5e5..0000000 --- a/boot_loader/MAD_README.txt +++ /dev/null | |||
@@ -1,85 +0,0 @@ | |||
1 | Tools required to build MAD loader on Windows environment: | ||
2 | MinGW MSYS v1.0.11 (http://downloads.sourceforge.net/mingw/MSYS-1.0.11.exe) | ||
3 | |||
4 | Steps to build MAD loader: | ||
5 | 1. Go to mad-utils\mad-loader directory, and modify the MYSYSPATH in setupenv.bat if necessary to set up the right tools path | ||
6 | 2. Run "setupenv.bat" | ||
7 | 3. Run ". ./buildmad" under bash command prompt, the buildmad script will build the MAD loader library/application and example applications | ||
8 | |||
9 | |||
10 | Contents: | ||
11 | ./examples: This folder contains example applications and DSO(s) for testing the MAD flow | ||
12 | ./mal: This folder contains the source for MAD loader library and the loader application | ||
13 | ./nmlLoader: This folder contains the source for the no man's land loader(NML). NML is a | ||
14 | sub-component of the MAD loader and resides in a reserved virtual address space. | ||
15 | |||
16 | Build instructions: | ||
17 | NOTE FOR BUILDING ON WINDOWS ENVIRONMENT: For building on windows environment GNU utilities like | ||
18 | "make" would be required. The following build procedure should also work on Cygwin or MINGW-MSYS Bourne shell. | ||
19 | |||
20 | Before starting the build following environment setup has to be done | ||
21 | 1) variable C_DIR should be set to the top directory of the Code Generation tools e.g. | ||
22 | Linux bash shell: | ||
23 | export C_DIR=/opt/TI/TI_CGT_C6000_7.2.0A10232/ | ||
24 | MSYS bash shell: | ||
25 | export C_DIR='"C:/Program Files/Texas Instruments/ccsv5/tools/compiler/c6000"' | ||
26 | 2) Code Generation tool binaries should be in the path e.g. | ||
27 | Linux bash shell: | ||
28 | export PATH=/opt/TI/TI_CGT_C6000_7.2.0A10232/bin:$PATH | ||
29 | MSYS bash shell: | ||
30 | export PATH=$PATH:/c/Program\ Files/Texas\ Instruments/ccsv5/tools/compiler/c6000/bin/ | ||
31 | |||
32 | Example applications: | ||
33 | Each of the applications have a makefile which should be used to build the application. | ||
34 | make DEVICE=<device number> | ||
35 | supported device numbers are | ||
36 | C6472 (Tomahawk) | ||
37 | C6616 (Nyquist) | ||
38 | C6678 (Tomahawk) | ||
39 | |||
40 | MAD loader library: | ||
41 | The makefile for building the MAD loader library is in the directory "mal/malLib/build" | ||
42 | Following are the steps to build the MAD loader library: | ||
43 | cd mal/malLib/build | ||
44 | make DEVICE=<device number> | ||
45 | supported device numbers are | ||
46 | C6472 (Tomahawk) | ||
47 | C6616 (Nyquist) | ||
48 | C6678 (Tomahawk) | ||
49 | |||
50 | MAD loader application: | ||
51 | The makefile for building the MAD loader library is in the directory "mal/malApp/build" | ||
52 | NOTE: The MAD loader library has to be built prior to building MAD loader App | ||
53 | Following are the steps to build the MAD loader library: | ||
54 | cd mal/malApp/build | ||
55 | make DEVICE=<device number> | ||
56 | supported device numbers are | ||
57 | C6472 (Tomahawk) | ||
58 | C6616 (Nyquist) | ||
59 | C6678 (Tomahawk) | ||
60 | |||
61 | NOTE: MAD loader application needs to be XIP in DDR. The linker command file "lnk_<device number>.cmd" | ||
62 | is used to ensure that the MAD loader app is bound to XIP address in DDR. | ||
63 | |||
64 | NML: | ||
65 | The makefile for building the NML is in the directory "nmlLoader/build" | ||
66 | Following are the steps to build NML: | ||
67 | cd nmlLoader/build | ||
68 | make DEVICE=<device number> | ||
69 | supported device numbers are | ||
70 | C6472 (Tomahawk) | ||
71 | C6616 (Nyquist) | ||
72 | C6678 (Tomahawk) | ||
73 | |||
74 | NOTE: Since NML is XIP in DDR, it has to be ensured that the NML code segments are bound to virtual address | ||
75 | which is XIP in DDR. NML is a part of the ROM file system loaded on DDR. if the offset of the | ||
76 | NML ELF file changes in the ROM file system, then this address needs to be modified. This can happen | ||
77 | if the size of the MAD loader application changes. | ||
78 | To get the current offset of NML in ROM file system, do a trial run of the MAP tool, | ||
79 | MAP tool will create a file ./tmp/fsOffsets.txt. This file will list the offset of all the | ||
80 | files in the filesystem. | ||
81 | The linker command file "lnk_<device number>.cmd" is used to ensure that the NML is bound to XIP address in DDR. | ||
82 | NOTE: NML also needs RW area for stack and global variables. By default the linker command file has been setup | ||
83 | to allocate the RW area towards the end of DDR memory. This should be changed by the user according to the | ||
84 | target execution environment. | ||
85 | |||
diff --git a/boot_loader/MAD_buildmad b/boot_loader/MAD_buildmad index 3ab2f51..59cc900 100644 --- a/boot_loader/MAD_buildmad +++ b/boot_loader/MAD_buildmad | |||
@@ -1,7 +1,7 @@ | |||
1 | export C_DIR='"C:/Program Files/Texas Instruments/ccsv5/tools/compiler/c6000"' | 1 | export C_DIR='"C:/Program Files/Texas Instruments/ccsv5/tools/compiler/c6000"' |
2 | export PATH=$PATH:/c/Program\ Files/Texas\ Instruments/ccsv5/tools/compiler/c6000/bin/ | 2 | export PATH=$PATH:/c/Program\ Files/Texas\ Instruments/ccsv5/tools/compiler/c6000/bin/ |
3 | 3 | ||
4 | cd mal/malLib/build | 4 | cd mad-utils/mad-loader/mal/malLib/build |
5 | make DEVICE=C6678 | 5 | make DEVICE=C6678 |
6 | 6 | ||
7 | cd ../../malApp/build | 7 | cd ../../malApp/build |
@@ -19,5 +19,5 @@ make DEVICE=C6678 | |||
19 | cd ../app_2 | 19 | cd ../app_2 |
20 | make DEVICE=C6678 | 20 | make DEVICE=C6678 |
21 | 21 | ||
22 | cd ../../ | 22 | cd ../../../../ |
23 | 23 | ||
diff --git a/boot_loader/MAD_setupenv.bat b/boot_loader/MAD_setupenv.bat deleted file mode 100644 index daa1d9a..0000000 --- a/boot_loader/MAD_setupenv.bat +++ /dev/null | |||
@@ -1,4 +0,0 @@ | |||
1 | set MYSYSPATH=c:/msys/1.0/bin | ||
2 | |||
3 | %MYSYSPATH%/bash | ||
4 | |||
diff --git a/boot_loader/boot_loader.zip b/boot_loader/boot_loader.zip deleted file mode 100644 index d6f3ec1..0000000 --- a/boot_loader/boot_loader.zip +++ /dev/null | |||
Binary files differ | |||
diff --git a/boot_loader/examples/i2c/emac/docs/README.txt b/boot_loader/examples/i2c/emac/docs/README.txt index c637ccc..0c0f0d0 100644 --- a/boot_loader/examples/i2c/emac/docs/README.txt +++ b/boot_loader/examples/i2c/emac/docs/README.txt | |||
@@ -24,7 +24,7 @@ Steps to run i2cemacboot in CCSv5: | |||
24 | 5. Run the program in CCS, i2cemacboot will send the hello world booting info to both the CCS console and the | 24 | 5. Run the program in CCS, i2cemacboot will send the hello world booting info to both the CCS console and the |
25 | Hyper Terminal. | 25 | Hyper Terminal. |
26 | 26 | ||
27 | Steps to program i2cemacboot to EMAC: | 27 | Steps to boot i2cemacboot from EMAC: |
28 | 28 | ||
29 | 1. Be sure IBL is programmed to I2C EEPROM bus address 81 (0x51), if IBL is not programmed, refer to | 29 | 1. Be sure IBL is programmed to I2C EEPROM bus address 81 (0x51), if IBL is not programmed, refer to |
30 | tools\boot_loader\ibl\doc\README.txt on how to program the IBL to EEPROM. | 30 | tools\boot_loader\ibl\doc\README.txt on how to program the IBL to EEPROM. |
@@ -39,21 +39,15 @@ Steps to program i2cemacboot to EMAC: | |||
39 | b. Re-program the boot configuration table, refer to tools\boot_loader\ibl\doc\README.txt on how to program | 39 | b. Re-program the boot configuration table, refer to tools\boot_loader\ibl\doc\README.txt on how to program |
40 | the boot configuration table to EEPROM. | 40 | the boot configuration table to EEPROM. |
41 | 41 | ||
42 | 3. Copy tools\boot_loader\examples\i2c\emac\evmc66xxl\bin\i2cemacboot_evm66xxl.out to tools\bin2ccs and rename | 42 | 3. Start a TFTP server (you can download a free, open source application from http://tftpd32.jounin.net) and copy |
43 | the file to app.out. | 43 | tools\boot_loader\examples\i2c\emac\evmc66xxl\bin\i2cemacboot_evm66xxl.out to the TFTP base directory, rename |
44 | i2cemacboot_evm66xxl.out to app.out. | ||
44 | 45 | ||
45 | 4. Double click bin2ccs.bat, which will convert app.out to a CCS format data file app.dat. | 46 | 4. Set the IP address of the PC that is running the TFTP server to 192.168.2.101, since by default IBL will set the EVM |
46 | |||
47 | 5. Start a TFTP server (you can download a free, open source application from http://tftpd32.jounin.net) and copy | ||
48 | app.dat to the TFTP base directory. | ||
49 | |||
50 | 6. Set the IP address of the PC that is running the TFTP server to 192.168.2.101, since by default IBL will set the EVM | ||
51 | IP address to 192.168.2.100 and the TFTP server IP address to 192.168.2.101. | 47 | IP address to 192.168.2.100 and the TFTP server IP address to 192.168.2.101. |
52 | 48 | ||
53 | 7. Set the boot dip switches to I2C master mode, bus address 81 (0x51) and boot parameter index to be 4. | 49 | 5. Set the boot dip switches to I2C master mode, bus address 81 (0x51) and boot parameter index to be 4. |
54 | 50 | ||
55 | 8. Be sure the EVM and the PC are connected in the same subnet of a local network, after POR, IBL will download the | 51 | 6. Be sure the EVM and the PC are connected in the same subnet of a local network, after POR, IBL will download the |
56 | boot image from TFTP server and boot from it. By default IBL will boot an ELF format image, if user wants to boot | 52 | boot image from TFTP server and boot from it. |
57 | an image of other formats, he/she needs to change the boot configuration table accordingly, and re-program the table | ||
58 | to the EEPROM. | ||
59 | 53 | ||
diff --git a/boot_loader/tools_build.bat b/boot_loader/tools_build.bat new file mode 100644 index 0000000..989d897 --- /dev/null +++ b/boot_loader/tools_build.bat | |||
@@ -0,0 +1,10 @@ | |||
1 | t:\gen\msys\1.0\bin\bash IBL_buildibl | ||
2 | |||
3 | t:\gen\msys\1.0\bin\bash MAD_buildmad | ||
4 | |||
5 | |||
6 | |||
7 | |||
8 | |||
9 | |||
10 | |||
diff --git a/boot_loader/tools_install.bat b/boot_loader/tools_install.bat index 0fbf0d4..c3aef59 100644 --- a/boot_loader/tools_install.bat +++ b/boot_loader/tools_install.bat | |||
@@ -1,19 +1,3 @@ | |||
1 | mv -f IBL_release_info.txt ibl\doc\release_info.txt | ||
2 | mv -f IBL_README.txt ibl\doc\README.txt | ||
3 | mv -f IBL_setupenvMsys.sh ibl\src\make\setupenvMsys.sh | ||
4 | mv -f IBL_Makefile ibl\src\make\Makefile | ||
5 | mv -f IBL_makestg1 ibl\src\make\makestg1 | ||
6 | mv -f IBL_makestg2 ibl\src\make\makestg2 | ||
7 | |||
8 | rm -f -r ibl\src\util\spiWrite | ||
9 | rm -f -r ibl\src\util\i2cRead | ||
10 | rm -f -r ibl\src\util\i2cWrite | ||
11 | rm -f -r ibl\src\util\nandwriter | ||
12 | rm -f -r ibl\src\util\spiConfig | ||
13 | |||
14 | mv -f MAD_README.txt mad-utils\mad-loader\README.txt | ||
15 | mv -f MAD_setupenv.bat mad-utils\mad-loader\setupenv.bat | ||
16 | mv -f MAD_buildmad mad-utils\mad-loader\buildmad | ||
17 | mv -f MAD_UG.doc mad-utils\MAD_UG.doc | 1 | mv -f MAD_UG.doc mad-utils\MAD_UG.doc |
18 | 2 | ||
19 | 3 | ||
diff --git a/post/docs/README.txt b/post/docs/README.txt index 523905b..7ba3937 100644 --- a/post/docs/README.txt +++ b/post/docs/README.txt | |||
@@ -46,10 +46,11 @@ Steps to program POST to EEPROM: | |||
46 | to I2C EEPROM slave bus address 80 (0x50), below are the steps how to program the EEPROM using the EEPROM writer utility: | 46 | to I2C EEPROM slave bus address 80 (0x50), below are the steps how to program the EEPROM using the EEPROM writer utility: |
47 | 47 | ||
48 | * Copy post_i2crom.dat to tools\writer\eeprom\evmc66xxl\bin directory and rename it to "app.dat". | 48 | * Copy post_i2crom.dat to tools\writer\eeprom\evmc66xxl\bin directory and rename it to "app.dat". |
49 | * Change bus_addr to "80" (0x50) in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt and save the file. | 49 | * Change bus_addr to "80" (0x50) and swap_data to "0" in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt and save the file. |
50 | * Refer to tools\writer\eeprom\evmc66xxl\docs\README.txt on how to program the CCS data file to EEPROM. | 50 | * Refer to tools\writer\eeprom\evmc66xxl\docs\README.txt on how to program the CCS data file to EEPROM. |
51 | 51 | ||
52 | 4. Once the programming is completed successfully, user can set the boot mode to I2C mode with bus address 0x50 and | 52 | 4. Once the programming is completed successfully, user can set the boot mode to I2C mode with bus address 0x50 and |
53 | boot the POST directly from the EEPROM after POR. The boot status and test result can be monitored using the Hyper | 53 | boot the POST directly from the EEPROM after POR. The boot status and test result can be monitored using the Hyper |
54 | Terminal as mentioned in "Steps to run POST in CCSv5". | 54 | Terminal as mentioned in "Steps to run POST in CCSv5". |
55 | 55 | ||
56 | Please refer to BIOS MCSDK 2.0 User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide) for more details. \ No newline at end of file | ||
diff --git a/writer/eeprom/docs/README.txt b/writer/eeprom/docs/README.txt index d943dc1..ba45959 100644 --- a/writer/eeprom/docs/README.txt +++ b/writer/eeprom/docs/README.txt | |||
@@ -6,21 +6,22 @@ Steps to program the EEPROM: | |||
6 | 6 | ||
7 | 1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM. | 7 | 1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM. |
8 | 8 | ||
9 | 2. Copy the CCS format data file to tools\writer\eeprom\evmc66xxl\bin directory, and rename it to app.dat. | 9 | 2. Copy the CCS format data file to writer\eeprom\evmc66xxl\bin directory, and rename it to app.dat. |
10 | 10 | ||
11 | 3. Change the file_name, bus_addr and start_addr in tools\writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt if necessary. | 11 | 3. Change the file_name, bus_addr, start_addr and swap_data in writer\eeprom\evmc66xxl\bin\eepromwriter_input.txt if necessary. |
12 | By default the EEPROM writer will load app.dat to DSP memory and write the data to I2C slave | 12 | By default the EEPROM writer will load app.dat to DSP memory and write the data to I2C slave |
13 | bus address 81 (0x51) at EEPROM device start byte address 0. | 13 | bus address 81 (0x51) at EEPROM device start byte address 0 with data swap disabled (0). |
14 | 14 | ||
15 | 4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0. | 15 | 4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0. |
16 | 16 | ||
17 | 5. Load the program tools\writer\eeprom\evmc66xxl\bin\eepromwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS. | 17 | 5. Load the program writer\eeprom\evmc66xxl\bin\eepromwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS |
18 | and DDR is intialized. | ||
18 | 19 | ||
19 | 6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. | 20 | 6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. |
20 | 21 | ||
21 | 7. Load app.dat to 0x80000000: | 22 | 7. Load app.dat to 0x80000000: |
22 | * In CCSv5, right click mouse in memory window, select "load memory". | 23 | * In CCSv5, right click mouse in memory window, select "load memory". |
23 | * Browse and select tools\writer\eeprom\evmc66xxl\bin\app.dat. | 24 | * Browse and select writer\eeprom\evmc66xxl\bin\app.dat. |
24 | * Select the option "Use the file header information to set the start address and size of the memory block to be | 25 | * Select the option "Use the file header information to set the start address and size of the memory block to be |
25 | loaded" and click "next". | 26 | loaded" and click "next". |
26 | * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". | 27 | * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". |
@@ -34,10 +35,12 @@ Steps to program the EEPROM: | |||
34 | 35 | ||
35 | Steps to re-build eepromwriter: | 36 | Steps to re-build eepromwriter: |
36 | 37 | ||
37 | 1. Import the eepromwriter CCS project from tools\writer\eeprom\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/ | 38 | 1. Import the eepromwriter CCS project from writer\eeprom\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/ |
38 | CCE Eclipse Projects). | 39 | CCE Eclipse Projects). |
39 | 40 | ||
40 | 2. Clean and build the eepromwriter project. | 41 | 2. Clean and build the eepromwriter project. |
41 | 42 | ||
42 | 3. After the project build is completed, eepromwriter_evm66xxl.out and eepromwriter_evm66xxl.map will be generated under | 43 | 3. After the project build is completed, eepromwriter_evm66xxl.out and eepromwriter_evm66xxl.map will be generated under |
43 | tools\writer\eeprom\evmc66xxl\bin directory. | 44 | writer\eeprom\evmc66xxl\bin directory. |
45 | |||
46 | Please refer to BIOS MCSDK 2.0 User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide) for more details. \ No newline at end of file | ||
diff --git a/writer/eeprom/evmc6670l/bin/eepromwriter_input.txt b/writer/eeprom/evmc6670l/bin/eepromwriter_input.txt index 87b047b..40c14f0 100644 --- a/writer/eeprom/evmc6670l/bin/eepromwriter_input.txt +++ b/writer/eeprom/evmc6670l/bin/eepromwriter_input.txt | |||
@@ -1,6 +1,7 @@ | |||
1 | file_name = app.dat | 1 | file_name = app.dat |
2 | bus_addr = 81 | 2 | bus_addr = 81 |
3 | start_addr = 0 | 3 | start_addr = 0 |
4 | swap_data = 0 | ||
4 | 5 | ||
5 | 6 | ||
6 | 7 | ||
diff --git a/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt b/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt index 6c8e82c..54de648 100644 --- a/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt +++ b/writer/eeprom/evmc6678l/bin/eepromwriter_input.txt | |||
@@ -1,6 +1,7 @@ | |||
1 | file_name = app.dat | 1 | file_name = app.dat |
2 | bus_addr = 80 | 2 | bus_addr = 81 |
3 | start_addr = 0 | 3 | start_addr = 0 |
4 | swap_data = 1 | ||
4 | 5 | ||
5 | 6 | ||
6 | 7 | ||
diff --git a/writer/eeprom/src/eepromwriter.c b/writer/eeprom/src/eepromwriter.c index b22c292..ec6cadc 100644 --- a/writer/eeprom/src/eepromwriter.c +++ b/writer/eeprom/src/eepromwriter.c | |||
@@ -56,6 +56,7 @@ char *input_file = "eepromwriter_input.txt"; | |||
56 | #define FILE_NAME "file_name" | 56 | #define FILE_NAME "file_name" |
57 | #define BUS_ADDR "bus_addr" | 57 | #define BUS_ADDR "bus_addr" |
58 | #define START_ADDR "start_addr" | 58 | #define START_ADDR "start_addr" |
59 | #define SWAP_DATA "swap_data" | ||
59 | 60 | ||
60 | /* Memory address to store the write data */ | 61 | /* Memory address to store the write data */ |
61 | #define WRITE_DATA_ADDRESS 0x80000000 | 62 | #define WRITE_DATA_ADDRESS 0x80000000 |
@@ -72,6 +73,7 @@ typedef struct EEPROM_WRITER_INFO_tag | |||
72 | char file_name[MAX_LINE_LENGTH]; /* CCS format data file name */ | 73 | char file_name[MAX_LINE_LENGTH]; /* CCS format data file name */ |
73 | uint32_t busAddr; /* Slave bus address */ | 74 | uint32_t busAddr; /* Slave bus address */ |
74 | uint32_t startAddr; /* Start address to write */ | 75 | uint32_t startAddr; /* Start address to write */ |
76 | uint32_t swapData; /* Swap byte in the 32-bit word of the data */ | ||
75 | uint32_t deviceTotalBytes; /* Total number of bytes available in the device */ | 77 | uint32_t deviceTotalBytes; /* Total number of bytes available in the device */ |
76 | uint32_t writeBytes; /* Number of bytes to be written into the device */ | 78 | uint32_t writeBytes; /* Number of bytes to be written into the device */ |
77 | uint8_t *writeData; /* Address to store the write data */ | 79 | uint8_t *writeData; /* Address to store the write data */ |
@@ -94,6 +96,33 @@ print_platform_errno | |||
94 | } | 96 | } |
95 | 97 | ||
96 | /****************************************************************************** | 98 | /****************************************************************************** |
99 | * Function: form_block | ||
100 | * | ||
101 | * Form a block of data to write to the NOR. The block is | ||
102 | * created as a byte stream from the 4 byte stream in which | ||
103 | * the MSB is always sent first. | ||
104 | ******************************************************************************/ | ||
105 | void | ||
106 | formBlock | ||
107 | ( | ||
108 | uint32_t *data, | ||
109 | uint32_t blockSize, | ||
110 | uint8_t *scratch | ||
111 | ) | ||
112 | { | ||
113 | uint32_t i, j; | ||
114 | |||
115 | /* Convert the data to a byte stream */ | ||
116 | for (i = j = 0; j < blockSize; i++, j+=4) | ||
117 | { | ||
118 | scratch[j+0] = (data[i] >> 24) & 0xff; | ||
119 | scratch[j+1] = (data[i] >> 16) & 0xff; | ||
120 | scratch[j+2] = (data[i] >> 8) & 0xff; | ||
121 | scratch[j+3] = (data[i] >> 0) & 0xff; | ||
122 | } | ||
123 | } | ||
124 | |||
125 | /****************************************************************************** | ||
97 | * Function: flash_eeprom | 126 | * Function: flash_eeprom |
98 | * | 127 | * |
99 | * Write the data from memory to EEPROM. | 128 | * Write the data from memory to EEPROM. |
@@ -106,18 +135,40 @@ flash_eeprom | |||
106 | PLATFORM_DEVICE_info *p_device | 135 | PLATFORM_DEVICE_info *p_device |
107 | ) | 136 | ) |
108 | { | 137 | { |
138 | uint8_t *scrach_block; | ||
139 | |||
109 | printf ("Writing %d bytes from DSP memory address 0x%08x to EEPROM bus address 0x%04x starting from device address 0x%04x ...\n", | 140 | printf ("Writing %d bytes from DSP memory address 0x%08x to EEPROM bus address 0x%04x starting from device address 0x%04x ...\n", |
110 | eepromWriterInfo.writeBytes, | 141 | eepromWriterInfo.writeBytes, |
111 | (uint32_t)eepromWriterInfo.writeData, | 142 | (uint32_t)eepromWriterInfo.writeData, |
112 | eepromWriterInfo.busAddr, | 143 | eepromWriterInfo.busAddr, |
113 | eepromWriterInfo.startAddr); | 144 | eepromWriterInfo.startAddr); |
114 | 145 | ||
115 | if(platform_device_write(p_device->handle, eepromWriterInfo.startAddr, eepromWriterInfo.writeData, eepromWriterInfo.writeBytes) != Platform_EOK) | 146 | if (eepromWriterInfo.swapData) |
147 | { | ||
148 | scrach_block = malloc(eepromWriterInfo.deviceTotalBytes); | ||
149 | if (scrach_block == NULL) | ||
150 | { | ||
151 | printf ("Can not allocate scratch block memory!\n"); | ||
152 | return (FALSE); | ||
153 | } | ||
154 | formBlock((uint32_t *)(eepromWriterInfo.writeData), eepromWriterInfo.deviceTotalBytes, scrach_block); | ||
155 | } | ||
156 | else | ||
157 | { | ||
158 | scrach_block = eepromWriterInfo.writeData; | ||
159 | } | ||
160 | |||
161 | if(platform_device_write(p_device->handle, eepromWriterInfo.startAddr, scrach_block, eepromWriterInfo.writeBytes) != Platform_EOK) | ||
116 | { | 162 | { |
117 | print_platform_errno(); | 163 | print_platform_errno(); |
164 | if (eepromWriterInfo.swapData) | ||
165 | free (scrach_block); | ||
118 | return FALSE; | 166 | return FALSE; |
119 | } | 167 | } |
120 | 168 | ||
169 | if(eepromWriterInfo.swapData) | ||
170 | free (scrach_block); | ||
171 | |||
121 | return TRUE; | 172 | return TRUE; |
122 | } | 173 | } |
123 | 174 | ||
@@ -134,7 +185,9 @@ flash_verify | |||
134 | PLATFORM_DEVICE_info *p_device | 185 | PLATFORM_DEVICE_info *p_device |
135 | ) | 186 | ) |
136 | { | 187 | { |
137 | uint32_t i; | 188 | uint32_t i, j; |
189 | uint8_t *scrach_block; | ||
190 | uint32_t *read_data_w; | ||
138 | 191 | ||
139 | printf ("Reading %d bytes from EEPROM bus address 0x%04x to DSP memory address 0x%08x starting from device address 0x%04x ...\n", | 192 | printf ("Reading %d bytes from EEPROM bus address 0x%04x to DSP memory address 0x%08x starting from device address 0x%04x ...\n", |
140 | eepromWriterInfo.writeBytes, | 193 | eepromWriterInfo.writeBytes, |
@@ -142,7 +195,21 @@ flash_verify | |||
142 | (uint32_t)eepromWriterInfo.readData, | 195 | (uint32_t)eepromWriterInfo.readData, |
143 | eepromWriterInfo.startAddr); | 196 | eepromWriterInfo.startAddr); |
144 | 197 | ||
145 | if(platform_device_read(p_device->handle, eepromWriterInfo.startAddr, eepromWriterInfo.readData, eepromWriterInfo.writeBytes) != Platform_EOK) | 198 | if (eepromWriterInfo.swapData) |
199 | { | ||
200 | scrach_block = malloc(eepromWriterInfo.deviceTotalBytes); | ||
201 | if (scrach_block == NULL) | ||
202 | { | ||
203 | printf ("Can not allocate scratch block memory!\n"); | ||
204 | return (FALSE); | ||
205 | } | ||
206 | } | ||
207 | else | ||
208 | { | ||
209 | scrach_block = eepromWriterInfo.readData; | ||
210 | } | ||
211 | |||
212 | if(platform_device_read(p_device->handle, eepromWriterInfo.startAddr, scrach_block, eepromWriterInfo.writeBytes) != Platform_EOK) | ||
146 | { | 213 | { |
147 | print_platform_errno(); | 214 | print_platform_errno(); |
148 | return FALSE; | 215 | return FALSE; |
@@ -150,6 +217,15 @@ flash_verify | |||
150 | 217 | ||
151 | printf ("Verifying data read ...\n"); | 218 | printf ("Verifying data read ...\n"); |
152 | 219 | ||
220 | if (eepromWriterInfo.swapData) | ||
221 | { | ||
222 | /* Convert the packed data */ | ||
223 | read_data_w = (uint32_t *)(eepromWriterInfo.readData); | ||
224 | for (i = 0, j = 0; i < eepromWriterInfo.deviceTotalBytes; i += 4) | ||
225 | read_data_w[j++] = (scrach_block[i+0] << 24) | (scrach_block[i+1] << 16) | (scrach_block[i+2] << 8) | scrach_block[i+3]; | ||
226 | } | ||
227 | |||
228 | |||
153 | for (i = 0; i < eepromWriterInfo.writeBytes; i++) | 229 | for (i = 0; i < eepromWriterInfo.writeBytes; i++) |
154 | { | 230 | { |
155 | if (eepromWriterInfo.readData[i] != eepromWriterInfo.writeData[i]) | 231 | if (eepromWriterInfo.readData[i] != eepromWriterInfo.writeData[i]) |
@@ -225,6 +301,22 @@ parse_input_file | |||
225 | 301 | ||
226 | eepromWriterInfo.startAddr = (uint32_t)atoi(data); | 302 | eepromWriterInfo.startAddr = (uint32_t)atoi(data); |
227 | 303 | ||
304 | fgets(line, MAX_LINE_LENGTH, fp); | ||
305 | key = (char *)strtok(line, tokens); | ||
306 | data = (char *)strtok(NULL, tokens); | ||
307 | |||
308 | if(strlen(data) == 0) | ||
309 | { | ||
310 | return FALSE; | ||
311 | } | ||
312 | |||
313 | if(strcmp(key, SWAP_DATA) != 0) | ||
314 | { | ||
315 | return FALSE; | ||
316 | } | ||
317 | |||
318 | eepromWriterInfo.swapData = (uint32_t)atoi(data); | ||
319 | |||
228 | return TRUE; | 320 | return TRUE; |
229 | } | 321 | } |
230 | 322 | ||
diff --git a/writer/nand/docs/README.txt b/writer/nand/docs/README.txt index 06edbe9..1f1a5f2 100644 --- a/writer/nand/docs/README.txt +++ b/writer/nand/docs/README.txt | |||
@@ -6,21 +6,22 @@ Steps to program the NAND: | |||
6 | 6 | ||
7 | 1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM. | 7 | 1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM. |
8 | 8 | ||
9 | 2. Copy the CCS format data file to tools\writer\nand\evmc66xxl\bin directory, and rename it to app.dat. | 9 | 2. Copy the CCS format data file to writer\nand\evmc66xxl\bin directory, and rename it to app.dat. |
10 | 10 | ||
11 | 3. Change the file_name and start_addr in tools\writer\nand\evmc66xxl\bin\nandwriter_input.txt if necessary. | 11 | 3. Change the file_name and start_addr in writer\nand\evmc66xxl\bin\nandwriter_input.txt if necessary. |
12 | By default the NAND writer will load app.dat to DSP memory and write the data to NAND device start byte address 16384 | 12 | By default the NAND writer will load app.dat to DSP memory and write the data to NAND device start byte address 16384 |
13 | (start address of block 1). The start_addr should always be set to the start byte addess of a block. | 13 | (start address of block 1). The start_addr should always be set to the start byte addess of a block. |
14 | 14 | ||
15 | 4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0. | 15 | 4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0. |
16 | 16 | ||
17 | 5. Load the program tools\writer\nand\evmc66xxl\bin\nandwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS, | 17 | 5. Load the program writer\nand\evmc66xxl\bin\nandwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS |
18 | and DDR is intialized. | ||
18 | 19 | ||
19 | 6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. | 20 | 6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. |
20 | 21 | ||
21 | 7. Load app.dat to 0x80000000: | 22 | 7. Load app.dat to 0x80000000: |
22 | * In CCSv5, right click mouse in memory window, select "load memory". | 23 | * In CCSv5, right click mouse in memory window, select "load memory". |
23 | * Browse and select tools\writer\nand\evmc66xxl\bin\app.dat. | 24 | * Browse and select writer\nand\evmc66xxl\bin\app.dat. |
24 | * Select the option "Use the file header information to set the start address and size of the memory block to be | 25 | * Select the option "Use the file header information to set the start address and size of the memory block to be |
25 | loaded" and click "next". | 26 | loaded" and click "next". |
26 | * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". | 27 | * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". |
@@ -34,10 +35,12 @@ Steps to program the NAND: | |||
34 | 35 | ||
35 | Steps to re-build nandwriter: | 36 | Steps to re-build nandwriter: |
36 | 37 | ||
37 | 1. Import the nandwriter CCS project from tools\writer\nand\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/ | 38 | 1. Import the nandwriter CCS project from writer\nand\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/ |
38 | CCE Eclipse Projects). | 39 | CCE Eclipse Projects). |
39 | 40 | ||
40 | 2. Clean and build the nandwriter project. | 41 | 2. Clean and build the nandwriter project. |
41 | 42 | ||
42 | 3. After the project build is completed, nandwriter_evm66xxl.out and nandwriter_evm66xxl.map will be generated under | 43 | 3. After the project build is completed, nandwriter_evm66xxl.out and nandwriter_evm66xxl.map will be generated under |
43 | tools\writer\nand\evmc66xxl\bin directory. | 44 | writer\nand\evmc66xxl\bin directory. |
45 | |||
46 | Please refer to BIOS MCSDK 2.0 User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide) for more details. \ No newline at end of file | ||
diff --git a/writer/nand/src/nandwriter.c b/writer/nand/src/nandwriter.c index f0a1919..784f357 100644 --- a/writer/nand/src/nandwriter.c +++ b/writer/nand/src/nandwriter.c | |||
@@ -47,7 +47,7 @@ | |||
47 | #include "types.h" | 47 | #include "types.h" |
48 | 48 | ||
49 | /* NAND writer utility version */ | 49 | /* NAND writer utility version */ |
50 | char version[] = "01.00.00.00"; | 50 | char version[] = "01.00.00.01"; |
51 | 51 | ||
52 | /* The input file name is hard coded */ | 52 | /* The input file name is hard coded */ |
53 | char *input_file = "nand_writer_input.txt"; | 53 | char *input_file = "nand_writer_input.txt"; |
@@ -222,6 +222,8 @@ flash_nand | |||
222 | 222 | ||
223 | printf ("Flashing block %d (%d bytes of %d)\n", block, wPos, nandWriterInfo.writeBytes); | 223 | printf ("Flashing block %d (%d bytes of %d)\n", block, wPos, nandWriterInfo.writeBytes); |
224 | 224 | ||
225 | platform_device_erase_block(p_device->handle, block); | ||
226 | |||
225 | wLen = nandWriterInfo.blockSizeBytes; | 227 | wLen = nandWriterInfo.blockSizeBytes; |
226 | if (nandWriterInfo.writeBytes - wPos < nandWriterInfo.blockSizeBytes) | 228 | if (nandWriterInfo.writeBytes - wPos < nandWriterInfo.blockSizeBytes) |
227 | { | 229 | { |
@@ -512,7 +514,7 @@ void main () | |||
512 | if (flash_nand (p_device) == FALSE) | 514 | if (flash_nand (p_device) == FALSE) |
513 | { | 515 | { |
514 | printf ("NAND write giving up\n"); | 516 | printf ("NAND write giving up\n"); |
515 | break; | 517 | return; |
516 | } | 518 | } |
517 | 519 | ||
518 | rCount += 1; | 520 | rCount += 1; |
diff --git a/writer/nor/docs/README.txt b/writer/nor/docs/README.txt index 670681d..0cfd70f 100644 --- a/writer/nor/docs/README.txt +++ b/writer/nor/docs/README.txt | |||
@@ -6,21 +6,22 @@ Steps to program the NOR: | |||
6 | 6 | ||
7 | 1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM. | 7 | 1. Be sure to set the boot mode dip switch to no boot/EMIF16 boot mode on the EVM. |
8 | 8 | ||
9 | 2. Copy the CCS format data file to tools\writer\nor\evmc66xxl\bin directory, and rename it to app.dat. | 9 | 2. Copy the CCS format data file to writer\nor\evmc66xxl\bin directory, and rename it to app.dat. |
10 | 10 | ||
11 | 3. Change the file_name and start_addr in tools\writer\nor\evmc66xxl\bin\norwriter_input.txt if necessary. | 11 | 3. Change the file_name and start_addr in writer\nor\evmc66xxl\bin\norwriter_input.txt if necessary. |
12 | By default the NOR writer will load app.dat to DSP memory and write the data to NOR device start byte address 0, | 12 | By default the NOR writer will load app.dat to DSP memory and write the data to NOR device start byte address 0, |
13 | the start_addr should always be set to the start byte addess of a sector. | 13 | the start_addr should always be set to the start byte addess of a sector. |
14 | 14 | ||
15 | 4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0. | 15 | 4. Open CCSv5 and launch the evmc66xx emulator target configuration and connect to core 0. |
16 | 16 | ||
17 | 5. Load the program tools\writer\nor\evmc66xxl\bin\norwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS. | 17 | 5. Load the program writer\nor\evmc66xxl\bin\norwriter_evm66xxl.out to CCS, be sure evmc66xxl.gel is used in CCS |
18 | and DDR is intialized. | ||
18 | 19 | ||
19 | 6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. | 20 | 6. Open the Memory view (in CCSv5, view->Memory Browser), and view the memory address 0x80000000. |
20 | 21 | ||
21 | 7. Load app.dat to 0x80000000: | 22 | 7. Load app.dat to 0x80000000: |
22 | * In CCSv5, right click mouse in memory window, select "load memory". | 23 | * In CCSv5, right click mouse in memory window, select "load memory". |
23 | * Browse and select tools\writer\nor\evmc66xxl\bin\app.dat. | 24 | * Browse and select writer\nor\evmc66xxl\bin\app.dat. |
24 | * Select the option "Use the file header information to set the start address and size of the memory block to be | 25 | * Select the option "Use the file header information to set the start address and size of the memory block to be |
25 | loaded" and click "next". | 26 | loaded" and click "next". |
26 | * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". | 27 | * Change the Start Address to "0x80000000" if it is not 0x80000000, and click "finish". |
@@ -34,10 +35,12 @@ Steps to program the NOR: | |||
34 | 35 | ||
35 | Steps to re-build norwriter: | 36 | Steps to re-build norwriter: |
36 | 37 | ||
37 | 1. Import the norwriter CCS project from tools\writer\nor\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/ | 38 | 1. Import the norwriter CCS project from writer\nor\evmc66xxl directory (in CCSv5, Project->Import Existing CCS/ |
38 | CCE Eclipse Projects). | 39 | CCE Eclipse Projects). |
39 | 40 | ||
40 | 2. Clean and build the norwriter project. | 41 | 2. Clean and build the norwriter project. |
41 | 42 | ||
42 | 3. After the project build is completed, norwriter_evm66xxl.out and norwriter_evm66xxl.map will be generated under | 43 | 3. After the project build is completed, norwriter_evm66xxl.out and norwriter_evm66xxl.map will be generated under |
43 | tools\writer\nor\evmc66xxl\bin directory. | 44 | writer\nor\evmc66xxl\bin directory. |
45 | |||
46 | Please refer to BIOS MCSDK 2.0 User's Guide (http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide) for more details. \ No newline at end of file | ||
diff --git a/writer/nor/evmc6670l/bin/nor_writer_input.txt b/writer/nor/evmc6670l/bin/nor_writer_input.txt index ced386c..74c70e6 100644 --- a/writer/nor/evmc6670l/bin/nor_writer_input.txt +++ b/writer/nor/evmc6670l/bin/nor_writer_input.txt | |||
@@ -1,5 +1,5 @@ | |||
1 | file_name = app.dat | 1 | file_name = app.dat |
2 | start_addr = 0 | 2 | start_addr = 10485760 |
3 | 3 | ||
4 | 4 | ||
5 | 5 | ||