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author | Ming Wei | 2019-05-10 15:51:02 -0500 |
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committer | Ming Wei | 2019-05-10 15:51:02 -0500 |
commit | 78c8ec002967f694aac31bec200e120fc1ed326f (patch) | |
tree | a75f8dc30b98308d9acaa0b9b857d96ee9b9e3a6 | |
parent | fe21f2adae6995df38879d7b6c31ee72664db3a7 (diff) | |
download | osal-78c8ec002967f694aac31bec200e120fc1ed326f.tar.gz osal-78c8ec002967f694aac31bec200e120fc1ed326f.tar.xz osal-78c8ec002967f694aac31bec200e120fc1ed326f.zip |
add C66x and c7x support for J721E tirtosREL.PDK.J7.00.09.00.01
Signed-off-by: Ming Wei <mwei@ti.com>
-rwxr-xr-x | osal_component.mk | 2 | ||||
-rwxr-xr-x | test/baremetal/makefile | 2 | ||||
-rw-r--r-- | test/src/main_osal_test.c | 125 | ||||
-rwxr-xr-x | test/sysbios_unit_test/makefile | 19 |
4 files changed, 142 insertions, 6 deletions
diff --git a/osal_component.mk b/osal_component.mk index 1160f0c..84439a9 100755 --- a/osal_component.mk +++ b/osal_component.mk | |||
@@ -330,7 +330,7 @@ ifeq ($(SOC),$(filter $(SOC), am65xx)) | |||
330 | endif | 330 | endif |
331 | 331 | ||
332 | ifeq ($(SOC),$(filter $(SOC), j721e)) | 332 | ifeq ($(SOC),$(filter $(SOC), j721e)) |
333 | OSAL_TestApp_$(SOC)_CORELIST = mpu1_0 mcu1_0 | 333 | OSAL_TestApp_$(SOC)_CORELIST = mpu1_0 mcu1_0 c66xdsp_1 c7x |
334 | OSAL_Baremetal_TestApp_$(SOC)_CORELIST = mpu1_0 mcu1_0 | 334 | OSAL_Baremetal_TestApp_$(SOC)_CORELIST = mpu1_0 mcu1_0 |
335 | endif | 335 | endif |
336 | 336 | ||
diff --git a/test/baremetal/makefile b/test/baremetal/makefile index 88ac023..fb373ea 100755 --- a/test/baremetal/makefile +++ b/test/baremetal/makefile | |||
@@ -23,6 +23,8 @@ INCLUDE_EXTERNAL_INTERFACES = pdk csl_arch | |||
23 | # List all the components required by the application | 23 | # List all the components required by the application |
24 | COMP_LIST_COMMON += board uart osal_nonos i2c | 24 | COMP_LIST_COMMON += board uart osal_nonos i2c |
25 | COMP_LIST_c66x = csl_intc | 25 | COMP_LIST_c66x = csl_intc |
26 | COMP_LIST_c66xdsp_1 = csl_intc | ||
27 | COMP_LIST_c66xdsp_2 = csl_intc | ||
26 | COMP_LIST_c674x = csl_intc | 28 | COMP_LIST_c674x = csl_intc |
27 | COMP_LIST_COMMON += csl | 29 | COMP_LIST_COMMON += csl |
28 | COMP_LIST_a15_0 = csl_init | 30 | COMP_LIST_a15_0 = csl_init |
diff --git a/test/src/main_osal_test.c b/test/src/main_osal_test.c index 4580dd3..234799c 100644 --- a/test/src/main_osal_test.c +++ b/test/src/main_osal_test.c | |||
@@ -43,6 +43,11 @@ | |||
43 | #include <xdc/std.h> | 43 | #include <xdc/std.h> |
44 | #if defined (SOC_J721E) | 44 | #if defined (SOC_J721E) |
45 | // workaround for A72 does not supported in SYS/BIOS yet | 45 | // workaround for A72 does not supported in SYS/BIOS yet |
46 | #if defined (BUILD_C7X_1) | ||
47 | #ifndef BARE_METAL | ||
48 | #include <ti/sysbios/family/c7x/Hwi.h> | ||
49 | #endif //BARE_METAL | ||
50 | #endif //BUILD_C7X_1 | ||
46 | #else | 51 | #else |
47 | #include <xdc/cfg/global.h> | 52 | #include <xdc/cfg/global.h> |
48 | #endif | 53 | #endif |
@@ -455,9 +460,23 @@ bool OSAL_timer_test() | |||
455 | timerParams.startMode = TimerP_StartMode_USER; | 460 | timerParams.startMode = TimerP_StartMode_USER; |
456 | timerParams.periodType = TimerP_PeriodType_MICROSECS; | 461 | timerParams.periodType = TimerP_PeriodType_MICROSECS; |
457 | timerParams.period = OSAL_TEST_TIMER_PERIOD; | 462 | timerParams.period = OSAL_TEST_TIMER_PERIOD; |
463 | |||
464 | #if defined(BUILD_C66X_1) | ||
465 | timerParams.eventId = 22; | ||
466 | id = 2; | ||
467 | timerParams.intNum = 15; | ||
468 | OSAL_log("\n set eventID=%d, intNum=%d, id=%d, \n", timerParams.eventId, timerParams.intNum, id); | ||
469 | #endif | ||
470 | #if defined(BUILD_C66X_2) | ||
471 | timerParams.eventId = 20; | ||
472 | id = 1; | ||
473 | timerParams.intNum = 12; | ||
474 | #endif | ||
458 | 475 | ||
459 | #if defined (_TMS320C6X) | 476 | #if defined(BUILD_C7X_1) |
460 | timerParams.intNum = 15; | 477 | timerParams.intNum = 15; |
478 | id = 1; | ||
479 | OSAL_log("\n set intNum=%d, id=%d, \n", timerParams.intNum, id); | ||
461 | #endif | 480 | #endif |
462 | 481 | ||
463 | if (timer_type == UT_Timer_TIMER64) | 482 | if (timer_type == UT_Timer_TIMER64) |
@@ -480,10 +499,6 @@ bool OSAL_timer_test() | |||
480 | 499 | ||
481 | #if TWO_TIMER_INTERRUPT_TEST | 500 | #if TWO_TIMER_INTERRUPT_TEST |
482 | 501 | ||
483 | #if defined (_TMS320C6X) | ||
484 | timerParams.intNum = 14; | ||
485 | #endif | ||
486 | |||
487 | if (ret == true) { | 502 | if (ret == true) { |
488 | handle2 = TimerP_create(OSAL_TEST_TIMER_ID2, (TimerP_Fxn)&timerIsr2, &timerParams); | 503 | handle2 = TimerP_create(OSAL_TEST_TIMER_ID2, (TimerP_Fxn)&timerIsr2, &timerParams); |
489 | /* don't expect the handle to be null */ | 504 | /* don't expect the handle to be null */ |
@@ -1359,6 +1374,97 @@ void osal_test(UArg arg0, UArg arg1) | |||
1359 | 1374 | ||
1360 | } | 1375 | } |
1361 | 1376 | ||
1377 | #ifdef BUILD_C7X_1 | ||
1378 | void sysIdleLoop(void) | ||
1379 | { | ||
1380 | __asm(" IDLE"); | ||
1381 | } | ||
1382 | |||
1383 | #include <ti/sysbios/family/c7x/Hwi.h> | ||
1384 | #include <ti/csl/csl_clec.h> | ||
1385 | void C7x_ConfigureTimerOutput() | ||
1386 | { | ||
1387 | CSL_ClecEventConfig cfgClec; | ||
1388 | CSL_CLEC_EVTRegs *clecBaseAddr = (CSL_CLEC_EVTRegs*)CSL_COMPUTE_CLUSTER0_CLEC_BASE; | ||
1389 | |||
1390 | uint32_t input = 1248; /* Used for Timer Interrupt */ | ||
1391 | uint32_t corepackEvent = 14; | ||
1392 | |||
1393 | /* Configure CLEC */ | ||
1394 | cfgClec.secureClaimEnable = FALSE; | ||
1395 | cfgClec.evtSendEnable = TRUE; | ||
1396 | cfgClec.rtMap = CSL_CLEC_RTMAP_C7X_ALL; | ||
1397 | cfgClec.extEvtNum = 0; | ||
1398 | cfgClec.c7xEvtNum = corepackEvent; | ||
1399 | CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec); | ||
1400 | |||
1401 | Hwi_setPriority(14, 1); | ||
1402 | |||
1403 | input = 1249; /* Used for Timer Interrupt */ | ||
1404 | corepackEvent = 15; | ||
1405 | |||
1406 | /* Configure CLEC */ | ||
1407 | cfgClec.secureClaimEnable = FALSE; | ||
1408 | cfgClec.evtSendEnable = TRUE; | ||
1409 | cfgClec.rtMap = CSL_CLEC_RTMAP_C7X_ALL; | ||
1410 | cfgClec.extEvtNum = 0; | ||
1411 | cfgClec.c7xEvtNum = corepackEvent; | ||
1412 | CSL_clecConfigEvent(clecBaseAddr, input, &cfgClec); | ||
1413 | |||
1414 | Hwi_setPriority(15, 1); | ||
1415 | } | ||
1416 | |||
1417 | #endif | ||
1418 | |||
1419 | #if defined(BUILD_C66X_1) || defined(BUILD_C66X_2) | ||
1420 | /* To set C66 timer interrupts on J7ES VLAB */ | ||
1421 | void C66xTimerInterruptInit(void) | ||
1422 | { | ||
1423 | /* | ||
1424 | * The C66 INTR_ROUTER on J7ES VLAB is not directly addressable by the | ||
1425 | * C66 core itself, so we need to use the RAT. | ||
1426 | * | ||
1427 | * RAT is hard-coded at 0x07ff0000 for J7ES C66. Choose an arbitrary | ||
1428 | * RAT entry (2nd entry) at offset 0x30. Region entries start at 0x20. | ||
1429 | */ | ||
1430 | volatile int *RAT = (volatile int *)0x07ff0030; | ||
1431 | /* Choose an arbitrary virtual address for intr_router RAT mapping */ | ||
1432 | volatile int *intr_router = (volatile int *)0x10000000; | ||
1433 | |||
1434 | /* program virtual address to REGION_BASE */ | ||
1435 | RAT[1] = (int)intr_router; | ||
1436 | /* program C66_0 INTR_ROUTER physical addr to REGION_TRANS_L */ | ||
1437 | #ifdef BUILD_C66X_1 | ||
1438 | RAT[2] = 0x00ac0000; | ||
1439 | #endif | ||
1440 | #ifdef BUILD_C66X_2 | ||
1441 | RAT[2] = 0x00ad0000; | ||
1442 | #endif | ||
1443 | /* enable region and set size to 512 B */ | ||
1444 | RAT[0] = 0x80000009; | ||
1445 | |||
1446 | /* | ||
1447 | * intr_router[12] corresponds to output event #21, which is what we | ||
1448 | * set eventId to in .cfg file. | ||
1449 | * - bit 16 enables the entry | ||
1450 | * - lower bits define input event (#0 for dmtimer #0) | ||
1451 | */ | ||
1452 | #ifdef BUILD_C66X_1 | ||
1453 | intr_router[12] = 0x00010000; | ||
1454 | intr_router[13] = 0x00010002; | ||
1455 | #endif | ||
1456 | #ifdef BUILD_C66X_2 | ||
1457 | intr_router[11] = 0x00010000; | ||
1458 | #endif | ||
1459 | } | ||
1460 | |||
1461 | void sysIdleLoop(void) | ||
1462 | { | ||
1463 | __asm(" IDLE"); | ||
1464 | } | ||
1465 | |||
1466 | #endif | ||
1467 | |||
1362 | /* | 1468 | /* |
1363 | * ======== main ======== | 1469 | * ======== main ======== |
1364 | */ | 1470 | */ |
@@ -1372,6 +1478,15 @@ int main(void) | |||
1372 | #endif | 1478 | #endif |
1373 | #endif | 1479 | #endif |
1374 | 1480 | ||
1481 | #if defined(BUILD_C66X_1) || defined(BUILD_C66X_2) | ||
1482 | /* To set C66 timer interrupts on J7ES VLAB */ | ||
1483 | C66xTimerInterruptInit(); | ||
1484 | #endif | ||
1485 | |||
1486 | #ifdef BUILD_C7X_1 | ||
1487 | C7x_ConfigureTimerOutput(); | ||
1488 | #endif | ||
1489 | |||
1375 | Board_initOSAL(); | 1490 | Board_initOSAL(); |
1376 | 1491 | ||
1377 | #ifdef BARE_METAL | 1492 | #ifdef BARE_METAL |
diff --git a/test/sysbios_unit_test/makefile b/test/sysbios_unit_test/makefile index 56485af..0d772f3 100755 --- a/test/sysbios_unit_test/makefile +++ b/test/sysbios_unit_test/makefile | |||
@@ -50,6 +50,25 @@ XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/j721e/sysbios_r5f.cfg | |||
50 | ###EXTERNAL_LNKCMD_FILE = $(PDK_INSTALL_PATH)/ti/build/j721e/linker_r5.lds | 50 | ###EXTERNAL_LNKCMD_FILE = $(PDK_INSTALL_PATH)/ti/build/j721e/linker_r5.lds |
51 | EXTERNAL_LNKCMD_FILE = $(PDK_INSTALL_PATH)/ti/build/am65xx/SIMMAXWELL.cmd | 51 | EXTERNAL_LNKCMD_FILE = $(PDK_INSTALL_PATH)/ti/build/am65xx/SIMMAXWELL.cmd |
52 | endif | 52 | endif |
53 | |||
54 | ifeq ($(CORE),$(filter $(CORE), c66xdsp_1)) | ||
55 | # Enable XDC build for application by providing XDC CFG File per core | ||
56 | XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/j721e/sysbios_c66.cfg | ||
57 | EXTERNAL_LNKCMD_FILE = $(PDK_INSTALL_PATH)/ti/build/j721e/linker_c66.lds | ||
58 | endif | ||
59 | |||
60 | ifeq ($(CORE),$(filter $(CORE), c66xdsp_2)) | ||
61 | # Enable XDC build for application by providing XDC CFG File per core | ||
62 | XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/j721e/sysbios_c66.cfg | ||
63 | EXTERNAL_LNKCMD_FILE = $(PDK_INSTALL_PATH)/ti/build/j721e/linker_c66.lds | ||
64 | endif | ||
65 | |||
66 | ifeq ($(CORE),$(filter $(CORE), c7x)) | ||
67 | # Enable XDC build for application by providing XDC CFG File per core | ||
68 | XDC_CFG_FILE_$(CORE) = $(PDK_INSTALL_PATH)/ti/build/j721e/sysbios_c7x.cfg | ||
69 | EXTERNAL_LNKCMD_FILE = $(PDK_INSTALL_PATH)/ti/build/j721e/linker_c7x.lds | ||
70 | endif | ||
71 | |||
53 | endif | 72 | endif |
54 | 73 | ||
55 | PACKAGE_SRCS_COMMON = . ../src | 74 | PACKAGE_SRCS_COMMON = . ../src |