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author | Aravind Batni | 2018-10-03 15:06:17 -0500 |
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committer | Aravind Batni | 2018-10-04 08:55:34 -0500 |
commit | 399e23c10d8e43cd45907dd0fadcba9e35604b8b (patch) | |
tree | 7668ac462b7fbfd1f65ef745aee76049b4d42e51 /RegisterIntr.h | |
parent | c143a4222ca9a4bc286010f7c783263731296d20 (diff) | |
download | osal-399e23c10d8e43cd45907dd0fadcba9e35604b8b.tar.gz osal-399e23c10d8e43cd45907dd0fadcba9e35604b8b.tar.xz osal-399e23c10d8e43cd45907dd0fadcba9e35604b8b.zip |
PRSDK-2500:address Doxygen to be created to only interface header files and eliminate source files
Signed-off-by: Aravind Batni <aravindbr@ti.com>
Diffstat (limited to 'RegisterIntr.h')
-rw-r--r-- | RegisterIntr.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/RegisterIntr.h b/RegisterIntr.h index 4e9aaee..e2b050d 100644 --- a/RegisterIntr.h +++ b/RegisterIntr.h | |||
@@ -78,7 +78,7 @@ typedef struct { | |||
78 | 78 | ||
79 | /*! | 79 | /*! |
80 | * @brief Interrupt Configuration parameters for soc mux prior to reaching the core | 80 | * @brief Interrupt Configuration parameters for soc mux prior to reaching the core |
81 | * @description This is the data structure used to configure the interrupts in the system. | 81 | * This is the data structure used to configure the interrupts in the system. |
82 | * coreConfig: This part configures the interrupt for corepac such as c66x, arm, m4 | 82 | * coreConfig: This part configures the interrupt for corepac such as c66x, arm, m4 |
83 | * socMuxConfig: This part configures the interrupt path for any SOC level mux such as CIC/GIC or cross bar, | 83 | * socMuxConfig: This part configures the interrupt path for any SOC level mux such as CIC/GIC or cross bar, |
84 | * leading up to the corepac | 84 | * leading up to the corepac |