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authorAravind Batni2016-02-05 08:43:37 -0600
committerAravind Batni2016-02-05 08:43:37 -0600
commit96a94552ac8e5995909d40c51b05f743859fdfa0 (patch)
tree6970ebd33904e230d2ec701630d7317f9ee000ae
parentbe727219f7d082e9f1c083ac116a87e2b907f84c (diff)
downloadpa-lld-96a94552ac8e5995909d40c51b05f743859fdfa0.tar.gz
pa-lld-96a94552ac8e5995909d40c51b05f743859fdfa0.tar.xz
pa-lld-96a94552ac8e5995909d40c51b05f743859fdfa0.zip
ARM RTOS Unit Test added
Diffstat
-rwxr-xr-xtest/PAUnitTest/k2e/armv7/bios/PA_UnitTest_K2EArmBiosTestProject.txt46
-rwxr-xr-xtest/PAUnitTest/k2e/armv7/bios/pa_utest_k2e.cfg148
-rwxr-xr-xtest/PAUnitTest/k2k/armv7/bios/PA_UnitTest_K2KArmBiosTestProject.txt31
-rwxr-xr-xtest/PAUnitTest/k2k/armv7/bios/pa_utest_k2k.cfg148
-rwxr-xr-xtest/PAUnitTest/k2l/armv7/bios/PA_UnitTest_K2LArmBiosTestProject.txt46
-rwxr-xr-xtest/PAUnitTest/k2l/armv7/bios/pa_utest_k2l.cfg148
6 files changed, 567 insertions, 0 deletions
diff --git a/test/PAUnitTest/k2e/armv7/bios/PA_UnitTest_K2EArmBiosTestProject.txt b/test/PAUnitTest/k2e/armv7/bios/PA_UnitTest_K2EArmBiosTestProject.txt
new file mode 100755
index 0000000..dcd80e2
--- /dev/null
+++ b/test/PAUnitTest/k2e/armv7/bios/PA_UnitTest_K2EArmBiosTestProject.txt
@@ -0,0 +1,46 @@
1-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/testutil.c"
2-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/testmem.c"
3-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/testMain.c"
4-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/framework.c"
5-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/setuprm.c"
6-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/common.c"
7-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test1.c"
8-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test2.c"
9-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test3.c"
10-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test4.c"
11-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test5.c"
12-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test6.c"
13-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test7.c"
14-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test8.c"
15-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test9.c"
16-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test10.c"
17-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test11.c"
18-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test12.c"
19-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test13.c"
20-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test14.c"
21-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test15.c"
22-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test16.c"
23-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/example/reassemLib/reassemLib.c"
24-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in0_pdsp0_bin.c"
25-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in0_pdsp1_bin.c"
26-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in1_pdsp0_bin.c"
27-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in1_pdsp1_bin.c"
28-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in2_pdsp0_bin.c"
29-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in3_pdsp0_bin.c"
30-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in4_pdsp0_bin.c"
31-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in4_pdsp1_bin.c"
32-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_post_pdsp0_bin.c"
33-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_post_pdsp1_bin.c"
34-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg0_pdsp0_bin.c"
35-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg0_pdsp1_bin.c"
36-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg0_pdsp2_bin.c"
37-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg1_pdsp0_bin.c"
38-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg2_pdsp0_bin.c"
39-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/device/k2e/src/cppi_device.c"
40-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/device/k2e/src/qmss_device.c"
41-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2e/policy_dsp-only.c"
42-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2e/policy_dsp_arm.c"
43-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2e/global-resource-list.c"
44-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/k2e/armv7/bios/pa_utest_k2e.cfg"
45-ccs.setCompilerOptions "-c -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -DSOC_K2E -DNSS_GEN2 -DNUM_PORTS=5 -g -gstrict-dwarf -Wall -MMD -MP -I${PDK_INSTALL_PATH} -I${PDK_INSTALL_PATH}/ti/drv/pa/test/PAUnitTest/src -I${PASS_INSTALL_PATH}/ti/drv/pa/test/PAUnitTest/src/tests -I${PASS_INSTALL_PATH}/ti/drv/pa/example/reassemLib -I${PASS_INSTALL_PATH}/ti/drv/pa/example/emacExample/src/armv7/bios -I${PDK_INSTALL_PATH}/ti/drv/cppi -I${PDK_INSTALL_PATH}/ti/drv/qmss" -rtsc.enableRtsc
46-ccs.setLinkerOptions " -lrdimon -lgcc -lm -lnosys -nostartfiles -static -Wl,--gc-sections -L$(XDCTOOLS)/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/fpu "
diff --git a/test/PAUnitTest/k2e/armv7/bios/pa_utest_k2e.cfg b/test/PAUnitTest/k2e/armv7/bios/pa_utest_k2e.cfg
new file mode 100755
index 0000000..222e141
--- /dev/null
+++ b/test/PAUnitTest/k2e/armv7/bios/pa_utest_k2e.cfg
@@ -0,0 +1,148 @@
1/*
2 * Copyright 2015 by Texas Instruments Incorporated.
3 *
4 * All rights reserved. Property of Texas Instruments Incorporated.
5 * Restricted rights to use, duplicate or disclose this code are
6 * granted through contract.
7 *
8 */
9
10/*
11 * ======== pa_utest_k2h.cfg ========
12 *
13 */
14
15var Memory = xdc.useModule('xdc.runtime.Memory');
16var BIOS = xdc.useModule('ti.sysbios.BIOS');
17var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
18var Task = xdc.useModule('ti.sysbios.knl.Task');
19var Idle = xdc.useModule('ti.sysbios.knl.Idle');
20var Swi = xdc.useModule('ti.sysbios.knl.Swi');
21var Clock = xdc.useModule('ti.sysbios.knl.Clock');
22var Event = xdc.useModule('ti.sysbios.knl.Event');
23var Mailbox = xdc.useModule('ti.sysbios.knl.Mailbox');
24var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
25var Log = xdc.useModule('xdc.runtime.Log');
26var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
27var Main = xdc.useModule('xdc.runtime.Main');
28var Defaults = xdc.useModule('xdc.runtime.Defaults');
29var Diags = xdc.useModule('xdc.runtime.Diags');
30var SysMin = xdc.useModule('xdc.runtime.SysMin');
31var System = xdc.useModule('xdc.runtime.System');
32var Text = xdc.useModule('xdc.runtime.Text');
33
34/* Load the CPPI package */
35var Cppi = xdc.loadPackage('ti.drv.cppi');
36/* Load the QMSS package */
37var Qmss = xdc.loadPackage('ti.drv.qmss');
38
39var devType = "k2e"
40var Pa = xdc.useModule('ti.drv.pa.Settings');
41Pa.deviceType = devType;
42
43/* Load the RM package */
44var Rm = xdc.loadPackage('ti.drv.rm');
45
46Clock.timerId = -1;
47Task.defaultStackSize = 4096 * 4;
48
49/*
50 * Program.argSize sets the size of the .args section.
51 * The examples don't use command line args so argSize is set to 0.
52 */
53Program.argSize = 0x0;
54
55/*
56 * The BIOS module will create the default heap for the system.
57 * Specify the size of this default heap.
58 */
59BIOS.heapSize = 0x10000;
60
61/*
62 * Build a custom SYS/BIOS library from sources.
63 */
64BIOS.libType = BIOS.LibType_Custom;
65
66/* System stack size (used by ISRs and Swis) */
67Program.stack = 0x20000;
68
69/* Circular buffer size for System_printf() */
70SysMin.bufSize = 0x400;
71
72/*
73 * Create and install logger for the whole system
74 */
75var loggerBufParams = new LoggerBuf.Params();
76loggerBufParams.numEntries = 32;
77var logger0 = LoggerBuf.create(loggerBufParams);
78Defaults.common$.logger = logger0;
79Main.common$.diags_INFO = Diags.ALWAYS_ON;
80
81System.SupportProxy = SysMin;
82var SemiHost = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');
83
84var Cache = xdc.useModule('ti.sysbios.family.arm.a15.Cache');
85var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu');
86
87/* Enable the cache */
88Cache.enableCache = true;
89
90// Enable the MMU (Required for L1/L2 data caching)
91Mmu.enableMMU = true;
92
93// descriptor attribute structure
94var peripheralAttrs = new Mmu.DescriptorAttrs();
95
96Mmu.initDescAttrsMeta(peripheralAttrs);
97
98peripheralAttrs.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor
99peripheralAttrs.noExecute = true; // not executable
100peripheralAttrs.accPerm = 0; // read/write at PL1
101peripheralAttrs.attrIndx = 1; // MAIR0 Byte1 describes
102 // memory attributes for
103// Define the base address of the 2 MB page
104// the peripheral resides in.
105var peripheralBaseAddrs = [
106 { base: 0x02620000, size: 0x00001000 }, // bootcfg
107 { base: 0x0bc00000, size: 0x00100000 }, // MSMC config
108 { base: 0x24000000, size: 0x01000000 }, // NETCP memory
109 { base: 0x02a00000, size: 0x00100000 }, // QMSS config memory
110 { base: 0x23A00000, size: 0x00100000 }, // QMSS Data memory
111 { base: 0x02901000, size: 0x00002000 }, // SRIO pkt dma config memory
112 { base: 0x01f14000, size: 0x00007000 }, // AIF pkt dma config memory
113 { base: 0x021F0200, size: 0x00000600 }, // FFTC 0 pkt dma config memory
114 { base: 0x021F0a00, size: 0x00000600 }, // FFTC 4 pkt dma config memory
115 { base: 0x021F1200, size: 0x00000600 }, // FFTC 5 pkt dma config memory
116 { base: 0x021F4200, size: 0x00000600 }, // FFTC 1 pkt dma config memory
117 { base: 0x021F8200, size: 0x00000600 }, // FFTC 2 pkt dma config memory
118 { base: 0x021FC200, size: 0x00000600 }, // FFTC 3 pkt dma config memory
119 { base: 0x02554000, size: 0x00009000 } // BCP pkt dma config memory
120];
121
122// Configure the corresponding MMU page descriptor accordingly
123for (var i =0; i < peripheralBaseAddrs.length; i++)
124{
125 for (var j = 0; j < peripheralBaseAddrs[i].size; j += 0x200000)
126 {
127 var addr = peripheralBaseAddrs[i].base + j;
128 Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
129 }
130}
131
132// Reconfigure DDR to use coherent address
133Mmu.initDescAttrsMeta(peripheralAttrs);
134
135peripheralAttrs.type = Mmu.DescriptorType_BLOCK;
136peripheralAttrs.shareable = 2; // outer-shareable (3=inner, 0=none)
137peripheralAttrs.accPerm = 1; // read/write at any privelege level
138peripheralAttrs.attrIndx = 2; // normal cacheable (0=no cache, 1=strict order)
139for (var vaddr = 0x80000000, paddr = 0x800000000; vaddr < 0x100000000; vaddr += 0x200000, paddr+= 0x200000)
140{
141 Mmu.setSecondLevelDescMeta(vaddr, paddr, peripheralAttrs);
142}
143// Add MSMC as coherent
144for (var addr = 0x0c000000; addr < 0x0c600000; addr += 0x200000)
145{
146 Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
147}
148
diff --git a/test/PAUnitTest/k2k/armv7/bios/PA_UnitTest_K2KArmBiosTestProject.txt b/test/PAUnitTest/k2k/armv7/bios/PA_UnitTest_K2KArmBiosTestProject.txt
new file mode 100755
index 0000000..62d38b3
--- /dev/null
+++ b/test/PAUnitTest/k2k/armv7/bios/PA_UnitTest_K2KArmBiosTestProject.txt
@@ -0,0 +1,31 @@
1-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/testutil.c"
2-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/testmem.c"
3-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/testMain.c"
4-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/framework.c"
5-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/setuprm.c"
6-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/common.c"
7-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test1.c"
8-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test2.c"
9-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test3.c"
10-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test4.c"
11-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test5.c"
12-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test6.c"
13-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test7.c"
14-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test8.c"
15-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test9.c"
16-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test10.c"
17-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test11.c"
18-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/example/reassemLib/reassemLib.c"
19-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v0/classify1_0_bin.c"
20-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v0/classify1_1_bin.c"
21-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v0/classify1_2_bin.c"
22-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v0/classify2_bin.c"
23-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v0/pam_bin.c"
24-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/device/k2k/src/cppi_device.c"
25-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/device/k2k/src/qmss_device.c"
26-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2k/policy_dsp-only.c"
27-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2k/policy_dsp_arm.c"
28-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2k/global-resource-list.c"
29-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/k2k/armv7/bios/pa_utest_k2k.cfg"
30-ccs.setCompilerOptions "-c -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -DSOC_K2K -DNUM_PORTS=5 -g -gstrict-dwarf -Wall -MMD -MP -I${PDK_INSTALL_PATH} -I${PDK_INSTALL_PATH}/ti/drv/pa/test/PAUnitTest/src -I${PASS_INSTALL_PATH}/ti/drv/pa/test/PAUnitTest/src/tests -I${PASS_INSTALL_PATH}/ti/drv/pa/example/reassemLib -I${PASS_INSTALL_PATH}/ti/drv/pa/example/emacExample/src/armv7/bios -I${PDK_INSTALL_PATH}/ti/drv/cppi -I${PDK_INSTALL_PATH}/ti/drv/qmss" -rtsc.enableRtsc
31-ccs.setLinkerOptions " -lrdimon -lgcc -lm -lnosys -nostartfiles -static -Wl,--gc-sections -L$(XDCTOOLS)/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/fpu "
diff --git a/test/PAUnitTest/k2k/armv7/bios/pa_utest_k2k.cfg b/test/PAUnitTest/k2k/armv7/bios/pa_utest_k2k.cfg
new file mode 100755
index 0000000..0c2c23a
--- /dev/null
+++ b/test/PAUnitTest/k2k/armv7/bios/pa_utest_k2k.cfg
@@ -0,0 +1,148 @@
1/*
2 * Copyright 2015 by Texas Instruments Incorporated.
3 *
4 * All rights reserved. Property of Texas Instruments Incorporated.
5 * Restricted rights to use, duplicate or disclose this code are
6 * granted through contract.
7 *
8 */
9
10/*
11 * ======== pa_utest_k2h.cfg ========
12 *
13 */
14
15var Memory = xdc.useModule('xdc.runtime.Memory');
16var BIOS = xdc.useModule('ti.sysbios.BIOS');
17var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
18var Task = xdc.useModule('ti.sysbios.knl.Task');
19var Idle = xdc.useModule('ti.sysbios.knl.Idle');
20var Swi = xdc.useModule('ti.sysbios.knl.Swi');
21var Clock = xdc.useModule('ti.sysbios.knl.Clock');
22var Event = xdc.useModule('ti.sysbios.knl.Event');
23var Mailbox = xdc.useModule('ti.sysbios.knl.Mailbox');
24var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
25var Log = xdc.useModule('xdc.runtime.Log');
26var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
27var Main = xdc.useModule('xdc.runtime.Main');
28var Defaults = xdc.useModule('xdc.runtime.Defaults');
29var Diags = xdc.useModule('xdc.runtime.Diags');
30var SysMin = xdc.useModule('xdc.runtime.SysMin');
31var System = xdc.useModule('xdc.runtime.System');
32var Text = xdc.useModule('xdc.runtime.Text');
33
34/* Load the CPPI package */
35var Cppi = xdc.loadPackage('ti.drv.cppi');
36/* Load the QMSS package */
37var Qmss = xdc.loadPackage('ti.drv.qmss');
38
39var devType = "k2k"
40var Pa = xdc.useModule('ti.drv.pa.Settings');
41Pa.deviceType = devType;
42
43/* Load the RM package */
44var Rm = xdc.loadPackage('ti.drv.rm');
45
46Clock.timerId = -1;
47Task.defaultStackSize = 4096 * 4;
48
49/*
50 * Program.argSize sets the size of the .args section.
51 * The examples don't use command line args so argSize is set to 0.
52 */
53Program.argSize = 0x0;
54
55/*
56 * The BIOS module will create the default heap for the system.
57 * Specify the size of this default heap.
58 */
59BIOS.heapSize = 0x10000;
60
61/*
62 * Build a custom SYS/BIOS library from sources.
63 */
64BIOS.libType = BIOS.LibType_Custom;
65
66/* System stack size (used by ISRs and Swis) */
67Program.stack = 0x20000;
68
69/* Circular buffer size for System_printf() */
70SysMin.bufSize = 0x400;
71
72/*
73 * Create and install logger for the whole system
74 */
75var loggerBufParams = new LoggerBuf.Params();
76loggerBufParams.numEntries = 32;
77var logger0 = LoggerBuf.create(loggerBufParams);
78Defaults.common$.logger = logger0;
79Main.common$.diags_INFO = Diags.ALWAYS_ON;
80
81System.SupportProxy = SysMin;
82var SemiHost = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');
83
84var Cache = xdc.useModule('ti.sysbios.family.arm.a15.Cache');
85var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu');
86
87/* Enable the cache */
88Cache.enableCache = true;
89
90// Enable the MMU (Required for L1/L2 data caching)
91Mmu.enableMMU = true;
92
93// descriptor attribute structure
94var peripheralAttrs = new Mmu.DescriptorAttrs();
95
96Mmu.initDescAttrsMeta(peripheralAttrs);
97
98peripheralAttrs.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor
99peripheralAttrs.noExecute = true; // not executable
100peripheralAttrs.accPerm = 0; // read/write at PL1
101peripheralAttrs.attrIndx = 1; // MAIR0 Byte1 describes
102 // memory attributes for
103// Define the base address of the 2 MB page
104// the peripheral resides in.
105var peripheralBaseAddrs = [
106 { base: 0x02620000, size: 0x00001000 }, // bootcfg
107 { base: 0x0bc00000, size: 0x00100000 }, // MSMC config
108 { base: 0x02000000, size: 0x00100000 }, // NETCP memory
109 { base: 0x02a00000, size: 0x00100000 }, // QMSS config memory
110 { base: 0x23A00000, size: 0x00100000 }, // QMSS Data memory
111 { base: 0x02901000, size: 0x00002000 }, // SRIO pkt dma config memory
112 { base: 0x01f14000, size: 0x00007000 }, // AIF pkt dma config memory
113 { base: 0x021F0200, size: 0x00000600 }, // FFTC 0 pkt dma config memory
114 { base: 0x021F0a00, size: 0x00000600 }, // FFTC 4 pkt dma config memory
115 { base: 0x021F1200, size: 0x00000600 }, // FFTC 5 pkt dma config memory
116 { base: 0x021F4200, size: 0x00000600 }, // FFTC 1 pkt dma config memory
117 { base: 0x021F8200, size: 0x00000600 }, // FFTC 2 pkt dma config memory
118 { base: 0x021FC200, size: 0x00000600 }, // FFTC 3 pkt dma config memory
119 { base: 0x02554000, size: 0x00009000 } // BCP pkt dma config memory
120];
121
122// Configure the corresponding MMU page descriptor accordingly
123for (var i =0; i < peripheralBaseAddrs.length; i++)
124{
125 for (var j = 0; j < peripheralBaseAddrs[i].size; j += 0x200000)
126 {
127 var addr = peripheralBaseAddrs[i].base + j;
128 Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
129 }
130}
131
132// Reconfigure DDR to use coherent address
133Mmu.initDescAttrsMeta(peripheralAttrs);
134
135peripheralAttrs.type = Mmu.DescriptorType_BLOCK;
136peripheralAttrs.shareable = 2; // outer-shareable (3=inner, 0=none)
137peripheralAttrs.accPerm = 1; // read/write at any privelege level
138peripheralAttrs.attrIndx = 2; // normal cacheable (0=no cache, 1=strict order)
139for (var vaddr = 0x80000000, paddr = 0x800000000; vaddr < 0x100000000; vaddr += 0x200000, paddr+= 0x200000)
140{
141 Mmu.setSecondLevelDescMeta(vaddr, paddr, peripheralAttrs);
142}
143// Add MSMC as coherent
144for (var addr = 0x0c000000; addr < 0x0c600000; addr += 0x200000)
145{
146 Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
147}
148
diff --git a/test/PAUnitTest/k2l/armv7/bios/PA_UnitTest_K2LArmBiosTestProject.txt b/test/PAUnitTest/k2l/armv7/bios/PA_UnitTest_K2LArmBiosTestProject.txt
new file mode 100755
index 0000000..ac47e6d
--- /dev/null
+++ b/test/PAUnitTest/k2l/armv7/bios/PA_UnitTest_K2LArmBiosTestProject.txt
@@ -0,0 +1,46 @@
1-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/testutil.c"
2-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/testmem.c"
3-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/testMain.c"
4-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/armv7/bios/framework.c"
5-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/setuprm.c"
6-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/common/common.c"
7-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test1.c"
8-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test2.c"
9-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test3.c"
10-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test4.c"
11-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test5.c"
12-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test6.c"
13-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test7.c"
14-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test8.c"
15-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test9.c"
16-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test10.c"
17-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test11.c"
18-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test12.c"
19-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test13.c"
20-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test14.c"
21-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test15.c"
22-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/src/tests/test16.c"
23-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/example/reassemLib/reassemLib.c"
24-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in0_pdsp0_bin.c"
25-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in0_pdsp1_bin.c"
26-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in1_pdsp0_bin.c"
27-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in1_pdsp1_bin.c"
28-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in2_pdsp0_bin.c"
29-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in3_pdsp0_bin.c"
30-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in4_pdsp0_bin.c"
31-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_in4_pdsp1_bin.c"
32-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_post_pdsp0_bin.c"
33-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_post_pdsp1_bin.c"
34-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg0_pdsp0_bin.c"
35-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg0_pdsp1_bin.c"
36-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg0_pdsp2_bin.c"
37-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg1_pdsp0_bin.c"
38-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/fw/v1/pa2_eg2_pdsp0_bin.c"
39-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/cppi/device/k2l/src/cppi_device.c"
40-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/qmss/device/k2l/src/qmss_device.c"
41-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2l/policy_dsp-only.c"
42-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2l/policy_dsp_arm.c"
43-ccs.linkFile "PDK_INSTALL_PATH/ti/drv/rm/device/k2l/global-resource-list.c"
44-ccs.linkFile "PASS_INSTALL_PATH/ti/drv/pa/test/PAUnitTest/k2l/armv7/bios/pa_utest_k2l.cfg"
45-ccs.setCompilerOptions "-c -mcpu=cortex-a15 -mtune=cortex-a15 -marm -mfloat-abi=hard -DSOC_K2L -DNSS_GEN2 -DNUM_PORTS=5 -g -gstrict-dwarf -Wall -MMD -MP -I${PDK_INSTALL_PATH} -I${PDK_INSTALL_PATH}/ti/drv/pa/test/PAUnitTest/src -I${PASS_INSTALL_PATH}/ti/drv/pa/test/PAUnitTest/src/tests -I${PASS_INSTALL_PATH}/ti/drv/pa/example/reassemLib -I${PASS_INSTALL_PATH}/ti/drv/pa/example/emacExample/src/armv7/bios -I${PDK_INSTALL_PATH}/ti/drv/cppi -I${PDK_INSTALL_PATH}/ti/drv/qmss" -rtsc.enableRtsc
46-ccs.setLinkerOptions " -lrdimon -lgcc -lm -lnosys -nostartfiles -static -Wl,--gc-sections -L$(XDCTOOLS)/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/fpu "
diff --git a/test/PAUnitTest/k2l/armv7/bios/pa_utest_k2l.cfg b/test/PAUnitTest/k2l/armv7/bios/pa_utest_k2l.cfg
new file mode 100755
index 0000000..73f25f0
--- /dev/null
+++ b/test/PAUnitTest/k2l/armv7/bios/pa_utest_k2l.cfg
@@ -0,0 +1,148 @@
1/*
2 * Copyright 2015 by Texas Instruments Incorporated.
3 *
4 * All rights reserved. Property of Texas Instruments Incorporated.
5 * Restricted rights to use, duplicate or disclose this code are
6 * granted through contract.
7 *
8 */
9
10/*
11 * ======== pa_utest_k2h.cfg ========
12 *
13 */
14
15var Memory = xdc.useModule('xdc.runtime.Memory');
16var BIOS = xdc.useModule('ti.sysbios.BIOS');
17var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
18var Task = xdc.useModule('ti.sysbios.knl.Task');
19var Idle = xdc.useModule('ti.sysbios.knl.Idle');
20var Swi = xdc.useModule('ti.sysbios.knl.Swi');
21var Clock = xdc.useModule('ti.sysbios.knl.Clock');
22var Event = xdc.useModule('ti.sysbios.knl.Event');
23var Mailbox = xdc.useModule('ti.sysbios.knl.Mailbox');
24var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
25var Log = xdc.useModule('xdc.runtime.Log');
26var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
27var Main = xdc.useModule('xdc.runtime.Main');
28var Defaults = xdc.useModule('xdc.runtime.Defaults');
29var Diags = xdc.useModule('xdc.runtime.Diags');
30var SysMin = xdc.useModule('xdc.runtime.SysMin');
31var System = xdc.useModule('xdc.runtime.System');
32var Text = xdc.useModule('xdc.runtime.Text');
33
34/* Load the CPPI package */
35var Cppi = xdc.loadPackage('ti.drv.cppi');
36/* Load the QMSS package */
37var Qmss = xdc.loadPackage('ti.drv.qmss');
38
39var devType = "k2l"
40var Pa = xdc.useModule('ti.drv.pa.Settings');
41Pa.deviceType = devType;
42
43/* Load the RM package */
44var Rm = xdc.loadPackage('ti.drv.rm');
45
46Clock.timerId = -1;
47Task.defaultStackSize = 4096 * 4;
48
49/*
50 * Program.argSize sets the size of the .args section.
51 * The examples don't use command line args so argSize is set to 0.
52 */
53Program.argSize = 0x0;
54
55/*
56 * The BIOS module will create the default heap for the system.
57 * Specify the size of this default heap.
58 */
59BIOS.heapSize = 0x10000;
60
61/*
62 * Build a custom SYS/BIOS library from sources.
63 */
64BIOS.libType = BIOS.LibType_Custom;
65
66/* System stack size (used by ISRs and Swis) */
67Program.stack = 0x20000;
68
69/* Circular buffer size for System_printf() */
70SysMin.bufSize = 0x400;
71
72/*
73 * Create and install logger for the whole system
74 */
75var loggerBufParams = new LoggerBuf.Params();
76loggerBufParams.numEntries = 32;
77var logger0 = LoggerBuf.create(loggerBufParams);
78Defaults.common$.logger = logger0;
79Main.common$.diags_INFO = Diags.ALWAYS_ON;
80
81System.SupportProxy = SysMin;
82var SemiHost = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');
83
84var Cache = xdc.useModule('ti.sysbios.family.arm.a15.Cache');
85var Mmu = xdc.useModule('ti.sysbios.family.arm.a15.Mmu');
86
87/* Enable the cache */
88Cache.enableCache = true;
89
90// Enable the MMU (Required for L1/L2 data caching)
91Mmu.enableMMU = true;
92
93// descriptor attribute structure
94var peripheralAttrs = new Mmu.DescriptorAttrs();
95
96Mmu.initDescAttrsMeta(peripheralAttrs);
97
98peripheralAttrs.type = Mmu.DescriptorType_BLOCK; // BLOCK descriptor
99peripheralAttrs.noExecute = true; // not executable
100peripheralAttrs.accPerm = 0; // read/write at PL1
101peripheralAttrs.attrIndx = 1; // MAIR0 Byte1 describes
102 // memory attributes for
103// Define the base address of the 2 MB page
104// the peripheral resides in.
105var peripheralBaseAddrs = [
106 { base: 0x02620000, size: 0x00001000 }, // bootcfg
107 { base: 0x0bc00000, size: 0x00100000 }, // MSMC config
108 { base: 0x26000000, size: 0x01000000 }, // NETCP memory
109 { base: 0x02a00000, size: 0x00100000 }, // QMSS config memory
110 { base: 0x23A00000, size: 0x00100000 }, // QMSS Data memory
111 { base: 0x02901000, size: 0x00002000 }, // SRIO pkt dma config memory
112 { base: 0x01f14000, size: 0x00007000 }, // AIF pkt dma config memory
113 { base: 0x021F0200, size: 0x00000600 }, // FFTC 0 pkt dma config memory
114 { base: 0x021F0a00, size: 0x00000600 }, // FFTC 4 pkt dma config memory
115 { base: 0x021F1200, size: 0x00000600 }, // FFTC 5 pkt dma config memory
116 { base: 0x021F4200, size: 0x00000600 }, // FFTC 1 pkt dma config memory
117 { base: 0x021F8200, size: 0x00000600 }, // FFTC 2 pkt dma config memory
118 { base: 0x021FC200, size: 0x00000600 }, // FFTC 3 pkt dma config memory
119 { base: 0x02554000, size: 0x00009000 } // BCP pkt dma config memory
120];
121
122// Configure the corresponding MMU page descriptor accordingly
123for (var i =0; i < peripheralBaseAddrs.length; i++)
124{
125 for (var j = 0; j < peripheralBaseAddrs[i].size; j += 0x200000)
126 {
127 var addr = peripheralBaseAddrs[i].base + j;
128 Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
129 }
130}
131
132// Reconfigure DDR to use coherent address
133Mmu.initDescAttrsMeta(peripheralAttrs);
134
135peripheralAttrs.type = Mmu.DescriptorType_BLOCK;
136peripheralAttrs.shareable = 2; // outer-shareable (3=inner, 0=none)
137peripheralAttrs.accPerm = 1; // read/write at any privelege level
138peripheralAttrs.attrIndx = 2; // normal cacheable (0=no cache, 1=strict order)
139for (var vaddr = 0x80000000, paddr = 0x800000000; vaddr < 0x100000000; vaddr += 0x200000, paddr+= 0x200000)
140{
141 Mmu.setSecondLevelDescMeta(vaddr, paddr, peripheralAttrs);
142}
143// Add MSMC as coherent
144for (var addr = 0x0c000000; addr < 0x0c600000; addr += 0x200000)
145{
146 Mmu.setSecondLevelDescMeta(addr, addr, peripheralAttrs);
147}
148
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