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authorEric Ruei2017-10-31 10:51:42 -0500
committerEric Ruei2017-10-31 10:51:42 -0500
commit5f24617e71670f17ee9adf71d5b30dc8ff9e5ca3 (patch)
treeaacee6df184fdcd0cd5e23286a229c8ce6eead33
parent12cf2064c93b9ec980eb5012218ae88cd993b96a (diff)
parentea3cd03d1fdfd6d9111c4fa89995ff66d55f0024 (diff)
downloadpa-lld-5f24617e71670f17ee9adf71d5b30dc8ff9e5ca3.tar.gz
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Merge pull request #7 in PROCESSOR-SDK/pa-lld from review_PRSDK-3155 to masterDEV.PA_LLD.03.00.02.05
* commit 'ea3cd03d1fdfd6d9111c4fa89995ff66d55f0024': PRSDK-3155: fixed PA download firmware not to use memcpy as memcpy can be byte copy which fails for Pa firmware download
-rw-r--r--docs/ReleaseNotes_PA_LLD.docbin736768 -> 741376 bytes
-rw-r--r--docs/ReleaseNotes_PA_LLD.pdfbin951667 -> 1238779 bytes
-rw-r--r--package.xdc2
-rw-r--r--paver.h4
-rw-r--r--src/v0/pa.c11
-rw-r--r--src/v1/pa.c271
6 files changed, 150 insertions, 138 deletions
diff --git a/docs/ReleaseNotes_PA_LLD.doc b/docs/ReleaseNotes_PA_LLD.doc
index 0343ea6..b49f773 100644
--- a/docs/ReleaseNotes_PA_LLD.doc
+++ b/docs/ReleaseNotes_PA_LLD.doc
Binary files differ
diff --git a/docs/ReleaseNotes_PA_LLD.pdf b/docs/ReleaseNotes_PA_LLD.pdf
index 2edadc3..556c76f 100644
--- a/docs/ReleaseNotes_PA_LLD.pdf
+++ b/docs/ReleaseNotes_PA_LLD.pdf
Binary files differ
diff --git a/package.xdc b/package.xdc
index 80b9085..da9520d 100644
--- a/package.xdc
+++ b/package.xdc
@@ -9,7 +9,7 @@
9 * Copyright (C) 2009-2017, Texas Instruments, Inc. 9 * Copyright (C) 2009-2017, Texas Instruments, Inc.
10 *****************************************************************************/ 10 *****************************************************************************/
11 11
12package ti.drv.pa[3,0,2,4] { 12package ti.drv.pa[3,0,2,5] {
13 module Settings; 13 module Settings;
14} 14}
15 15
diff --git a/paver.h b/paver.h
index 08a696e..ad37d11 100644
--- a/paver.h
+++ b/paver.h
@@ -51,13 +51,13 @@ extern "C" {
51 * format: 51 * format:
52 * 0xAABBCCDD -> Arch (AA); API Changes (BB); Major (CC); Minor (DD) 52 * 0xAABBCCDD -> Arch (AA); API Changes (BB); Major (CC); Minor (DD)
53 */ 53 */
54#define PA_LLD_VERSION_ID (0x03000204) 54#define PA_LLD_VERSION_ID (0x03000205)
55 55
56/** 56/**
57 * @brief This is the version string which describes the PA LLD along with the 57 * @brief This is the version string which describes the PA LLD along with the
58 * date and build information. 58 * date and build information.
59 */ 59 */
60#define PA_LLD_VERSION_STR "PA LLD Revision: 03.00.02.04" 60#define PA_LLD_VERSION_STR "PA LLD Revision: 03.00.02.05"
61 61
62 62
63#ifdef __cplusplus 63#ifdef __cplusplus
diff --git a/src/v0/pa.c b/src/v0/pa.c
index ef985b5..076167e 100644
--- a/src/v0/pa.c
+++ b/src/v0/pa.c
@@ -7066,7 +7066,9 @@ paReturn_t Pa_downloadImage (Pa_Handle iHandle, int modId, void* image, int size
7066 paInst_t *paInst = (paInst_t *) pa_CONV_OFFSET_TO_BASE(paLObj.cfg.instPoolBaseAddr, iHandle); 7066 paInst_t *paInst = (paInst_t *) pa_CONV_OFFSET_TO_BASE(paLObj.cfg.instPoolBaseAddr, iHandle);
7067 CSL_Pa_ssRegs *passRegs; 7067 CSL_Pa_ssRegs *passRegs;
7068 paReturn_t ret = pa_OK; 7068 paReturn_t ret = pa_OK;
7069 uint32_t mtCsKey; 7069 uint32_t mtCsKey;
7070 volatile uint32_t *src, *dst;
7071 uint32_t i;
7070 7072
7071 /* Check for PA Base address null configurations */ 7073 /* Check for PA Base address null configurations */
7072 if (paLObj.cfg.baseAddr == (uint32_t) NULL) 7074 if (paLObj.cfg.baseAddr == (uint32_t) NULL)
@@ -7124,7 +7126,12 @@ paReturn_t Pa_downloadImage (Pa_Handle iHandle, int modId, void* image, int size
7124 } 7126 }
7125 7127
7126 /* Copy the image */ 7128 /* Copy the image */
7127 memcpy ((void *)(passRegs->PDSP_IRAM[modId].PDSP_RAM), image, sizeBytes); 7129 src = (uint32_t *) image;
7130 dst = (uint32_t *) passRegs->PDSP_IRAM[modId].PDSP_RAM;
7131 for ( i = 0; i < (sizeBytes/4); i++)
7132 {
7133 dst[i] = src[i];
7134 }
7128 7135
7129 /* Initialize the programmable constant registers C24-31 */ 7136 /* Initialize the programmable constant registers C24-31 */
7130 passRegs->PDSP_CTLSTAT[modId].PDSP_CONSTANT_TABLE_BLOCK_INDEX_0 = pap_pdsp_const_reg_map[modId][PA_PDSP_CONST_REG_INDEX_C25_C24]; 7137 passRegs->PDSP_CTLSTAT[modId].PDSP_CONSTANT_TABLE_BLOCK_INDEX_0 = pap_pdsp_const_reg_map[modId][PA_PDSP_CONST_REG_INDEX_C25_C24];
diff --git a/src/v1/pa.c b/src/v1/pa.c
index 7bef36a..04e0f0a 100644
--- a/src/v1/pa.c
+++ b/src/v1/pa.c
@@ -423,57 +423,57 @@ static int pa_verify_usr_stats(paInst_t *paInst, int32_t cntIndex, int fCache)
423 } 423 }
424 return (ret); 424 return (ret);
425} /* pa_verify_usr_stats */ 425} /* pa_verify_usr_stats */
426 426
427/******************************************************************************************* 427/*******************************************************************************************
428 * FUNCTION PURPOSE: Derive the destination queue Id 428 * FUNCTION PURPOSE: Derive the destination queue Id
429 ******************************************************************************************* 429 *******************************************************************************************
430 * DESCRIPTION: This function is used to derive the destination queue Id with the embedded 430 * DESCRIPTION: This function is used to derive the destination queue Id with the embedded
431 * control bits based on the input queue Id, the Queue Bounce configuration 431 * control bits based on the input queue Id, the Queue Bounce configuration
432 * and the traffic class associated with the originated API. 432 * and the traffic class associated with the originated API.
433 * 433 *
434 * return queueId with embedded control bits 434 * return queueId with embedded control bits
435 * 435 *
436 ********************************************************************************************/ 436 ********************************************************************************************/
437static uint16_t pa_convert_queue_id(paInst_t *paInst, int routingClass, uint16_t queue) 437static uint16_t pa_convert_queue_id(paInst_t *paInst, int routingClass, uint16_t queue)
438{ 438{
439 paQueueBounceConfig_t* pQueueBounceCfg = &paInst->cfg.queueBounceConfig; 439 paQueueBounceConfig_t* pQueueBounceCfg = &paInst->cfg.queueBounceConfig;
440 uint16_t queueBounceCtrlType = queue >> pa_QUEUE_BOUNCE_CTRL_LOC; 440 uint16_t queueBounceCtrlType = queue >> pa_QUEUE_BOUNCE_CTRL_LOC;
441 uint16_t queueNum = queue & pa_QUEUE_BOUNCE_QUEUE_MASK; 441 uint16_t queueNum = queue & pa_QUEUE_BOUNCE_QUEUE_MASK;
442 442
443 if (!pQueueBounceCfg->enable) 443 if (!pQueueBounceCfg->enable)
444 { 444 {
445 return(queueNum); 445 return(queueNum);
446 } 446 }
447 447
448 if ((queueNum >= pQueueBounceCfg->hwQueueBegin) && 448 if ((queueNum >= pQueueBounceCfg->hwQueueBegin) &&
449 (queueNum <= pQueueBounceCfg->hwQueueEnd)) 449 (queueNum <= pQueueBounceCfg->hwQueueEnd))
450 { 450 {
451 /* It is a hardware queue, queue bounce is not required */ 451 /* It is a hardware queue, queue bounce is not required */
452 return(queueNum); 452 return(queueNum);
453 } 453 }
454 454
455 if (queueBounceCtrlType == pa_QUEUE_BOUNCE_CTRL_DEFAULT) 455 if (queueBounceCtrlType == pa_QUEUE_BOUNCE_CTRL_DEFAULT)
456 { 456 {
457 /* 457 /*
458 * Error check is not required here because routingClass is set by internal 458 * Error check is not required here because routingClass is set by internal
459 * function and the range check of default operation mode has been performed 459 * function and the range check of default operation mode has been performed
460 * at Queue Bounce Configuration time 460 * at Queue Bounce Configuration time
461 */ 461 */
462 uint16_t defOp = pQueueBounceCfg->defOp[routingClass]; 462 uint16_t defOp = pQueueBounceCfg->defOp[routingClass];
463 463
464 return(queueNum | (defOp << pa_QUEUE_BOUNCE_CTRL_LOC)); 464 return(queueNum | (defOp << pa_QUEUE_BOUNCE_CTRL_LOC));
465 } 465 }
466 else if ((queueBounceCtrlType == pa_QUEUE_BOUNCE_CTRL_DDR) || 466 else if ((queueBounceCtrlType == pa_QUEUE_BOUNCE_CTRL_DDR) ||
467 (queueBounceCtrlType == pa_QUEUE_BOUNCE_CTRL_MSMC)) 467 (queueBounceCtrlType == pa_QUEUE_BOUNCE_CTRL_MSMC))
468 { 468 {
469 return(queue); 469 return(queue);
470 } 470 }
471 else /* pa_QUEUE_BOUNCE_CTRL_NONE */ 471 else /* pa_QUEUE_BOUNCE_CTRL_NONE */
472 { 472 {
473 return(queueNum); 473 return(queueNum);
474 } 474 }
475} 475}
476 476
477/************************************************************************* 477/*************************************************************************
478 * FUNCTION PURPOSE: Convert RouteInfo 478 * FUNCTION PURPOSE: Convert RouteInfo
479 ************************************************************************* 479 *************************************************************************
@@ -730,7 +730,7 @@ static paReturn_t pa_conv_routing_info2 (paInst_t *paInst, pafrmForward_t *fwdIn
730 uint8_t psFlags = 0; 730 uint8_t psFlags = 0;
731 uint8_t *pCmd = fwdInfo->u.host.cmd; 731 uint8_t *pCmd = fwdInfo->u.host.cmd;
732 int fcmdSetNotSupport = FALSE; 732 int fcmdSetNotSupport = FALSE;
733 uint16_t queue = routeInfo->queue; 733 uint16_t queue = routeInfo->queue;
734 734
735 if ((routeInfo->dest == pa_DEST_HOST) || (routeInfo->dest == pa_DEST_EMAC)) { 735 if ((routeInfo->dest == pa_DEST_HOST) || (routeInfo->dest == pa_DEST_EMAC)) {
736 if (routeInfo->validBitMap & pa_ROUTE_INFO_VALID_PKTTYPE_EMAC) 736 if (routeInfo->validBitMap & pa_ROUTE_INFO_VALID_PKTTYPE_EMAC)
@@ -751,12 +751,12 @@ static paReturn_t pa_conv_routing_info2 (paInst_t *paInst, pafrmForward_t *fwdIn
751 if(routeInfo->priorityType == pa_ROUTE_PRIORITY_VLAN) 751 if(routeInfo->priorityType == pa_ROUTE_PRIORITY_VLAN)
752 { 752 {
753 fwdInfo->u.host.ctrlBitMap |= PAFRM_ROUTING_PRIORITY_VLAN_ENABLE; 753 fwdInfo->u.host.ctrlBitMap |= PAFRM_ROUTING_PRIORITY_VLAN_ENABLE;
754 routingClass = pa_QUEUE_BOUNCE_ROUTING_CLASS_QoS; 754 routingClass = pa_QUEUE_BOUNCE_ROUTING_CLASS_QoS;
755 } 755 }
756 else if(routeInfo->priorityType == pa_ROUTE_PRIORITY_DSCP) 756 else if(routeInfo->priorityType == pa_ROUTE_PRIORITY_DSCP)
757 { 757 {
758 fwdInfo->u.host.ctrlBitMap |= PAFRM_ROUTING_PRIORITY_DSCP_ENABLE; 758 fwdInfo->u.host.ctrlBitMap |= PAFRM_ROUTING_PRIORITY_DSCP_ENABLE;
759 routingClass = pa_QUEUE_BOUNCE_ROUTING_CLASS_QoS; 759 routingClass = pa_QUEUE_BOUNCE_ROUTING_CLASS_QoS;
760 } 760 }
761 else if (routeInfo->priorityType == pa_ROUTE_INTF) 761 else if (routeInfo->priorityType == pa_ROUTE_INTF)
762 { 762 {
@@ -778,7 +778,7 @@ static paReturn_t pa_conv_routing_info2 (paInst_t *paInst, pafrmForward_t *fwdIn
778 778
779 fwdInfo->u.host.ctrlBitMap |= (PAFRM_ROUTING_IF_DEST_SELECT_ENABLE | 779 fwdInfo->u.host.ctrlBitMap |= (PAFRM_ROUTING_IF_DEST_SELECT_ENABLE |
780 PAFRM_ROUTING_FLOW_EQOS_IF_ENABLE); 780 PAFRM_ROUTING_FLOW_EQOS_IF_ENABLE);
781 routingClass = pa_QUEUE_BOUNCE_ROUTING_CLASS_QoS; 781 routingClass = pa_QUEUE_BOUNCE_ROUTING_CLASS_QoS;
782 } 782 }
783 else 783 else
784 { 784 {
@@ -786,8 +786,8 @@ static paReturn_t pa_conv_routing_info2 (paInst_t *paInst, pafrmForward_t *fwdIn
786 } 786 }
787 } 787 }
788 788
789 queue = pa_convert_queue_id(paInst, routingClass, queue); 789 queue = pa_convert_queue_id(paInst, routingClass, queue);
790 790
791 if (routeInfo->validBitMap & pa_ROUTE_INFO_VALID_MROUTEINDEX) { 791 if (routeInfo->validBitMap & pa_ROUTE_INFO_VALID_MROUTEINDEX) {
792 if (routeInfo->mRouteIndex >= pa_MAX_MULTI_ROUTE_SETS) { 792 if (routeInfo->mRouteIndex >= pa_MAX_MULTI_ROUTE_SETS) {
793 return (pa_ERR_CONFIG); 793 return (pa_ERR_CONFIG);
@@ -918,9 +918,9 @@ static paReturn_t pa_conv_routing_info2 (paInst_t *paInst, pafrmForward_t *fwdIn
918 return (pa_ERR_CONFIG); 918 return (pa_ERR_CONFIG);
919 } 919 }
920 920
921 fwdInfo->flowId = routeInfo->flowId; 921 fwdInfo->flowId = routeInfo->flowId;
922 fwdInfo->queue = SWIZ(queue); 922 fwdInfo->queue = SWIZ(queue);
923 923
924 if (pCmd && (routeInfo->validBitMap & pa_ROUTE_INFO_VALID_PCMD)) { 924 if (pCmd && (routeInfo->validBitMap & pa_ROUTE_INFO_VALID_PCMD)) {
925 925
926 paCmdInfo_t* paCmd = routeInfo->pCmd; 926 paCmdInfo_t* paCmd = routeInfo->pCmd;
@@ -5266,8 +5266,8 @@ paReturn_t Pa_addAcl (Pa_Handle iHandle,
5266 } 5266 }
5267 5267
5268 /* Insert the entry to the Link List */ 5268 /* Insert the entry to the Link List */
5269 ret1 = pa_insert_entry(listElemTable, paInst->nAcl, listInfoTable, insertMode, 5269 ret1 = pa_insert_entry(listElemTable, paInst->nAcl, listInfoTable, insertMode,
5270 nextEntry?(paHandleAcl_t)pa_CONV_BASE_TO_OFFSET(paLObj.cfg.instPoolBaseAddr,nextEntry):0, 5270 nextEntry?(paHandleAcl_t)pa_CONV_BASE_TO_OFFSET(paLObj.cfg.instPoolBaseAddr,nextEntry):0,
5271 i, &priority, *retHandle); 5271 i, &priority, *retHandle);
5272 5272
5273 if (ret1 != pa_OK) { 5273 if (ret1 != pa_OK) {
@@ -6085,8 +6085,8 @@ paReturn_t Pa_setCustomLUT1 ( Pa_Handle iHandle,
6085 uint16_t csize; 6085 uint16_t csize;
6086 pafrmCommand_t *fcmd; 6086 pafrmCommand_t *fcmd;
6087 pafrmCommandSysConfigPa_t *ccfg; 6087 pafrmCommandSysConfigPa_t *ccfg;
6088 paInst_t *paInst = (paInst_t *) pa_CONV_OFFSET_TO_BASE(paLObj.cfg.instPoolBaseAddr, iHandle); 6088 paInst_t *paInst = (paInst_t *) pa_CONV_OFFSET_TO_BASE(paLObj.cfg.instPoolBaseAddr, iHandle);
6089 uint32_t mtCsKey; 6089 uint32_t mtCsKey;
6090 6090
6091 if((byteMasks == NULL) || (cmd == NULL) || (cmdSize == NULL) || (reply == NULL) || (cmdDest == NULL)) 6091 if((byteMasks == NULL) || (cmd == NULL) || (cmdSize == NULL) || (reply == NULL) || (cmdDest == NULL))
6092 { 6092 {
@@ -6112,10 +6112,10 @@ paReturn_t Pa_setCustomLUT1 ( Pa_Handle iHandle,
6112 if (reply->dest != pa_DEST_HOST) 6112 if (reply->dest != pa_DEST_HOST)
6113 return (pa_INVALID_CMD_REPLY_DEST); 6113 return (pa_INVALID_CMD_REPLY_DEST);
6114 6114
6115 /* Refresh PA Instance */ 6115 /* Refresh PA Instance */
6116 Pa_osalMtCsEnter(&mtCsKey); 6116 Pa_osalMtCsEnter(&mtCsKey);
6117 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t)); 6117 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t));
6118 6118
6119 /* Create the command */ 6119 /* Create the command */
6120 fcmd = pa_format_fcmd_header (paInst, cmd, reply, PAFRM_CONFIG_COMMAND_SYS_CONFIG, 0, 0, csize); 6120 fcmd = pa_format_fcmd_header (paInst, cmd, reply, PAFRM_CONFIG_COMMAND_SYS_CONFIG, 0, 0, csize);
6121 6121
@@ -6136,9 +6136,9 @@ paReturn_t Pa_setCustomLUT1 ( Pa_Handle iHandle,
6136 /* Any PDSP can be used to handle the command. POST PDSP0 is chosen 6136 /* Any PDSP can be used to handle the command. POST PDSP0 is chosen
6137 * since it is typically lightly loaded */ 6137 * since it is typically lightly loaded */
6138 *cmdDest = pa_CMD_TX_DEST_5; 6138 *cmdDest = pa_CMD_TX_DEST_5;
6139 6139
6140 Pa_osalEndMemAccess (paInst, sizeof(paInst_t)); 6140 Pa_osalEndMemAccess (paInst, sizeof(paInst_t));
6141 Pa_osalMtCsExit(mtCsKey); 6141 Pa_osalMtCsExit(mtCsKey);
6142 6142
6143 return (pa_OK); 6143 return (pa_OK);
6144 6144
@@ -6448,8 +6448,8 @@ paReturn_t Pa_setCustomLUT2 ( Pa_Handle iHandle,
6448 paCmdReply_t *reply, 6448 paCmdReply_t *reply,
6449 int *cmdDest ) 6449 int *cmdDest )
6450{ 6450{
6451 paInst_t *paInst = (paInst_t *) pa_CONV_OFFSET_TO_BASE(paLObj.cfg.instPoolBaseAddr, iHandle); 6451 paInst_t *paInst = (paInst_t *) pa_CONV_OFFSET_TO_BASE(paLObj.cfg.instPoolBaseAddr, iHandle);
6452 uint32_t mtCsKey; 6452 uint32_t mtCsKey;
6453 uint16_t csize; 6453 uint16_t csize;
6454 pafrmCommand_t *fcmd; 6454 pafrmCommand_t *fcmd;
6455 pafrmCommandSysConfigPa_t *ccfg; 6455 pafrmCommandSysConfigPa_t *ccfg;
@@ -6481,10 +6481,10 @@ paReturn_t Pa_setCustomLUT2 ( Pa_Handle iHandle,
6481 if (byteOffsets[i] >= byteOffsets[i+1]) 6481 if (byteOffsets[i] >= byteOffsets[i+1])
6482 return (pa_ERR_CONFIG); 6482 return (pa_ERR_CONFIG);
6483 6483
6484 /* Refresh PA Instance */ 6484 /* Refresh PA Instance */
6485 Pa_osalMtCsEnter(&mtCsKey); 6485 Pa_osalMtCsEnter(&mtCsKey);
6486 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t)); 6486 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t));
6487 6487
6488 /* Create the command */ 6488 /* Create the command */
6489 fcmd = pa_format_fcmd_header (paInst, cmd, reply, PAFRM_CONFIG_COMMAND_SYS_CONFIG, 0, 1, csize); 6489 fcmd = pa_format_fcmd_header (paInst, cmd, reply, PAFRM_CONFIG_COMMAND_SYS_CONFIG, 0, 1, csize);
6490 6490
@@ -6507,9 +6507,9 @@ paReturn_t Pa_setCustomLUT2 ( Pa_Handle iHandle,
6507 /* LUT2 resides at Ingress4 PDSP1 */ 6507 /* LUT2 resides at Ingress4 PDSP1 */
6508 *cmdDest = pa_CMD_TX_DEST_4; 6508 *cmdDest = pa_CMD_TX_DEST_4;
6509 6509
6510 Pa_osalEndMemAccess (paInst, sizeof(paInst_t)); 6510 Pa_osalEndMemAccess (paInst, sizeof(paInst_t));
6511 Pa_osalMtCsExit(mtCsKey); 6511 Pa_osalMtCsExit(mtCsKey);
6512 6512
6513 return (pa_OK); 6513 return (pa_OK);
6514 6514
6515} /* Pa_setCustomLUT2 */ 6515} /* Pa_setCustomLUT2 */
@@ -6758,8 +6758,8 @@ paReturn_t Pa_delL4Handle (Pa_Handle iHandle,
6758 6758
6759 Pa_osalEndMemAccess ((void *) vlnkTable, 6759 Pa_osalEndMemAccess ((void *) vlnkTable,
6760 paInst->paBufs[PA_BUFFNUM_VIRTUAL_LNK_TABLE].size); 6760 paInst->paBufs[PA_BUFFNUM_VIRTUAL_LNK_TABLE].size);
6761 } 6761 }
6762 6762
6763 Pa_osalEndMemAccess (paInst, sizeof(paInst_t)); 6763 Pa_osalEndMemAccess (paInst, sizeof(paInst_t));
6764 Pa_osalMtCsExit(mtCsKey); 6764 Pa_osalMtCsExit(mtCsKey);
6765 6765
@@ -7187,10 +7187,10 @@ paReturn_t Pa_configExceptionRoute2(Pa_Handle iHandle,
7187 if ((nRoute <= 0) || (nRoute > pa_EROUTE_MAX)) 7187 if ((nRoute <= 0) || (nRoute > pa_EROUTE_MAX))
7188 return (pa_ERR_CONFIG); 7188 return (pa_ERR_CONFIG);
7189 7189
7190 /* Refresh PA Instance */ 7190 /* Refresh PA Instance */
7191 Pa_osalMtCsEnter(&mtCsKey); 7191 Pa_osalMtCsEnter(&mtCsKey);
7192 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t)); 7192 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t));
7193 7193
7194 /* Create the command */ 7194 /* Create the command */
7195 fcmd = pa_format_fcmd_header (paInst, cmd, reply, PAFRM_CONFIG_COMMAND_SYS_CONFIG, 0, 0, csize); 7195 fcmd = pa_format_fcmd_header (paInst, cmd, reply, PAFRM_CONFIG_COMMAND_SYS_CONFIG, 0, 0, csize);
7196 7196
@@ -7397,8 +7397,8 @@ paReturn_t Pa_configMultiRoute (Pa_Handle iHandle,
7397 paCmdReply_t *reply, 7397 paCmdReply_t *reply,
7398 int *cmdDest) 7398 int *cmdDest)
7399{ 7399{
7400 paInst_t *paInst = (paInst_t *) pa_CONV_OFFSET_TO_BASE(paLObj.cfg.instPoolBaseAddr, iHandle); 7400 paInst_t *paInst = (paInst_t *) pa_CONV_OFFSET_TO_BASE(paLObj.cfg.instPoolBaseAddr, iHandle);
7401 uint32_t mtCsKey; 7401 uint32_t mtCsKey;
7402 pafrmCommand_t *fcmd; 7402 pafrmCommand_t *fcmd;
7403 pafrmCommandMultiRoute_t *mr; 7403 pafrmCommandMultiRoute_t *mr;
7404 int i; 7404 int i;
@@ -7432,13 +7432,13 @@ paReturn_t Pa_configMultiRoute (Pa_Handle iHandle,
7432 if((mode != pa_MULTI_ROUTE_MODE_CONFIG) && (mode != pa_MULTI_ROUTE_MODE_RESET)) 7432 if((mode != pa_MULTI_ROUTE_MODE_CONFIG) && (mode != pa_MULTI_ROUTE_MODE_RESET))
7433 return (pa_ERR_CONFIG); 7433 return (pa_ERR_CONFIG);
7434 7434
7435 if ((mode == pa_MULTI_ROUTE_MODE_CONFIG) && (routeEntry == NULL)) 7435 if ((mode == pa_MULTI_ROUTE_MODE_CONFIG) && (routeEntry == NULL))
7436 return (pa_ERR_CONFIG); 7436 return (pa_ERR_CONFIG);
7437 7437
7438 /* Refresh PA Instance */ 7438 /* Refresh PA Instance */
7439 Pa_osalMtCsEnter(&mtCsKey); 7439 Pa_osalMtCsEnter(&mtCsKey);
7440 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t)); 7440 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t));
7441 7441
7442 /* Create the command */ 7442 /* Create the command */
7443 fcmd = pa_format_fcmd_header (paInst, cmd, reply, PAFRM_CONFIG_COMMAND_MULTI_ROUTE, 0, 1, csize); 7443 fcmd = pa_format_fcmd_header (paInst, cmd, reply, PAFRM_CONFIG_COMMAND_MULTI_ROUTE, 0, 1, csize);
7444 7444
@@ -7472,9 +7472,9 @@ paReturn_t Pa_configMultiRoute (Pa_Handle iHandle,
7472 /* Multi-route processing PDSP: POST PDSP1 */ 7472 /* Multi-route processing PDSP: POST PDSP1 */
7473 *cmdDest = pa_CMD_TX_DEST_5; 7473 *cmdDest = pa_CMD_TX_DEST_5;
7474 7474
7475 Pa_osalEndMemAccess (paInst, sizeof(paInst_t)); 7475 Pa_osalEndMemAccess (paInst, sizeof(paInst_t));
7476 Pa_osalMtCsExit(mtCsKey); 7476 Pa_osalMtCsExit(mtCsKey);
7477 7477
7478 return (pa_OK); 7478 return (pa_OK);
7479 7479
7480} /* Pa_configMultiRoute */ 7480} /* Pa_configMultiRoute */
@@ -8754,35 +8754,35 @@ paReturn_t Pa_control (Pa_Handle iHandle,
8754 8754
8755 } 8755 }
8756 8756
8757 /* Queue Bounce configuration */ 8757 /* Queue Bounce configuration */
8758 if (cfg->pQueueBounceConfig) 8758 if (cfg->pQueueBounceConfig)
8759 { 8759 {
8760 int i; 8760 int i;
8761 paQueueBounceConfig_t* pQueueBounceCfg = cfg->pQueueBounceConfig; 8761 paQueueBounceConfig_t* pQueueBounceCfg = cfg->pQueueBounceConfig;
8762 8762
8763 paInst->cfg.queueBounceConfig = *pQueueBounceCfg; 8763 paInst->cfg.queueBounceConfig = *pQueueBounceCfg;
8764 8764
8765 for (i = 0; i < PA_MAX_QUEUE_BOUNCE_ROUTING_CLASSES; i++) 8765 for (i = 0; i < PA_MAX_QUEUE_BOUNCE_ROUTING_CLASSES; i++)
8766 { 8766 {
8767 if (pQueueBounceCfg->defOp[i] > pa_QUEUE_BOUNCE_OP_MAX) 8767 if (pQueueBounceCfg->defOp[i] > pa_QUEUE_BOUNCE_OP_MAX)
8768 { 8768 {
8769 paInst->cfg.queueBounceConfig.enable = FALSE; 8769 paInst->cfg.queueBounceConfig.enable = FALSE;
8770 ret = pa_ERR_CONFIG; 8770 ret = pa_ERR_CONFIG;
8771 break; 8771 break;
8772 } 8772 }
8773 } 8773 }
8774 8774
8775 if (ret == pa_OK) 8775 if (ret == pa_OK)
8776 { 8776 {
8777 cpa->validFlag |= PAFRM_COMMAND_CONFIG_VALID_QUEUE_BOUNCE; 8777 cpa->validFlag |= PAFRM_COMMAND_CONFIG_VALID_QUEUE_BOUNCE;
8778 cpa->queueBounce.ddrQueue = SWIZ(pQueueBounceCfg->ddrQueueId); 8778 cpa->queueBounce.ddrQueue = SWIZ(pQueueBounceCfg->ddrQueueId);
8779 cpa->queueBounce.msmcQueue = SWIZ(pQueueBounceCfg->msmcQueueId); 8779 cpa->queueBounce.msmcQueue = SWIZ(pQueueBounceCfg->msmcQueueId);
8780 } 8780 }
8781 8781
8782 /* the return queue may be updated per this configuration */ 8782 /* the return queue may be updated per this configuration */
8783 fcmd->replyQueue = SWIZ(pa_convert_queue_id(paInst, pa_QUEUE_BOUNCE_ROUTING_CLASS_CMD_RET, reply->queue)); 8783 fcmd->replyQueue = SWIZ(pa_convert_queue_id(paInst, pa_QUEUE_BOUNCE_ROUTING_CLASS_CMD_RET, reply->queue));
8784 } 8784 }
8785 8785
8786 /* Outer IP configuration */ 8786 /* Outer IP configuration */
8787 if (cfg->pOutIpReassmConfig) 8787 if (cfg->pOutIpReassmConfig)
8788 { 8788 {
@@ -9182,8 +9182,8 @@ paReturn_t Pa_control (Pa_Handle iHandle,
9182 { 9182 {
9183 pafrmCommandSysConfigPa_t *ccfg; 9183 pafrmCommandSysConfigPa_t *ccfg;
9184 9184
9185 Pa_osalMtCsEnter(&mtCsKey); 9185 Pa_osalMtCsEnter(&mtCsKey);
9186 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t)); 9186 Pa_osalBeginMemAccess (paInst, sizeof(paInst_t));
9187 9187
9188 if (csize) 9188 if (csize)
9189 { 9189 {
@@ -9303,8 +9303,8 @@ paReturn_t Pa_control (Pa_Handle iHandle,
9303 break; 9303 break;
9304 } 9304 }
9305 9305
9306 Pa_osalEndMemAccess (paInst, sizeof(paInst_t)); 9306 Pa_osalEndMemAccess (paInst, sizeof(paInst_t));
9307 Pa_osalMtCsExit(mtCsKey); 9307 Pa_osalMtCsExit(mtCsKey);
9308 9308
9309 } 9309 }
9310 return (ret); 9310 return (ret);
@@ -10576,6 +10576,7 @@ paReturn_t Pa_downloadImage (Pa_Handle iHandle, int modId, void* image, int size
10576 paReturn_t ret = pa_OK; 10576 paReturn_t ret = pa_OK;
10577 uint32_t mtCsKey; 10577 uint32_t mtCsKey;
10578 int i; 10578 int i;
10579 volatile uint32_t *image_word;
10579 10580
10580 /* Check for PA Base address null configurations */ 10581 /* Check for PA Base address null configurations */
10581 if (paLObj.cfg.baseAddr == (uint32_t) NULL) 10582 if (paLObj.cfg.baseAddr == (uint32_t) NULL)
@@ -10632,8 +10633,12 @@ paReturn_t Pa_downloadImage (Pa_Handle iHandle, int modId, void* image, int size
10632 } 10633 }
10633 10634
10634 /* Copy the image */ 10635 /* Copy the image */
10635 memcpy ((void *)pPpuRegs->PDSP_IRAM, image, sizeBytes); 10636 image_word = (uint32_t *) image;
10636 10637 for ( i = 0; i < (sizeBytes/4); i++)
10638 {
10639 pPpuRegs->PDSP_IRAM[i] = image_word[i];
10640 }
10641
10637 /* Initialize the programmable constant registers */ 10642 /* Initialize the programmable constant registers */
10638 for(i = 0; i < 32; i++) 10643 for(i = 0; i < 32; i++)
10639 pPpuRegs->PDSP_DEBUG.ICTE[i] = pap_pdsp_const_reg_map[modId][i]; 10644 pPpuRegs->PDSP_DEBUG.ICTE[i] = pap_pdsp_const_reg_map[modId][i];