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Diffstat (limited to 'test/PAUnitTest/src/tests/test10.c')
-rw-r--r--test/PAUnitTest/src/tests/test10.c40
1 files changed, 37 insertions, 3 deletions
diff --git a/test/PAUnitTest/src/tests/test10.c b/test/PAUnitTest/src/tests/test10.c
index 5ba898e..9fcf920 100644
--- a/test/PAUnitTest/src/tests/test10.c
+++ b/test/PAUnitTest/src/tests/test10.c
@@ -121,6 +121,8 @@
121 #define Q_IP_REASSM2 7 /* IP Reassembly Input Queue 2 (Inner IP) */ 121 #define Q_IP_REASSM2 7 /* IP Reassembly Input Queue 2 (Inner IP) */
122 122
123 #define Q_IP_FRAG 13 /* IP Fragmentation */ 123 #define Q_IP_FRAG 13 /* IP Fragmentation */
124 #define Q_BOUNCE_DDR 21 /* Queue Bounce DDR queue */
125 #define Q_BOUNCE_MSMC 22 /* Queue Bounce MSMC queue */
124 126
125#include "test10pkts.h" 127#include "test10pkts.h"
126 128
@@ -244,6 +246,22 @@ static paPacketControlConfig_t t10PktCtrlCfg =
244 0 /* txPaddingStatsIndex */ 246 0 /* txPaddingStatsIndex */
245 }; 247 };
246 248
249static paQueueBounceConfig_t t10QueueBounceCfg =
250 {
251 1, /* Enable */
252 Q_BOUNCE_DDR + TF_FIRST_GEN_QUEUE, /* ddrQueueId */
253 Q_BOUNCE_MSMC + TF_FIRST_GEN_QUEUE, /* msmcQueueId */
254 TF_PA_TX_QUEUE_BASE, /* hwQueueBegin */
255 TF_PA_TX_QUEUE_BASE + NSS_NUM_TX_QUEUES - 1, /* hwQueueEnd */
256 {
257 pa_QUEUE_BOUNCE_OP_NONE, /* Command Return */
258 pa_QUEUE_BOUNCE_OP_NONE, /* QoS mode */
259 pa_QUEUE_BOUNCE_OP_NONE, /* Capture Capture */
260 pa_QUEUE_BOUNCE_OP_DDR, /* IP Reassembly-assisted packets */
261 pa_QUEUE_BOUNCE_OP_NONE /* All traffics */
262 }
263 };
264
247#ifdef NSS_GEN2 265#ifdef NSS_GEN2
248 266
249static paRaGroupConfig_t t10OutRaGroupCfg = 267static paRaGroupConfig_t t10OutRaGroupCfg =
@@ -324,6 +342,7 @@ static paSysConfig_t t10GlobalCfg =
324 &t10UsrStatsCfg, /* pUsrStatsConfig */ 342 &t10UsrStatsCfg, /* pUsrStatsConfig */
325 NULL, /* pQueueDivertConfig */ 343 NULL, /* pQueueDivertConfig */
326 NULL, /* pPktControl */ 344 NULL, /* pPktControl */
345 &t10QueueBounceCfg, /* pQueueBounceConfig */
327 NULL, /* pOutAclConfig */ 346 NULL, /* pOutAclConfig */
328 NULL, /* pInAclConfig */ 347 NULL, /* pInAclConfig */
329 #ifdef NSS_GEN2 348 #ifdef NSS_GEN2
@@ -345,6 +364,7 @@ static paSysConfig_t t10GlobalCfg2 =
345 NULL, /* pUsrStatsConfig */ 364 NULL, /* pUsrStatsConfig */
346 NULL, /* pQueueDivertConfig */ 365 NULL, /* pQueueDivertConfig */
347 &t10PktCtrlCfg, /* pPktControl */ 366 &t10PktCtrlCfg, /* pPktControl */
367 NULL, /* pQueueBounceConfig */
348 NULL, /* pOutAclConfig */ 368 NULL, /* pOutAclConfig */
349 NULL, /* pInAclConfig */ 369 NULL, /* pInAclConfig */
350 NULL, /* pOutIpRaGroupConfig */ 370 NULL, /* pOutIpRaGroupConfig */
@@ -1013,7 +1033,7 @@ static void t10UpdatesStats(paSysStats_t *stats, int pktIndex, uint16_t pktLen,
1013 stats->classify1.nPackets += numFrags; 1033 stats->classify1.nPackets += numFrags;
1014 } 1034 }
1015} 1035}
1016 1036#ifndef PA_USE_HW_RA
1017#ifndef SIMULATOR_SUPPORT 1037#ifndef SIMULATOR_SUPPORT
1018static void t10IpRreassemTimeoutUpdatesStats(paSysStats_t *stats, uint32_t count) 1038static void t10IpRreassemTimeoutUpdatesStats(paSysStats_t *stats, uint32_t count)
1019{ 1039{
@@ -1024,6 +1044,7 @@ static void t10IpRreassemTimeoutUpdatesStats(paSysStats_t *stats, uint32_t count
1024 1044
1025} 1045}
1026#endif 1046#endif
1047#endif
1027 1048
1028#if 0 1049#if 0
1029 1050
@@ -1386,6 +1407,7 @@ static void t10SendDataPkts (t10TestEncap_t *tencap, int nL4Handles, int group,
1386 } 1407 }
1387 1408
1388} 1409}
1410#ifndef PA_USE_HW_RA
1389 1411
1390#define MAX_RX_FRAGS_PER_CALL 20 1412#define MAX_RX_FRAGS_PER_CALL 20
1391 1413
@@ -1398,6 +1420,7 @@ static int t10RxFrags(t10TestEncap_t *tencap, Qmss_QueueHnd inQ, Qmss_QueueHnd o
1398 1420
1399 q.qMgr = 0; 1421 q.qMgr = 0;
1400 q.qNum = TF_DEF_RET_Q; 1422 q.qNum = TF_DEF_RET_Q;
1423
1401 /* Process the received fragments */ 1424 /* Process the received fragments */
1402 while ((Qmss_getQueueEntryCount(inQ) > 0) && (fragCnt < MAX_RX_FRAGS_PER_CALL)) { 1425 while ((Qmss_getQueueEntryCount(inQ) > 0) && (fragCnt < MAX_RX_FRAGS_PER_CALL)) {
1403 1426
@@ -1510,7 +1533,7 @@ static int t10RxFrags(t10TestEncap_t *tencap, Qmss_QueueHnd inQ, Qmss_QueueHnd o
1510 1533
1511 return (0); 1534 return (0);
1512} 1535}
1513 1536#endif
1514 1537
1515/* Search the receive data packet queue for received data packets. Remain in 1538/* Search the receive data packet queue for received data packets. Remain in
1516 * this function until all buffers are restored to their respective queues */ 1539 * this function until all buffers are restored to their respective queues */
@@ -1525,12 +1548,17 @@ static int t10ReceiveDataPkts (t10TestEncap_t *tencap, int expCount)
1525 uint32_t flags; 1548 uint32_t flags;
1526 unsigned int eflags; 1549 unsigned int eflags;
1527 int count = 0; 1550 int count = 0;
1528 1551#ifndef PA_USE_HW_RA
1552 int ddrBounceCount=0;
1553#endif
1529 1554
1530 for (i = 0; i < 100; i++) { 1555 for (i = 0; i < 100; i++) {
1531 1556
1532 utilCycleDelay (5000); 1557 utilCycleDelay (5000);
1533 1558
1559#ifndef PA_USE_HW_RA
1560 testCommonRelayQueueBouncePkts (tencap->tf, tfName, Q_BOUNCE_DDR, Q_BOUNCE_MSMC, &ddrBounceCount, NULL);
1561
1534 /* Process OutIp fragments */ 1562 /* Process OutIp fragments */
1535 if (t10RxFrags(tencap, tencap->tf->QGen[Q_IP_REASSM1], tencap->tf->QPaTx[TF_PA_Q_OUTER_IP], &expCount)) 1563 if (t10RxFrags(tencap, tencap->tf->QGen[Q_IP_REASSM1], tencap->tf->QPaTx[TF_PA_Q_OUTER_IP], &expCount))
1536 { 1564 {
@@ -1544,6 +1572,7 @@ static int t10ReceiveDataPkts (t10TestEncap_t *tencap, int expCount)
1544 return (-1); 1572 return (-1);
1545 } 1573 }
1546 1574
1575#endif
1547 /* Look for packets in the rx packet queue, verify that the UDP port found matches the next value in 1576 /* Look for packets in the rx packet queue, verify that the UDP port found matches the next value in
1548 * the fifo, then verify the receive packet information */ 1577 * the fifo, then verify the receive packet information */
1549 while (Qmss_getQueueEntryCount(tencap->tf->QGen[Q_MATCH]) > 0) { 1578 while (Qmss_getQueueEntryCount(tencap->tf->QGen[Q_MATCH]) > 0) {
@@ -1627,6 +1656,7 @@ static int t10ReceiveDataPkts (t10TestEncap_t *tencap, int expCount)
1627 return (-1); 1656 return (-1);
1628 } 1657 }
1629 1658
1659
1630 /* Since the packets went to the modify PDSP and then back to the QM, a descriptor 1660 /* Since the packets went to the modify PDSP and then back to the QM, a descriptor
1631 * and linked buffer was required while the packet was in the QM. This will 1661 * and linked buffer was required while the packet was in the QM. This will
1632 * be recycled to the default recycle queue */ 1662 * be recycled to the default recycle queue */
@@ -1641,6 +1671,10 @@ static int t10ReceiveDataPkts (t10TestEncap_t *tencap, int expCount)
1641 1671
1642 } 1672 }
1643 1673
1674#ifndef PA_USE_HW_RA
1675 if(ddrBounceCount != count)
1676 System_printf("t10ReceiveDataPkts: receives %d queue bounce packets and %d final reassembled packets\n", ddrBounceCount, count);
1677#endif
1644 return (0); 1678 return (0);
1645 1679
1646} 1680}