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/*
* ======== multicore_example.cfg ========
*
* Copyright 2009-2013 by Texas Instruments Incorporated.
*
* All rights reserved. Property of Texas Instruments Incorporated.
* Restricted rights to use, duplicate or disclose this code are
* granted through contract.
*
*/
/* Load all required BIOS/XDC runtime packages */
var Memory = xdc.useModule('xdc.runtime.Memory');
var BIOS = xdc.useModule('ti.sysbios.BIOS');
var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var HeapBuf = xdc.useModule('ti.sysbios.heaps.HeapBuf');
var Log = xdc.useModule('xdc.runtime.Log');
var Task = xdc.useModule('ti.sysbios.knl.Task');
var Hwi = xdc.useModule('ti.sysbios.family.c64p.Hwi');
var Startup = xdc.useModule('xdc.runtime.Startup');
/* Load the CSL package */
var devType = "k2l"
var Csl = xdc.useModule('ti.csl.Settings');
Csl.deviceType = devType;
/* Load the CPPI package */
var Cppi = xdc.loadPackage('ti.drv.cppi');
/* Load the QMSS package */
var Qmss = xdc.loadPackage('ti.drv.qmss');
/* Load the RM package */
var Rm = xdc.loadPackage('ti.drv.rm');
/* Load the PA package */
var Pa = xdc.useModule('ti.drv.pa.Settings');
Pa.deviceType = devType;
/* IPC packages */
var SharedRegion = xdc.useModule('ti.sdo.ipc.SharedRegion');
var MultiProc = xdc.useModule('ti.sdo.utils.MultiProc');
var Ipc = xdc.useModule('ti.sdo.ipc.Ipc');
var HeapBufMP = xdc.useModule('ti.sdo.ipc.heaps.HeapBufMP');
MultiProc.setConfig(null, ["CORE0", "CORE1", "CORE2", "CORE3"]);
/* MultiProc.setConfig(null, ["CORE0", "CORE1"]); */
/* Synchronize all processors (this will be done in Ipc_start) */
Ipc.procSync = Ipc.ProcSync_ALL;
SharedRegion.translate = false;
SharedRegion.setEntryMeta(0,
{ base: 0x0C000000,
len: 0x00008000,
ownerProcId: 0,
isValid: true,
name: "sharemem",
});
var System = xdc.useModule('xdc.runtime.System');
SysStd = xdc.useModule('xdc.runtime.SysStd');
System.SupportProxy = SysStd;
/* Below configuration is needed if the DSP executable needs to be loaded from MPM client from ARM */
/*
* The SysMin used here vs StdMin, as trace buffer address is required for
* Linux trace debug driver, plus provides better performance.
*/
Program.global.sysMinBufSize = 0x8000;
var System = xdc.useModule('xdc.runtime.System');
var SysMin = xdc.useModule('xdc.runtime.SysMin');
System.SupportProxy = SysMin;
SysMin.bufSize = Program.global.sysMinBufSize;
/* Configure resource table for trace only.
Note that, it traceOnly parameter should not
be set if application is using MessageQ based IPC
to communicate between cores.
*/
var Resource = xdc.useModule('ti.ipc.remoteproc.Resource');
Resource.loadSegment = Program.platform.dataMemory;
Resource.traceOnly = true;
/* end MPM Client Configurations */
/* Create a default system heap using ti.bios.HeapMem. */
var heapMemParams1 = new HeapMem.Params;
heapMemParams1.size = 8192 * 30;
heapMemParams1.sectionName = "systemHeap";
Program.global.heap0 = HeapMem.create(heapMemParams1);
/* This is the default memory heap. */
Memory.defaultHeapInstance = Program.global.heap0;
Program.sectMap["systemHeap"] = Program.platform.stackMemory;
var heapMemParams2 = new HeapMem.Params;
heapMemParams2.size = 16384;
heapMemParams2.align = 8;
heapMemParams2.sectionName = "cppiSharedHeap";
Program.global.cppiSharedHeap = HeapMem.create(heapMemParams2);
/* Enable BIOS Task Scheduler */
BIOS.taskEnabled = true;
Task.defaultStackSize = 4096*2;
/* Memory map */
Program.sectMap[".text"] = "L2SRAM";
Program.sectMap[".const"] = "L2SRAM";
Program.sectMap[".qmss"] = "MSMCSRAM";
Program.sectMap[".cppi"] = "MSMCSRAM";
Program.sectMap[".sharedDDR"] = "MSMCSRAM";
Program.sectMap[".cppiMemTX"] = "MSMCSRAM";
Program.sectMap[".cppiMemRX"] = "MSMCSRAM";
/* Add init function, make sure the shared memory is created well in advance */
Startup.lastFxns.$add('&fw_shmCreate');
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