sync with latest device library implementation from uart

1 files changed, 236 insertions, 207 deletions

diff --git a/config.bld b/config.bld
index 8372ae3..4ff1013 100644
--- a/config.bld
+++ b/config.bld
@@ -1,212 +1,241 @@
-/******************************************************************************

- * FILE PURPOSE: Build configuration Script for the PCIE LLD

- ******************************************************************************

- * FILE NAME: config.bld

- *

- * DESCRIPTION: 

- *  This file contains the build configuration script for the PCIE LLD

- *  and is responsible for configuration of the paths for the various 

- *  tools required to build the driver.

- *

- * Copyright (C) 2012-2015, Texas Instruments, Inc.

- *****************************************************************************/

-

-/* Get the Tools Base directory from the Environment Variable. */

-var c66ToolsBaseDir = java.lang.System.getenv("C6X_GEN_INSTALL_PATH");

-var m4ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_M4");

-var a15ToolsBaseDir = java.lang.System.getenv("TOOLCHAIN_PATH_A15");

-

-/* Check if we need to create the Makefiles? */

-var miniBuild = java.lang.System.getenv("MINI_PACKAGE");

-

-/* Get the extended debug flags */

+/******************************************************************************
+ * FILE PURPOSE: Build configuration Script for the PCIE LLD
+ ******************************************************************************
+ * FILE NAME: config.bld
+ *
+ * DESCRIPTION: 
+ *  This file contains the build configuration script for the PCIE LLD
+ *  and is responsible for configuration of the paths for the various 
+ *  tools required to build the driver.
+ *
+ * Copyright (C) 2012-2015, Texas Instruments, Inc.
+ *****************************************************************************/
+
+/* Get the Tools Base directory from the Environment Variable. */
+var c66ToolsBaseDir = java.lang.System.getenv("C6X_GEN_INSTALL_PATH");
+var m4ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_M4");
+var a15ToolsBaseDir = java.lang.System.getenv("TOOLCHAIN_PATH_A15");
+var a9ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_A9");
+var a8ToolsBaseDir  = java.lang.System.getenv("TOOLCHAIN_PATH_A8");
+
+/* Get the extended debug flags for C66x, 
+ * did not change the name for backwards compatibilty */
 var extDbgFlags = java.lang.System.getenv("EXTDBGFLAGS");
-

-/* Get the base directory for the PCIE LLD Package */

-var pcielldPath = new java.io.File(".//").getPath();

-

-/* This is the part Number for which the PCIE LLD is being created */

-var pcielldPartNumber = java.lang.System.getenv("PARTNO");

-

-if(pcielldPartNumber == null)

-{

-    pcielldPartNumber = "keystone2";

-}

-

-/* Include Path */

-var pcielldIncPath = " -I" + pcielldPath;

-

-/* Configure the PCIE LLD Version Information */

-/* 3 steps: remove SPACE and TAB, convert to string and split to make array */

-var pcielldReleaseVersion = (""+Pkg.version.replace(/\s/g, "")).split(',');

-

-/* PCIE LLD Coverity Analysis: Check the environment variable to determine if Static

- * Analysis has to be done on the driver Code base or not? */

-var pcieCoverityAnalysis = java.lang.System.getenv("STATIC_ANALYZE");

-

-/* C66 ELF compiler configuration for Little Endian Mode. */

-var C66LE            = xdc.useModule('ti.targets.elf.C66');

-C66LE.rootDir       = c66ToolsBaseDir;

-C66LE.ccOpts.prefix  = "-mo -o3 -q -k -eo.o";

+
+/* Get the extended debug flags for A15 */
+var extDbgFlags_a15 = java.lang.System.getenv("EXTDBGFLAGS_A15");
+
+/* Get the extended debug flags for A8 */
+var extDbgFlags_a8 = java.lang.System.getenv("EXTDBGFLAGS_A8");
+
+/* Get the extended debug flags for A9 */
+var extDbgFlags_a9 = java.lang.System.getenv("EXTDBGFLAGS_A9");
+
+/* Get the extended debug flags for M4 */
+var extDbgFlags_m4 = java.lang.System.getenv("EXTDBGFLAGS_M4");
+
+/* Get the base directory for the PCIE LLD Package */
+var driverPath = new java.io.File(".//").getPath();
+
+/* Include Path */
+var lldIncludePath = " -I" + driverPath;
+
+/* Configure the PCIE LLD Version Information */
+/* 3 steps: remove SPACE and TAB, convert to string and split to make array */
+var driverReleaseVersion = (""+Pkg.version.replace(/\s/g, "")).split(',');
+
+/* C66 ELF compiler configuration for Little Endian Mode. */
+var C66LE           = xdc.useModule('ti.targets.elf.C66');
+C66LE.rootDir       = c66ToolsBaseDir;
+C66LE.ccOpts.prefix = "-mo -o3 -q -k -eo.o";
 if(extDbgFlags)     
-    C66LE.ccOpts.prefix = C66LE.ccOpts.prefix + " " + extDbgFlags; 

-

-/* C66 ELF compiler configuration for Big Endian Mode. */

-var C66BE            = xdc.useModule('ti.targets.elf.C66_big_endian');

-C66BE.rootDir       = c66ToolsBaseDir;

-C66BE.ccOpts.prefix  = "-mo -o3 -q -k -eo.o -DBIGENDIAN";

+    C66LE.ccOpts.prefix = C66LE.ccOpts.prefix + " " + extDbgFlags; 
+
+/* C66 ELF compiler configuration for Big Endian Mode. */
+var C66BE           = xdc.useModule('ti.targets.elf.C66_big_endian');
+C66BE.rootDir       = c66ToolsBaseDir;
+C66BE.ccOpts.prefix = "-mo -o3 -q -k -eo.o -DBIGENDIAN";
 if(extDbgFlags)     
     C66BE.ccOpts.prefix = C66BE.ccOpts.prefix + " " + extDbgFlags;
-

-/* ARMv7 A15 compiler configuration */

-var A15LE            = xdc.useModule('gnu.targets.arm.A15F');

-A15LE.rootDir        = a15ToolsBaseDir;

-A15LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a15 -marm -DDRA7xx -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";

-

-/* M4 ELF compiler configuration for Little Endian Mode. */

-var M4LE            = xdc.useModule('ti.targets.arm.elf.M4');

-M4LE.rootDir        = m4ToolsBaseDir;

-M4LE.ccOpts.prefix  = "-o4 -qq -pdsw255 -DMAKEFILE_BUILD";

-

-/* Check if we need to run the STATIC Analysis or not? */

-var coverityAnalysis = java.lang.System.getenv("STATIC_ANALYZE");

-

-/* Setup the Coverity Filters to perform Static Analysis. */

-if (coverityAnalysis == "ON") {

-    var coverityInstallPath = java.lang.System.getenv("STATIC_ANALYZE_PATH");

-    var cfgBase = xdc.getPackageBase("tisb.coverity.filters") + "cfg";

-

-    var coverityFilter = [

-    {

-        moduleName: "tisb.coverity.filters.Coverity",

-        params: {

-            cfgDir:  cfgBase,  // The Coverity configuration file directory

-            rootDir: coverityInstallPath,

-            outDir: xdc.csd() + "cov_out",

-            analyzeLibs: true

-        }

-    },

-    ];

-

-    /* Run the coverity filters on the LE Build only. */

-    C66LE.profiles["release"].filters = coverityFilter;

-}

-

-if (miniBuild == "ON") 

-{

-

-    var makeC66LEFilter = {

-        moduleName: "build.filter.Make",

-        params: {

-          makefileName: "simpleC66LE.mak",

-        }

-    };

-

-    C66LE.profiles["release"].filters[C66LE.profiles["release"].filters.length++] = makeC66LEFilter;

-

-

-    var makeC66BEFilter = {

-        moduleName: "build.filter.Make",

-        params: {

-          makefileName: "simpleC66BE.mak",

-        }

-    }; 

-

-    C66BE.profiles["release"].filters[C66BE.profiles["release"].filters.length++] = makeC66BEFilter;

-}

-

-/* List all the build targets here. */

-Build.targets = [ C66LE, C66BE, M4LE, A15LE];

-
-/* device name (k2?) is inserted between first an second element of this
+
+/* ARMv7 A15 compiler configuration */
+var A15LE            = xdc.useModule('gnu.targets.arm.A15F');
+A15LE.rootDir        = a15ToolsBaseDir;
+A15LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a15 -marm -DDRA7xx -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a15)     
+    A15LE.ccOpts.prefix = A15LE.ccOpts.prefix + " " + extDbgFlags_a15; 
+    
+/* ARMv7 A9 compiler configuration */
+var A9LE            = xdc.useModule('gnu.targets.arm.A9F');
+A9LE.rootDir        = a9ToolsBaseDir;
+A9LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a9 -marm -DDRA7xx -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a9)     
+    A9LE.ccOpts.prefix = A9LE.ccOpts.prefix + " " + extDbgFlags_a9; 
+
+/* ARMv7 A8 compiler configuration */
+var A8LE            = xdc.useModule('gnu.targets.arm.A8F');
+A8LE.rootDir        = a8ToolsBaseDir;
+A8LE.ccOpts.prefix  = "-mno-unaligned-access -c -mtune=cortex-a8 -marm -DDRA7xx -gstrict-dwarf -Wall -D__ARMv7 -D_LITTLE_ENDIAN=1";
+if(extDbgFlags_a8)     
+    A8LE.ccOpts.prefix = A8LE.ccOpts.prefix + " " + extDbgFlags_a8; 
+
+/* M4 ELF compiler configuration for Little Endian Mode. */
+var M4LE            = xdc.useModule('ti.targets.arm.elf.M4');
+M4LE.rootDir        = m4ToolsBaseDir;
+M4LE.ccOpts.prefix  = "-o4 -qq -pdsw255 -DMAKEFILE_BUILD";
+if(extDbgFlags_m4)
+    M4LE.ccOpts.prefix = M4LE.ccOpts.prefix + " " + extDbgFlags_m4; 
+
+
+/* soc name (am?) is inserted between first an second element of this
    list to construct device file name for each device */
-var deviceConstruct = [ "soc/", "/src/pcie_soc.c" ];

-

-var soc_all =

-{

-    /* soc name */

-    name: "",

-    

-    /* Library options */

-    copts: "",

-              

-    /* target list */

-    targets: [ C66LE, C66BE, M4LE, A15LE]

-};

-

-var soc_k2k =

-{

-    /* soc name */

-    name: "k2k",

-    

-    /* Library options */

-    copts: " -DDEVICE_K2K",

-              

-    /* target list */

-    targets: [ C66LE, C66BE ]

-};

-

-var soc_k2h =

-{

-    /* soc name */

-    name: "k2h",

-    

-    /* Library options */

-    copts: " -DDEVICE_K2H",

-              

-    /* target list */

-    targets: [ C66LE, C66BE ]

-};

-

-var soc_k2l =

-{

-    /* soc name */

-    name: "k2l",

-    

-    /* Library options */

-    copts: " -DDEVICE_K2L",

-              

-    /* target list */

-    targets: [ C66LE, C66BE ]

-};

-

-var soc_k2e =

-{

-    /* soc name */

-    name: "k2e",

-    

-    /* Library options */

-    copts: " -DDEVICE_K2E",

-              

-    /* target list */

-    targets: [ C66LE, C66BE ]

-};

-

-var soc_am572x =

-{

-    /* soc name */

-    name: "am572x",

-    

-    /* Library options */

-    copts: " -DSOC_AM572x",

-              

-    /* target list */

-    targets: [ C66LE, C66BE, M4LE, A15LE]

-};

-

-var soc_am571x =

-{

-    /* soc name */

-    name: "am571x",

-    

-    /* Library options */

-    copts: " -DSOC_AM571x",

-              

-    /* target list */

-    targets: [ C66LE, C66BE, M4LE, A15LE]

-};

-

-/* Build soc-independent library only for now */

-var socs = [soc_all];

-

-

+var deviceConstruct = [ "soc/", "/src/pcie_soc.c" ];
+
+/* Create the SoC List  */
+var socs = { 
+    /* device independent libraries */
+    all :
+    {
+        /* Build this library */
+        build: "true",
+        /* SoC lib enabled */
+        socDevLib: "false",
+        /* Library options */
+        copts: "",
+        /* target lists, kept blank now, would be updated based on argument lists */
+        targets: []
+    },
+    k2k : 
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am572x */
+        build: "false", 
+        /* SoC lib enabled */
+        socDevLib: "true",
+        /* Library options */
+        copts: " -DDEVICE_K2K",
+        /* target list */
+        targets: [ C66LE, C66BE ]
+    },
+    k2h : 
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am572x */
+        build: "false", 
+        /* SoC lib enabled */
+        socDevLib: "true",
+        /* Library options */
+        copts: " -DDEVICE_K2H",
+        /* target list */
+        targets: [ C66LE, C66BE ]
+    },
+    k2e : 
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am572x */
+        build: "false", 
+        /* SoC lib enabled */
+        socDevLib: "true",
+        /* Library options */
+        copts: " -DDEVICE_K2E",
+        /* target list */
+        targets: [ C66LE, C66BE ]
+    },
+    k2l : 
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am572x */
+        build: "false", 
+        /* SoC lib enabled */
+        socDevLib: "true",
+        /* Library options */
+        copts: " -DDEVICE_K2L",
+        /* target list */
+        targets: [ C66LE, C66BE ]
+    },
+    am572x :
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am572x */
+        build: "false", 
+        /* SoC lib enabled */
+        socDevLib: "true",
+        /* Library options */
+        copts: " -DSOC_AM572x",
+        /* target list */
+        targets: [ C66LE, M4LE, A15LE]
+    },
+    am571x :
+    {
+        /* this variable would be reinitialized to true, if XDCARGS contains am571x */
+        build: "false",     
+        /* SoC lib enabled */
+        socDevLib: "true",
+        /* Library options */
+        copts: " -DSOC_AM571x",
+        /* target list */
+        targets: [ C66LE, M4LE, A15LE]
+    }    
+};
+
+/**************************************************************************
+ * FUNCTION NAME : merge
+ **************************************************************************
+ * DESCRIPTION   :
+ *  The function is used to merge two arrarys
+ **************************************************************************/
+function merge() {
+    var args = arguments;
+    var hash = {};
+    var arr = [];
+    for (var i = 0; i < args.length; i++) {
+       for (var j = 0; j < args[i].length; j++) {
+         if (hash[args[i][j]] !== true) {
+           arr[arr.length] = args[i][j];
+           hash[args[i][j]] = true;
+         }
+       }
+     }
+    return arr;
+}
+
+/* Grab input from XDCARGS */
+var buildArguments  = [];
+
+/* Construct the build arguments */
+for (var tmp=0; arguments[tmp] != undefined; tmp++)
+{
+
+    /* If no arguments are provided, override for building all */
+    if ( ( arguments.length == 1) && (arguments[tmp].equals("./config.bld")) )
+        buildArguments[buildArguments.length++] = "all";
+    else
+        buildArguments[buildArguments.length++] = arguments[tmp];
+}
+
+/* Build targets on this build */
+var build_targets = [];
+
+for (var i=0; i < buildArguments.length; i++ ) {
+    /* Build it for all targets */
+    var soc_names = Object.keys(socs);
+    if (buildArguments[i] == "all") {
+        for (var j = 0; j < soc_names.length; j++)  {
+            build_targets = merge (build_targets.slice(0), socs[soc_names[j]].targets.slice(0));
+            /* Set build to "true" for that SoC */
+            socs[soc_names[j]].build = "true";
+        }
+    }
+    else {
+        /* Skip the first argument, which is ./config.bld to get to next SoCs */
+        if (i == 0) continue;          
+        /* Set that build to true if it is found in supported build socs */
+        for (j = 0; j < soc_names.length; j++) {
+            if (buildArguments[i] == soc_names[j]) {
+                socs[buildArguments[i]].build = "true";
+                build_targets = merge (build_targets.slice(0), socs[buildArguments[i]].targets.slice(0));
+                break;
+            }
+        }
+    }   
+}
+
+/* Update the Build target generated list */
+socs["all"].targets = build_targets; 
+Build.targets   = build_targets;
+