diff options
author | John Dowdal | 2015-04-09 11:02:49 -0500 |
---|---|---|
committer | John Dowdal | 2015-04-09 11:02:49 -0500 |
commit | e60afa6baf80d4b59250fa12dece24c1a8eb8207 (patch) | |
tree | 56286d4cd3d194fd732b1d387d2a5917153b214d /soc | |
parent | 75a2d15f7d1269707477803e026710f18421f812 (diff) | |
download | pcie-lld-e60afa6baf80d4b59250fa12dece24c1a8eb8207.tar.gz pcie-lld-e60afa6baf80d4b59250fa12dece24c1a8eb8207.tar.xz pcie-lld-e60afa6baf80d4b59250fa12dece24c1a8eb8207.zip |
refactor for v0/v1 and run on k2h
Diffstat (limited to 'soc')
-rw-r--r-- | soc/Module.xs | 33 | ||||
-rw-r--r-- | soc/am572x/src/pcie_soc.c | 105 | ||||
-rw-r--r-- | soc/k2e/src/pcie_soc.c | 125 | ||||
-rw-r--r-- | soc/k2h/src/pcie_soc.c | 116 | ||||
-rw-r--r-- | soc/k2k/src/pcie_soc.c | 116 | ||||
-rw-r--r-- | soc/k2l/src/pcie_soc.c | 125 | ||||
-rw-r--r-- | soc/pcie_soc.h | 64 |
7 files changed, 684 insertions, 0 deletions
diff --git a/soc/Module.xs b/soc/Module.xs new file mode 100644 index 0000000..1a4baff --- /dev/null +++ b/soc/Module.xs | |||
@@ -0,0 +1,33 @@ | |||
1 | /****************************************************************************** | ||
2 | * FILE PURPOSE: PCIE LLD soc specific files. | ||
3 | ****************************************************************************** | ||
4 | * FILE NAME: Module.xs | ||
5 | * | ||
6 | * DESCRIPTION: | ||
7 | * This file contains the module specification for PCIE LLD soc specific files. | ||
8 | * | ||
9 | * Copyright (C) 2013-2015, Texas Instruments, Inc. | ||
10 | *****************************************************************************/ | ||
11 | |||
12 | /* Load the library utility. */ | ||
13 | var libUtility = xdc.loadCapsule ("../build/buildlib.xs"); | ||
14 | |||
15 | /************************************************************************** | ||
16 | * FUNCTION NAME : modBuild | ||
17 | ************************************************************************** | ||
18 | * DESCRIPTION : | ||
19 | * The function is used to add all the source files in the soc | ||
20 | * directory into the package. | ||
21 | **************************************************************************/ | ||
22 | function modBuild() | ||
23 | { | ||
24 | /* Add all the .c files to the release package. */ | ||
25 | var configFiles = libUtility.listAllFiles (".c", "soc", true); | ||
26 | for (var k = 0 ; k < configFiles.length; k++) | ||
27 | Pkg.otherFiles[Pkg.otherFiles.length++] = configFiles[k]; | ||
28 | |||
29 | /* Add all the .h files to the release package. */ | ||
30 | var configFiles = libUtility.listAllFiles (".h", "soc", true); | ||
31 | for (var k = 0 ; k < configFiles.length; k++) | ||
32 | Pkg.otherFiles[Pkg.otherFiles.length++] = configFiles[k]; | ||
33 | } | ||
diff --git a/soc/am572x/src/pcie_soc.c b/soc/am572x/src/pcie_soc.c new file mode 100644 index 0000000..ca3ff61 --- /dev/null +++ b/soc/am572x/src/pcie_soc.c | |||
@@ -0,0 +1,105 @@ | |||
1 | /** | ||
2 | * @file am572x/src/pcie_soc.c | ||
3 | * | ||
4 | * @brief | ||
5 | * This file contains the device specific configuration and initialization routines | ||
6 | * for pcie Low Level Driver. | ||
7 | * | ||
8 | * \par | ||
9 | * ============================================================================ | ||
10 | * @n (C) Copyright 2015, Texas Instruments, Inc. | ||
11 | * | ||
12 | * Redistribution and use in source and binary forms, with or without | ||
13 | * modification, are permitted provided that the following conditions | ||
14 | * are met: | ||
15 | * | ||
16 | * Redistributions of source code must retain the above copyright | ||
17 | * notice, this list of conditions and the following disclaimer. | ||
18 | * | ||
19 | * Redistributions in binary form must reproduce the above copyright | ||
20 | * notice, this list of conditions and the following disclaimer in the | ||
21 | * documentation and/or other materials provided with the | ||
22 | * distribution. | ||
23 | * | ||
24 | * Neither the name of Texas Instruments Incorporated nor the names of | ||
25 | * its contributors may be used to endorse or promote products derived | ||
26 | * from this software without specific prior written permission. | ||
27 | * | ||
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
31 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
32 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
33 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
34 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
35 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
36 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
37 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
39 | * | ||
40 | * \par | ||
41 | */ | ||
42 | |||
43 | /** | ||
44 | * This file contains an example device configuration for the pcie LLD. | ||
45 | * It is not precompiled to facilitate user modification of the file. | ||
46 | */ | ||
47 | |||
48 | #include <stdint.h> | ||
49 | #include <stdlib.h> | ||
50 | |||
51 | /* CSL RL includes */ | ||
52 | #include <ti/csl/cslr_device.h> | ||
53 | #include <ti/csl/cslr_bootcfg.h> | ||
54 | |||
55 | #include <ti/csl/csl_bootcfg.h> | ||
56 | |||
57 | /* pcie LLD includes */ | ||
58 | #include <ti/drv/pcie/device/pcie_device.h> | ||
59 | #include <ti/drv/pcie/pcie.h> | ||
60 | |||
61 | /** @addtogroup PCIE_LLD_DATASTRUCT | ||
62 | @{ | ||
63 | */ | ||
64 | |||
65 | /** @brief PCIE LLD initialization parameters */ | ||
66 | const Pcie_InitCfg pcieInitCfg = | ||
67 | { | ||
68 | { | ||
69 | { | ||
70 | { | ||
71 | (void *)CSL_PCIE_SLV_CFG_REGS, | ||
72 | (void *)CSL_PCIE_SLV_DATA, | ||
73 | (volatile uint32_t *)&hBootCfg->DEVCFG, | ||
74 | CSL_BOOTCFG_DEVCFG_PCIESSMODE_MASK, | ||
75 | CSL_BOOTCFG_DEVCFG_PCIESSMODE_SHIFT | ||
76 | }, | ||
77 | { | ||
78 | NULL, | ||
79 | NULL, | ||
80 | NULL, | ||
81 | 0, | ||
82 | 0 | ||
83 | }, | ||
84 | { | ||
85 | NULL, | ||
86 | NULL, | ||
87 | NULL, | ||
88 | 0, | ||
89 | 0 | ||
90 | }, | ||
91 | { | ||
92 | NULL, | ||
93 | NULL, | ||
94 | NULL, | ||
95 | 0, | ||
96 | 0 | ||
97 | } | ||
98 | } | ||
99 | } | ||
100 | }; | ||
101 | |||
102 | /** | ||
103 | @} | ||
104 | */ | ||
105 | |||
diff --git a/soc/k2e/src/pcie_soc.c b/soc/k2e/src/pcie_soc.c new file mode 100644 index 0000000..11c54ea --- /dev/null +++ b/soc/k2e/src/pcie_soc.c | |||
@@ -0,0 +1,125 @@ | |||
1 | /** | ||
2 | * @file k2e/src/pcie_soc.c | ||
3 | * | ||
4 | * @brief | ||
5 | * This file contains the device specific configuration and initialization routines | ||
6 | * for pcie Low Level Driver. | ||
7 | * | ||
8 | * \par | ||
9 | * ============================================================================ | ||
10 | * @n (C) Copyright 2013-2015, Texas Instruments, Inc. | ||
11 | * | ||
12 | * Redistribution and use in source and binary forms, with or without | ||
13 | * modification, are permitted provided that the following conditions | ||
14 | * are met: | ||
15 | * | ||
16 | * Redistributions of source code must retain the above copyright | ||
17 | * notice, this list of conditions and the following disclaimer. | ||
18 | * | ||
19 | * Redistributions in binary form must reproduce the above copyright | ||
20 | * notice, this list of conditions and the following disclaimer in the | ||
21 | * documentation and/or other materials provided with the | ||
22 | * distribution. | ||
23 | * | ||
24 | * Neither the name of Texas Instruments Incorporated nor the names of | ||
25 | * its contributors may be used to endorse or promote products derived | ||
26 | * from this software without specific prior written permission. | ||
27 | * | ||
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
31 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
32 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
33 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
34 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
35 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
36 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
37 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
39 | * | ||
40 | * \par | ||
41 | */ | ||
42 | |||
43 | /** | ||
44 | * This file contains an example device configuration for the pcie LLD. | ||
45 | * It is not precompiled to facilitate user modification of the file. | ||
46 | */ | ||
47 | |||
48 | #include <stdint.h> | ||
49 | #include <stdlib.h> | ||
50 | |||
51 | /* CSL RL includes */ | ||
52 | #include <ti/csl/cslr_device.h> | ||
53 | #include <ti/csl/cslr_bootcfg.h> | ||
54 | |||
55 | #include <ti/csl/csl_bootcfg.h> | ||
56 | |||
57 | /* pcie LLD includes */ | ||
58 | #include <ti/drv/pcie/soc/pcie_soc.h> | ||
59 | #include <ti/drv/pcie/pcie.h> | ||
60 | #include <ti/drv/pcie/src/v0/pcie.h> | ||
61 | |||
62 | /** @addtogroup PCIE_LLD_DATASTRUCT | ||
63 | @{ | ||
64 | */ | ||
65 | |||
66 | /** @brief PCIE v0 calltable */ | ||
67 | Pcie_FxnTable fxnTablev0 = | ||
68 | { | ||
69 | /*! Function to set PCIE to EP or RC for one device */ | ||
70 | Pciev0_setInterfaceMode, | ||
71 | /*! Function to get the PCIE data area base address & size */ | ||
72 | Pciev0_getMemSpaceRange, | ||
73 | /*! Function to read any PCIE register(s) */ | ||
74 | Pciev0_readRegs, | ||
75 | /*! Function to write any PCIE register(s) */ | ||
76 | Pciev0_writeRegs, | ||
77 | /*! Function to configure outbound translation registers */ | ||
78 | Pciev0_cfgObOffset, | ||
79 | /*! Function to configure inbound translation registers */ | ||
80 | Pciev0_cfgIbTrans, | ||
81 | /*! Function to configure a BAR register */ | ||
82 | Pciev0_cfgBar | ||
83 | }; | ||
84 | |||
85 | Pcie_DeviceCfgBaseAddr baseAddrDev0 = | ||
86 | { | ||
87 | (void *)CSL_PCIE_0_SLV_CFG_REGS, | ||
88 | (void *)CSL_PCIE_0_SLV_DATA, | ||
89 | (volatile uint32_t *)&hBootCfg->DEVCFG, | ||
90 | CSL_BOOTCFG_DEVCFG_PCIE_DEV_TYPE_MASK, | ||
91 | CSL_BOOTCFG_DEVCFG_PCIE_DEV_TYPE_SHIFT | ||
92 | }; | ||
93 | |||
94 | Pcie_DeviceCfgBaseAddr baseAddrDev1 = | ||
95 | { | ||
96 | (void *)CSL_PCIE_1_SLV_CFG_REGS, | ||
97 | (void *)CSL_PCIE_1_SLV_DATA, | ||
98 | (volatile uint32_t *)&hBootCfg->DEVCFG, | ||
99 | CSL_BOOTCFG_DEVCFG_PCIE1_DEV_TYPE_MASK, | ||
100 | CSL_BOOTCFG_DEVCFG_PCIE1_DEV_TYPE_SHIFT | ||
101 | }; | ||
102 | |||
103 | /** @brief PCIE LLD initialization parameters */ | ||
104 | const Pcie_InitCfg pcieInitCfg = | ||
105 | { | ||
106 | { | ||
107 | { | ||
108 | &baseAddrDev0, | ||
109 | &baseAddrDev1, | ||
110 | NULL, | ||
111 | NULL | ||
112 | }, | ||
113 | { | ||
114 | &fxnTablev0, | ||
115 | &fxnTablev0, | ||
116 | NULL, | ||
117 | NULL | ||
118 | } | ||
119 | } | ||
120 | }; | ||
121 | |||
122 | /** | ||
123 | @} | ||
124 | */ | ||
125 | |||
diff --git a/soc/k2h/src/pcie_soc.c b/soc/k2h/src/pcie_soc.c new file mode 100644 index 0000000..c5ddfce --- /dev/null +++ b/soc/k2h/src/pcie_soc.c | |||
@@ -0,0 +1,116 @@ | |||
1 | /** | ||
2 | * @file k2h/src/pcie_soc.c | ||
3 | * | ||
4 | * @brief | ||
5 | * This file contains the device specific configuration and initialization routines | ||
6 | * for pcie Low Level Driver. | ||
7 | * | ||
8 | * \par | ||
9 | * ============================================================================ | ||
10 | * @n (C) Copyright 2013-2015, Texas Instruments, Inc. | ||
11 | * | ||
12 | * Redistribution and use in source and binary forms, with or without | ||
13 | * modification, are permitted provided that the following conditions | ||
14 | * are met: | ||
15 | * | ||
16 | * Redistributions of source code must retain the above copyright | ||
17 | * notice, this list of conditions and the following disclaimer. | ||
18 | * | ||
19 | * Redistributions in binary form must reproduce the above copyright | ||
20 | * notice, this list of conditions and the following disclaimer in the | ||
21 | * documentation and/or other materials provided with the | ||
22 | * distribution. | ||
23 | * | ||
24 | * Neither the name of Texas Instruments Incorporated nor the names of | ||
25 | * its contributors may be used to endorse or promote products derived | ||
26 | * from this software without specific prior written permission. | ||
27 | * | ||
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
31 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
32 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
33 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
34 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
35 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
36 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
37 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
39 | * | ||
40 | * \par | ||
41 | */ | ||
42 | |||
43 | /** | ||
44 | * This file contains an example device configuration for the pcie LLD. | ||
45 | * It is not precompiled to facilitate user modification of the file. | ||
46 | */ | ||
47 | |||
48 | #include <stdint.h> | ||
49 | #include <stdlib.h> | ||
50 | |||
51 | /* CSL RL includes */ | ||
52 | #include <ti/csl/cslr_device.h> | ||
53 | #include <ti/csl/cslr_bootcfg.h> | ||
54 | |||
55 | #include <ti/csl/csl_bootcfg.h> | ||
56 | |||
57 | /* pcie LLD includes */ | ||
58 | #include <ti/drv/pcie/soc/pcie_soc.h> | ||
59 | #include <ti/drv/pcie/pcie.h> | ||
60 | #include <ti/drv/pcie/src/v0/pcie.h> | ||
61 | |||
62 | /** @addtogroup PCIE_LLD_DATASTRUCT | ||
63 | @{ | ||
64 | */ | ||
65 | |||
66 | /** @brief PCIE v0 calltable */ | ||
67 | Pcie_FxnTable fxnTablev0 = | ||
68 | { | ||
69 | /*! Function to set PCIE to EP or RC for one device */ | ||
70 | Pciev0_setInterfaceMode, | ||
71 | /*! Function to get the PCIE data area base address & size */ | ||
72 | Pciev0_getMemSpaceRange, | ||
73 | /*! Function to read any PCIE register(s) */ | ||
74 | Pciev0_readRegs, | ||
75 | /*! Function to write any PCIE register(s) */ | ||
76 | Pciev0_writeRegs, | ||
77 | /*! Function to configure outbound translation registers */ | ||
78 | Pciev0_cfgObOffset, | ||
79 | /*! Function to configure inbound translation registers */ | ||
80 | Pciev0_cfgIbTrans, | ||
81 | /*! Function to configure a BAR register */ | ||
82 | Pciev0_cfgBar | ||
83 | }; | ||
84 | |||
85 | Pcie_DeviceCfgBaseAddr baseAddrDev0 = | ||
86 | { | ||
87 | (void *)CSL_PCIE_SLV_CFG_REGS, | ||
88 | (void *)CSL_PCIE_SLV_DATA, | ||
89 | (volatile uint32_t *)&hBootCfg->DEVCFG, | ||
90 | CSL_BOOTCFG_DEVCFG_PCIESSMODE_MASK, | ||
91 | CSL_BOOTCFG_DEVCFG_PCIESSMODE_SHIFT | ||
92 | }; | ||
93 | |||
94 | /** @brief PCIE LLD initialization parameters */ | ||
95 | const Pcie_InitCfg pcieInitCfg = | ||
96 | { | ||
97 | { | ||
98 | { | ||
99 | &baseAddrDev0, | ||
100 | NULL, | ||
101 | NULL, | ||
102 | NULL | ||
103 | }, | ||
104 | { | ||
105 | &fxnTablev0, | ||
106 | NULL, | ||
107 | NULL, | ||
108 | NULL | ||
109 | } | ||
110 | } | ||
111 | }; | ||
112 | |||
113 | /** | ||
114 | @} | ||
115 | */ | ||
116 | |||
diff --git a/soc/k2k/src/pcie_soc.c b/soc/k2k/src/pcie_soc.c new file mode 100644 index 0000000..6a1efa5 --- /dev/null +++ b/soc/k2k/src/pcie_soc.c | |||
@@ -0,0 +1,116 @@ | |||
1 | /** | ||
2 | * @file k2k/src/pcie_soc.c | ||
3 | * | ||
4 | * @brief | ||
5 | * This file contains the device specific configuration and initialization routines | ||
6 | * for pcie Low Level Driver. | ||
7 | * | ||
8 | * \par | ||
9 | * ============================================================================ | ||
10 | * @n (C) Copyright 2013-2015, Texas Instruments, Inc. | ||
11 | * | ||
12 | * Redistribution and use in source and binary forms, with or without | ||
13 | * modification, are permitted provided that the following conditions | ||
14 | * are met: | ||
15 | * | ||
16 | * Redistributions of source code must retain the above copyright | ||
17 | * notice, this list of conditions and the following disclaimer. | ||
18 | * | ||
19 | * Redistributions in binary form must reproduce the above copyright | ||
20 | * notice, this list of conditions and the following disclaimer in the | ||
21 | * documentation and/or other materials provided with the | ||
22 | * distribution. | ||
23 | * | ||
24 | * Neither the name of Texas Instruments Incorporated nor the names of | ||
25 | * its contributors may be used to endorse or promote products derived | ||
26 | * from this software without specific prior written permission. | ||
27 | * | ||
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
31 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
32 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
33 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
34 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
35 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
36 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
37 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
39 | * | ||
40 | * \par | ||
41 | */ | ||
42 | |||
43 | /** | ||
44 | * This file contains an example device configuration for the pcie LLD. | ||
45 | * It is not precompiled to facilitate user modification of the file. | ||
46 | */ | ||
47 | |||
48 | #include <stdint.h> | ||
49 | #include <stdlib.h> | ||
50 | |||
51 | /* CSL RL includes */ | ||
52 | #include <ti/csl/cslr_device.h> | ||
53 | #include <ti/csl/cslr_bootcfg.h> | ||
54 | |||
55 | #include <ti/csl/csl_bootcfg.h> | ||
56 | |||
57 | /* pcie LLD includes */ | ||
58 | #include <ti/drv/pcie/soc/pcie_soc.h> | ||
59 | #include <ti/drv/pcie/pcie.h> | ||
60 | #include <ti/drv/pcie/src/v0/pcie.h> | ||
61 | |||
62 | /** @addtogroup PCIE_LLD_DATASTRUCT | ||
63 | @{ | ||
64 | */ | ||
65 | |||
66 | /** @brief PCIE v0 calltable */ | ||
67 | Pcie_FxnTable fxnTablev0 = | ||
68 | { | ||
69 | /*! Function to set PCIE to EP or RC for one device */ | ||
70 | Pciev0_setInterfaceMode, | ||
71 | /*! Function to get the PCIE data area base address & size */ | ||
72 | Pciev0_getMemSpaceRange, | ||
73 | /*! Function to read any PCIE register(s) */ | ||
74 | Pciev0_readRegs, | ||
75 | /*! Function to write any PCIE register(s) */ | ||
76 | Pciev0_writeRegs, | ||
77 | /*! Function to configure outbound translation registers */ | ||
78 | Pciev0_cfgObOffset, | ||
79 | /*! Function to configure inbound translation registers */ | ||
80 | Pciev0_cfgIbTrans, | ||
81 | /*! Function to configure a BAR register */ | ||
82 | Pciev0_cfgBar | ||
83 | }; | ||
84 | |||
85 | Pcie_DeviceCfgBaseAddr baseAddrDev0 = | ||
86 | { | ||
87 | (void *)CSL_PCIE_SLV_CFG_REGS, | ||
88 | (void *)CSL_PCIE_SLV_DATA, | ||
89 | (volatile uint32_t *)&hBootCfg->DEVCFG, | ||
90 | CSL_BOOTCFG_DEVCFG_PCIESSMODE_MASK, | ||
91 | CSL_BOOTCFG_DEVCFG_PCIESSMODE_SHIFT | ||
92 | }; | ||
93 | |||
94 | /** @brief PCIE LLD initialization parameters */ | ||
95 | const Pcie_InitCfg pcieInitCfg = | ||
96 | { | ||
97 | { | ||
98 | { | ||
99 | &baseAddrDev0, | ||
100 | NULL, | ||
101 | NULL, | ||
102 | NULL | ||
103 | }, | ||
104 | { | ||
105 | &fxnTablev0, | ||
106 | NULL, | ||
107 | NULL, | ||
108 | NULL | ||
109 | } | ||
110 | } | ||
111 | }; | ||
112 | |||
113 | /** | ||
114 | @} | ||
115 | */ | ||
116 | |||
diff --git a/soc/k2l/src/pcie_soc.c b/soc/k2l/src/pcie_soc.c new file mode 100644 index 0000000..3f42191 --- /dev/null +++ b/soc/k2l/src/pcie_soc.c | |||
@@ -0,0 +1,125 @@ | |||
1 | /** | ||
2 | * @file k2l/src/pcie_soc.c | ||
3 | * | ||
4 | * @brief | ||
5 | * This file contains the device specific configuration and initialization routines | ||
6 | * for pcie Low Level Driver. | ||
7 | * | ||
8 | * \par | ||
9 | * ============================================================================ | ||
10 | * @n (C) Copyright 2013-2015, Texas Instruments, Inc. | ||
11 | * | ||
12 | * Redistribution and use in source and binary forms, with or without | ||
13 | * modification, are permitted provided that the following conditions | ||
14 | * are met: | ||
15 | * | ||
16 | * Redistributions of source code must retain the above copyright | ||
17 | * notice, this list of conditions and the following disclaimer. | ||
18 | * | ||
19 | * Redistributions in binary form must reproduce the above copyright | ||
20 | * notice, this list of conditions and the following disclaimer in the | ||
21 | * documentation and/or other materials provided with the | ||
22 | * distribution. | ||
23 | * | ||
24 | * Neither the name of Texas Instruments Incorporated nor the names of | ||
25 | * its contributors may be used to endorse or promote products derived | ||
26 | * from this software without specific prior written permission. | ||
27 | * | ||
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
31 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
32 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
33 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
34 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
35 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
36 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
37 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
39 | * | ||
40 | * \par | ||
41 | */ | ||
42 | |||
43 | /** | ||
44 | * This file contains an example device configuration for the pcie LLD. | ||
45 | * It is not precompiled to facilitate user modification of the file. | ||
46 | */ | ||
47 | |||
48 | #include <stdint.h> | ||
49 | #include <stdlib.h> | ||
50 | |||
51 | /* CSL RL includes */ | ||
52 | #include <ti/csl/cslr_device.h> | ||
53 | #include <ti/csl/cslr_bootcfg.h> | ||
54 | |||
55 | #include <ti/csl/csl_bootcfg.h> | ||
56 | |||
57 | /* pcie LLD includes */ | ||
58 | #include <ti/drv/pcie/soc/pcie_soc.h> | ||
59 | #include <ti/drv/pcie/pcie.h> | ||
60 | #include <ti/drv/pcie/src/v0/pcie.h> | ||
61 | |||
62 | /** @addtogroup PCIE_LLD_DATASTRUCT | ||
63 | @{ | ||
64 | */ | ||
65 | |||
66 | /** @brief PCIE v0 calltable */ | ||
67 | Pcie_FxnTable fxnTablev0 = | ||
68 | { | ||
69 | /*! Function to set PCIE to EP or RC for one device */ | ||
70 | Pciev0_setInterfaceMode, | ||
71 | /*! Function to get the PCIE data area base address & size */ | ||
72 | Pciev0_getMemSpaceRange, | ||
73 | /*! Function to read any PCIE register(s) */ | ||
74 | Pciev0_readRegs, | ||
75 | /*! Function to write any PCIE register(s) */ | ||
76 | Pciev0_writeRegs, | ||
77 | /*! Function to configure outbound translation registers */ | ||
78 | Pciev0_cfgObOffset, | ||
79 | /*! Function to configure inbound translation registers */ | ||
80 | Pciev0_cfgIbTrans, | ||
81 | /*! Function to configure a BAR register */ | ||
82 | Pciev0_cfgBar | ||
83 | }; | ||
84 | |||
85 | Pcie_DeviceCfgBaseAddr baseAddrDev0 = | ||
86 | { | ||
87 | (void *)CSL_PCIE_0_SLV_CFG_REGS, | ||
88 | (void *)CSL_PCIE_0_SLV_DATA, | ||
89 | (volatile uint32_t *)&hBootCfg->DEVCFG, | ||
90 | CSL_BOOTCFG_DEVCFG_PCIESS_0_MODE_MASK, | ||
91 | CSL_BOOTCFG_DEVCFG_PCIESS_0_MODE_SHIFT | ||
92 | }; | ||
93 | |||
94 | Pcie_DeviceCfgBaseAddr baseAddrDev1 = | ||
95 | { | ||
96 | (void *)CSL_PCIE_1_SLV_CFG_REGS, | ||
97 | (void *)CSL_PCIE_1_SLV_DATA, | ||
98 | (volatile uint32_t *)&hBootCfg->DEVCFG, | ||
99 | CSL_BOOTCFG_DEVCFG_PCIESS_1_MODE_MASK, | ||
100 | CSL_BOOTCFG_DEVCFG_PCIESS_1_MODE_SHIFT | ||
101 | }; | ||
102 | |||
103 | /** @brief PCIE LLD initialization parameters */ | ||
104 | const Pcie_InitCfg pcieInitCfg = | ||
105 | { | ||
106 | { | ||
107 | { | ||
108 | &baseAddrDev0, | ||
109 | &baseAddrDev1, | ||
110 | NULL, | ||
111 | NULL | ||
112 | }, | ||
113 | { | ||
114 | &fxnTablev0, | ||
115 | &fxnTablev0, | ||
116 | NULL, | ||
117 | NULL | ||
118 | } | ||
119 | } | ||
120 | }; | ||
121 | |||
122 | /** | ||
123 | @} | ||
124 | */ | ||
125 | |||
diff --git a/soc/pcie_soc.h b/soc/pcie_soc.h new file mode 100644 index 0000000..916a5af --- /dev/null +++ b/soc/pcie_soc.h | |||
@@ -0,0 +1,64 @@ | |||
1 | /** | ||
2 | * @file pcie_soc.h | ||
3 | * | ||
4 | * @brief | ||
5 | * | ||
6 | * Extern for device definition in platform/src/pcie_device.h | ||
7 | * | ||
8 | * \par | ||
9 | * ============================================================================ | ||
10 | * @n (C) Copyright 2013-2015, Texas Instruments, Inc. | ||
11 | * | ||
12 | * Redistribution and use in source and binary forms, with or without | ||
13 | * modification, are permitted provided that the following conditions | ||
14 | * are met: | ||
15 | * | ||
16 | * Redistributions of source code must retain the above copyright | ||
17 | * notice, this list of conditions and the following disclaimer. | ||
18 | * | ||
19 | * Redistributions in binary form must reproduce the above copyright | ||
20 | * notice, this list of conditions and the following disclaimer in the | ||
21 | * documentation and/or other materials provided with the | ||
22 | * distribution. | ||
23 | * | ||
24 | * Neither the name of Texas Instruments Incorporated nor the names of | ||
25 | * its contributors may be used to endorse or promote products derived | ||
26 | * from this software without specific prior written permission. | ||
27 | * | ||
28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
29 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
30 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
31 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
32 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
33 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
34 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
35 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
36 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
37 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
38 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
39 | * | ||
40 | * \par | ||
41 | */ | ||
42 | |||
43 | #ifndef __PCIE_DEVICE_H__ | ||
44 | #define __PCIE_DEVICE_H__ | ||
45 | |||
46 | #ifdef __cplusplus | ||
47 | extern "C" { | ||
48 | #endif | ||
49 | |||
50 | /* System level header files */ | ||
51 | #include <stdint.h> | ||
52 | #include <stdlib.h> | ||
53 | |||
54 | /* pcie LLD includes */ | ||
55 | #include <ti/drv/pcie/pcie.h> | ||
56 | |||
57 | extern const Pcie_InitCfg pcieInitCfg; | ||
58 | |||
59 | #ifdef __cplusplus | ||
60 | } | ||
61 | #endif | ||
62 | #endif /* __PCIE_DEVICE_H__ */ | ||
63 | |||
64 | /* Nothing past this point */ | ||