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| author | Piyali Goswami | 2020-08-15 08:28:03 -0500 |
|---|---|---|
| committer | Piyali Goswami | 2020-08-15 08:28:03 -0500 |
| commit | d1107c19f27c395d13a53957b0d7353c671b78a8 (patch) | |
| tree | 20c58a8f0f2dc1048c60a6db576fa140bf619bef | |
| parent | 66196e0e313268ffa4d1d82983b5b5c572942378 (diff) | |
| download | pm-lld-d1107c19f27c395d13a53957b0d7353c671b78a8.tar.gz pm-lld-d1107c19f27c395d13a53957b0d7353c671b78a8.tar.xz pm-lld-d1107c19f27c395d13a53957b0d7353c671b78a8.zip | |
examples: main_dmsc.c J7200 A72SS0 CORE0 ID macro changes
Updated the main_dmsc.c to incorporate the Spec data CORE0 A72SS ID changes
Signed-off-by: Piyali Goswami <piyali_g@ti.com>
| -rwxr-xr-x | examples/systemconfig/main_dmsc.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/examples/systemconfig/main_dmsc.c b/examples/systemconfig/main_dmsc.c index 1eec5f3..03888a3 100755 --- a/examples/systemconfig/main_dmsc.c +++ b/examples/systemconfig/main_dmsc.c | |||
| @@ -1413,8 +1413,14 @@ void alwaysDisabledConfig(void) | |||
| 1413 | (TISCI_DEV_MCU_R5FSS0 == gModuleNum[idx]) || | 1413 | (TISCI_DEV_MCU_R5FSS0 == gModuleNum[idx]) || |
| 1414 | #endif | 1414 | #endif |
| 1415 | #if defined (BUILD_MPU1_0) | 1415 | #if defined (BUILD_MPU1_0) |
| 1416 | #if defined (SOC_J721E) | ||
| 1416 | (TISCI_DEV_A72SS0_CORE0 == gModuleNum[idx]) || | 1417 | (TISCI_DEV_A72SS0_CORE0 == gModuleNum[idx]) || |
| 1417 | (TISCI_DEV_A72SS0_CORE1 == gModuleNum[idx]) || | 1418 | (TISCI_DEV_A72SS0_CORE1 == gModuleNum[idx]) || |
| 1419 | #endif | ||
| 1420 | #if defined (SOC_J7200) | ||
| 1421 | (TISCI_DEV_A72SS0_CORE0_0 == gModuleNum[idx]) || | ||
| 1422 | (TISCI_DEV_A72SS0_CORE0_1 == gModuleNum[idx]) || | ||
| 1423 | #endif | ||
| 1418 | #endif | 1424 | #endif |
| 1419 | #if defined (BUILD_MCU2_0) | 1425 | #if defined (BUILD_MCU2_0) |
| 1420 | (TISCI_DEV_R5FSS0_CORE0 == gModuleNum[idx]) || | 1426 | (TISCI_DEV_R5FSS0_CORE0 == gModuleNum[idx]) || |
| @@ -1541,8 +1547,14 @@ void retentionConfig(void) | |||
| 1541 | (TISCI_DEV_MCU_R5FSS0 == gModuleNum[idx]) || | 1547 | (TISCI_DEV_MCU_R5FSS0 == gModuleNum[idx]) || |
| 1542 | #endif | 1548 | #endif |
| 1543 | #if defined (BUILD_MPU1_0) | 1549 | #if defined (BUILD_MPU1_0) |
| 1550 | #if defined (SOC_J721E) | ||
| 1544 | (TISCI_DEV_A72SS0_CORE0 == gModuleNum[idx]) || | 1551 | (TISCI_DEV_A72SS0_CORE0 == gModuleNum[idx]) || |
| 1545 | (TISCI_DEV_A72SS0_CORE1 == gModuleNum[idx]) || | 1552 | (TISCI_DEV_A72SS0_CORE1 == gModuleNum[idx]) || |
| 1553 | #endif | ||
| 1554 | #if defined (SOC_J7200) | ||
| 1555 | (TISCI_DEV_A72SS0_CORE0_0 == gModuleNum[idx]) || | ||
| 1556 | (TISCI_DEV_A72SS0_CORE0_1 == gModuleNum[idx]) || | ||
| 1557 | #endif | ||
| 1546 | #endif | 1558 | #endif |
| 1547 | #if defined (BUILD_MCU2_0) | 1559 | #if defined (BUILD_MCU2_0) |
| 1548 | (TISCI_DEV_R5FSS0_CORE0 == gModuleNum[idx]) || | 1560 | (TISCI_DEV_R5FSS0_CORE0 == gModuleNum[idx]) || |