diff options
author | Tinku Mannan | 2018-06-19 07:51:41 -0500 |
---|---|---|
committer | Tinku Mannan | 2018-06-19 08:24:47 -0500 |
commit | bbea0b8aabfd107971738529f63815dbe778c2ed (patch) | |
tree | 7e5f23b29b27aab647b9fd9fec5e1d599c808a55 | |
parent | f4837e9efdfa52f72c0702e6eb3f361adb2a4f4b (diff) | |
download | pruss-lld-bbea0b8aabfd107971738529f63815dbe778c2ed.tar.gz pruss-lld-bbea0b8aabfd107971738529f63815dbe778c2ed.tar.xz pruss-lld-bbea0b8aabfd107971738529f63815dbe778c2ed.zip |
Updates for SOC files to sync with latest SOC implementation for am57x, am335x, am437x, k2g
-rw-r--r-- | soc/am335x/pruicss_soc.c | 58 | ||||
-rw-r--r-- | soc/am437x/pruicss_soc.c | 6 | ||||
-rw-r--r-- | soc/am571x/pruicss_soc.c | 32 | ||||
-rw-r--r-- | soc/am572x/pruicss_soc.c | 18 | ||||
-rw-r--r-- | soc/am574x/pruicss_soc.c | 20 | ||||
-rw-r--r-- | soc/am65xx/pruicss_soc.c | 2 | ||||
-rw-r--r-- | soc/k2g/pruicss_soc.c | 6 | ||||
-rw-r--r-- | src/pruicss_drv.c | 1 |
8 files changed, 65 insertions, 78 deletions
diff --git a/soc/am335x/pruicss_soc.c b/soc/am335x/pruicss_soc.c index a58f7b1..b7cb374 100644 --- a/soc/am335x/pruicss_soc.c +++ b/soc/am335x/pruicss_soc.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * @brief This is soc specific configuration file . | 4 | * @brief This is soc specific configuration file . |
5 | */ | 5 | */ |
6 | /* | 6 | /* |
7 | * Copyright (c) 2015, Texas Instruments Incorporated | 7 | * Copyright (c) 2015-2018, Texas Instruments Incorporated |
8 | * All rights reserved. | 8 | * All rights reserved. |
9 | * | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without |
@@ -46,35 +46,33 @@ | |||
46 | 46 | ||
47 | const PRUICSS_HwAttrs prussInitCfg = | 47 | const PRUICSS_HwAttrs prussInitCfg = |
48 | { | 48 | { |
49 | 0x4a300000, | 49 | 0x4a300000, |
50 | 0, | 50 | 0, |
51 | SOC_PRU_ICSS_PRU0_CTRL_REG, | 51 | SOC_PRU_ICSS_PRU0_CTRL_REG, |
52 | SOC_PRU_ICSS_PRU1_CTRL_REG, | 52 | SOC_PRU_ICSS_PRU1_CTRL_REG, |
53 | SOC_PRU_ICSS_INTC_REG, | 53 | SOC_PRU_ICSS_INTC_REG, |
54 | SOC_PRU_ICSS_CFG_REG, | 54 | SOC_PRU_ICSS_CFG_REG, |
55 | SOC_PRU_ICSS_UART_REG, | 55 | SOC_PRU_ICSS_UART_REG, |
56 | SOC_PRU_ICSS_IEP_REG, | 56 | SOC_PRU_ICSS_IEP_REG, |
57 | SOC_PRU_ICSS_ECAP_REG, | 57 | SOC_PRU_ICSS_ECAP_REG, |
58 | SOC_PRU_ICSS_MII_RT_CFG_REG, | 58 | SOC_PRU_ICSS_MII_RT_CFG_REG, |
59 | SOC_PRU_ICSS_MII_MDIO_REG, | 59 | SOC_PRU_ICSS_MII_MDIO_REG, |
60 | SOC_PRU_ICSS_DATA_RAM0, | 60 | SOC_PRU_ICSS_DATA_RAM0, |
61 | SOC_PRU_ICSS_DATA_RAM1, | 61 | SOC_PRU_ICSS_DATA_RAM1, |
62 | SOC_PRU_ICSS_INST_RAM0, | 62 | SOC_PRU_ICSS_INST_RAM0, |
63 | SOC_PRU_ICSS_INST_RAM1, | 63 | SOC_PRU_ICSS_INST_RAM1, |
64 | SOC_PRU_ICSS_SHARED_RAM, | 64 | SOC_PRU_ICSS_SHARED_RAM, |
65 | 0U, | 65 | 0U, |
66 | 0U, | 66 | 0U, |
67 | 0U, | 67 | 0U, |
68 | 0U, | 68 | 0U, |
69 | SOC_PRU_ICSS_DATA_RAM0_SIZE, | 69 | SOC_PRU_ICSS_DATA_RAM0_SIZE, |
70 | SOC_PRU_ICSS_DATA_RAM1_SIZE, | 70 | SOC_PRU_ICSS_DATA_RAM1_SIZE, |
71 | SOC_PRU_ICSS_INST_RAM0_SIZE, | 71 | SOC_PRU_ICSS_INST_RAM0_SIZE, |
72 | SOC_PRU_ICSS_INST_RAM1_SIZE, | 72 | SOC_PRU_ICSS_INST_RAM1_SIZE, |
73 | SOC_PRU_ICSS_SHARED_RAM_SIZE, | 73 | SOC_PRU_ICSS_SHARED_RAM_SIZE, |
74 | 0U, | 74 | 0U, |
75 | 0U, | 75 | 0U |
76 | 0U, | ||
77 | 0U | ||
78 | }; | 76 | }; |
79 | 77 | ||
80 | /* PRUICSS objects */ | 78 | /* PRUICSS objects */ |
diff --git a/soc/am437x/pruicss_soc.c b/soc/am437x/pruicss_soc.c index 942b46c..5caa945 100644 --- a/soc/am437x/pruicss_soc.c +++ b/soc/am437x/pruicss_soc.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * @brief This is soc specific configuration file . | 4 | * @brief This is soc specific configuration file . |
5 | */ | 5 | */ |
6 | /* | 6 | /* |
7 | * Copyright (c) 2015, Texas Instruments Incorporated | 7 | * Copyright (c) 2015-2018, Texas Instruments Incorporated |
8 | * All rights reserved. | 8 | * All rights reserved. |
9 | * | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without |
@@ -72,8 +72,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
72 | SOC_PRU_ICSS0_U_INST_RAM1_SIZE, | 72 | SOC_PRU_ICSS0_U_INST_RAM1_SIZE, |
73 | SOC_PRU_ICSS0_U_SHARED_RAM_SIZE, | 73 | SOC_PRU_ICSS0_U_SHARED_RAM_SIZE, |
74 | 0U, | 74 | 0U, |
75 | 0U, | ||
76 | 0U, | ||
77 | 0U | 75 | 0U |
78 | }, | 76 | }, |
79 | { | 77 | { |
@@ -103,8 +101,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
103 | SOC_PRU_ICSS1_U_INST_RAM1_SIZE, | 101 | SOC_PRU_ICSS1_U_INST_RAM1_SIZE, |
104 | SOC_PRU_ICSS1_U_SHARED_RAM_SIZE, | 102 | SOC_PRU_ICSS1_U_SHARED_RAM_SIZE, |
105 | 0U, | 103 | 0U, |
106 | 0U, | ||
107 | 0U, | ||
108 | 0U | 104 | 0U |
109 | } | 105 | } |
110 | }; | 106 | }; |
diff --git a/soc/am571x/pruicss_soc.c b/soc/am571x/pruicss_soc.c index a6b2761..0dd461f 100644 --- a/soc/am571x/pruicss_soc.c +++ b/soc/am571x/pruicss_soc.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * @brief This is soc specific configuration file . | 4 | * @brief This is soc specific configuration file . |
5 | */ | 5 | */ |
6 | /* | 6 | /* |
7 | * Copyright (c) 2015, Texas Instruments Incorporated | 7 | * Copyright (c) 2015-2018, Texas Instruments Incorporated |
8 | * All rights reserved. | 8 | * All rights reserved. |
9 | * | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without |
@@ -74,8 +74,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
74 | CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE, | 74 | CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE, |
75 | CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE, | 75 | CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE, |
76 | 0U, | 76 | 0U, |
77 | 0U, | ||
78 | 0U, | ||
79 | 0U | 77 | 0U |
80 | }, | 78 | }, |
81 | { | 79 | { |
@@ -105,8 +103,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
105 | CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE, | 103 | CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE, |
106 | CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE, | 104 | CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE, |
107 | 0U, | 105 | 0U, |
108 | 0U, | ||
109 | 0U, | ||
110 | 0U | 106 | 0U |
111 | } | 107 | } |
112 | #elif defined (__TMS320C6X__) | 108 | #elif defined (__TMS320C6X__) |
@@ -137,8 +133,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
137 | CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE, | 133 | CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE, |
138 | CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE, | 134 | CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE, |
139 | 0U, | 135 | 0U, |
140 | 0U, | ||
141 | 0U, | ||
142 | 0U | 136 | 0U |
143 | }, | 137 | }, |
144 | { | 138 | { |
@@ -158,11 +152,17 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
158 | CSL_DSP_PRUSS2_U_INST_RAM0_12KB_REGS, | 152 | CSL_DSP_PRUSS2_U_INST_RAM0_12KB_REGS, |
159 | CSL_DSP_PRUSS2_U_INST_RAM1_12KB_REGS, | 153 | CSL_DSP_PRUSS2_U_INST_RAM1_12KB_REGS, |
160 | CSL_DSP_PRUSS2_U_DATA_RAM_32KB_REGS, | 154 | CSL_DSP_PRUSS2_U_DATA_RAM_32KB_REGS, |
155 | 0U, | ||
156 | 0U, | ||
157 | 0U, | ||
158 | 0U, | ||
161 | CSL_DSP_PRUSS2_U_DATA_RAM0_8KB_SIZE, | 159 | CSL_DSP_PRUSS2_U_DATA_RAM0_8KB_SIZE, |
162 | CSL_DSP_PRUSS2_U_DATA_RAM1_8KB_SIZE, | 160 | CSL_DSP_PRUSS2_U_DATA_RAM1_8KB_SIZE, |
163 | CSL_DSP_PRUSS2_U_INST_RAM0_12KB_SIZE, | 161 | CSL_DSP_PRUSS2_U_INST_RAM0_12KB_SIZE, |
164 | CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE, | 162 | CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE, |
165 | CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE | 163 | CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE, |
164 | 0, | ||
165 | 0 | ||
166 | } | 166 | } |
167 | #else | 167 | #else |
168 | { | 168 | { |
@@ -182,11 +182,17 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
182 | CSL_MPU_PRUSS1_U_INST_RAM0_12KB_REGS, | 182 | CSL_MPU_PRUSS1_U_INST_RAM0_12KB_REGS, |
183 | CSL_MPU_PRUSS1_U_INST_RAM1_12KB_REGS, | 183 | CSL_MPU_PRUSS1_U_INST_RAM1_12KB_REGS, |
184 | CSL_MPU_PRUSS1_U_DATA_RAM_32KB_REGS, | 184 | CSL_MPU_PRUSS1_U_DATA_RAM_32KB_REGS, |
185 | 0U, | ||
186 | 0U, | ||
187 | 0U, | ||
188 | 0U, | ||
185 | CSL_MPU_PRUSS1_U_DATA_RAM0_8KB_SIZE, | 189 | CSL_MPU_PRUSS1_U_DATA_RAM0_8KB_SIZE, |
186 | CSL_MPU_PRUSS1_U_DATA_RAM1_8KB_SIZE, | 190 | CSL_MPU_PRUSS1_U_DATA_RAM1_8KB_SIZE, |
187 | CSL_MPU_PRUSS1_U_INST_RAM0_12KB_SIZE, | 191 | CSL_MPU_PRUSS1_U_INST_RAM0_12KB_SIZE, |
188 | CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE, | 192 | CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE, |
189 | CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE | 193 | CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE, |
194 | 0, | ||
195 | 0 | ||
190 | }, | 196 | }, |
191 | { | 197 | { |
192 | 0x4b280000, | 198 | 0x4b280000, |
@@ -205,11 +211,17 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
205 | CSL_MPU_PRUSS2_U_INST_RAM0_12KB_REGS, | 211 | CSL_MPU_PRUSS2_U_INST_RAM0_12KB_REGS, |
206 | CSL_MPU_PRUSS2_U_INST_RAM1_12KB_REGS, | 212 | CSL_MPU_PRUSS2_U_INST_RAM1_12KB_REGS, |
207 | CSL_MPU_PRUSS2_U_DATA_RAM_32KB_REGS, | 213 | CSL_MPU_PRUSS2_U_DATA_RAM_32KB_REGS, |
214 | 0U, | ||
215 | 0U, | ||
216 | 0U, | ||
217 | 0U, | ||
208 | CSL_MPU_PRUSS2_U_DATA_RAM0_8KB_SIZE, | 218 | CSL_MPU_PRUSS2_U_DATA_RAM0_8KB_SIZE, |
209 | CSL_MPU_PRUSS2_U_DATA_RAM1_8KB_SIZE, | 219 | CSL_MPU_PRUSS2_U_DATA_RAM1_8KB_SIZE, |
210 | CSL_MPU_PRUSS2_U_INST_RAM0_12KB_SIZE, | 220 | CSL_MPU_PRUSS2_U_INST_RAM0_12KB_SIZE, |
211 | CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE, | 221 | CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE, |
212 | CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE | 222 | CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE, |
223 | 0, | ||
224 | 0 | ||
213 | } | 225 | } |
214 | #endif | 226 | #endif |
215 | }; | 227 | }; |
diff --git a/soc/am572x/pruicss_soc.c b/soc/am572x/pruicss_soc.c index d5d7c26..8c31875 100644 --- a/soc/am572x/pruicss_soc.c +++ b/soc/am572x/pruicss_soc.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * @brief This is soc specific configuration file . | 4 | * @brief This is soc specific configuration file . |
5 | */ | 5 | */ |
6 | /* | 6 | /* |
7 | * Copyright (c) 2015, Texas Instruments Incorporated | 7 | * Copyright (c) 2015-2018, Texas Instruments Incorporated |
8 | * All rights reserved. | 8 | * All rights reserved. |
9 | * | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without |
@@ -74,8 +74,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
74 | CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE, | 74 | CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE, |
75 | CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE, | 75 | CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE, |
76 | 0U, | 76 | 0U, |
77 | 0U, | ||
78 | 0U, | ||
79 | 0U | 77 | 0U |
80 | }, | 78 | }, |
81 | { | 79 | { |
@@ -105,8 +103,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
105 | CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE, | 103 | CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE, |
106 | CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE, | 104 | CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE, |
107 | 0U, | 105 | 0U, |
108 | 0U, | ||
109 | 0U, | ||
110 | 0U | 106 | 0U |
111 | } | 107 | } |
112 | #elif defined (__TMS320C6X__) | 108 | #elif defined (__TMS320C6X__) |
@@ -137,8 +133,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
137 | CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE, | 133 | CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE, |
138 | CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE, | 134 | CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE, |
139 | 0U, | 135 | 0U, |
140 | 0U, | ||
141 | 0U, | ||
142 | 0U | 136 | 0U |
143 | }, | 137 | }, |
144 | { | 138 | { |
@@ -167,10 +161,8 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
167 | CSL_DSP_PRUSS2_U_INST_RAM0_12KB_SIZE, | 161 | CSL_DSP_PRUSS2_U_INST_RAM0_12KB_SIZE, |
168 | CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE, | 162 | CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE, |
169 | CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE, | 163 | CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE, |
170 | 0U, | 164 | 0U, |
171 | 0U, | 165 | 0U |
172 | 0U, | ||
173 | 0U | ||
174 | } | 166 | } |
175 | #else | 167 | #else |
176 | { | 168 | { |
@@ -200,8 +192,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
200 | CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE, | 192 | CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE, |
201 | CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE, | 193 | CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE, |
202 | 0U, | 194 | 0U, |
203 | 0U, | ||
204 | 0U, | ||
205 | 0U | 195 | 0U |
206 | }, | 196 | }, |
207 | { | 197 | { |
@@ -231,8 +221,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
231 | CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE, | 221 | CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE, |
232 | CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE, | 222 | CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE, |
233 | 0U, | 223 | 0U, |
234 | 0U, | ||
235 | 0U, | ||
236 | 0U | 224 | 0U |
237 | } | 225 | } |
238 | #endif | 226 | #endif |
diff --git a/soc/am574x/pruicss_soc.c b/soc/am574x/pruicss_soc.c index c61a917..049767f 100644 --- a/soc/am574x/pruicss_soc.c +++ b/soc/am574x/pruicss_soc.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * @brief This is soc specific configuration file . | 4 | * @brief This is soc specific configuration file . |
5 | */ | 5 | */ |
6 | /* | 6 | /* |
7 | * Copyright (c) 2017, Texas Instruments Incorporated | 7 | * Copyright (c) 2017-2018, Texas Instruments Incorporated |
8 | * All rights reserved. | 8 | * All rights reserved. |
9 | * | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without |
@@ -64,11 +64,17 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
64 | CSL_IPU_PRUSS1_U_INST_RAM0_12KB_REGS, | 64 | CSL_IPU_PRUSS1_U_INST_RAM0_12KB_REGS, |
65 | CSL_IPU_PRUSS1_U_INST_RAM1_12KB_REGS, | 65 | CSL_IPU_PRUSS1_U_INST_RAM1_12KB_REGS, |
66 | CSL_IPU_PRUSS1_U_DATA_RAM_32KB_REGS, | 66 | CSL_IPU_PRUSS1_U_DATA_RAM_32KB_REGS, |
67 | 0U, | ||
68 | 0U, | ||
69 | 0U, | ||
70 | 0U, | ||
67 | CSL_IPU_PRUSS1_U_DATA_RAM0_8KB_SIZE, | 71 | CSL_IPU_PRUSS1_U_DATA_RAM0_8KB_SIZE, |
68 | CSL_IPU_PRUSS1_U_DATA_RAM1_8KB_SIZE, | 72 | CSL_IPU_PRUSS1_U_DATA_RAM1_8KB_SIZE, |
69 | CSL_IPU_PRUSS1_U_INST_RAM0_12KB_SIZE, | 73 | CSL_IPU_PRUSS1_U_INST_RAM0_12KB_SIZE, |
70 | CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE, | 74 | CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE, |
71 | CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE | 75 | CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE, |
76 | 0U, | ||
77 | 0U | ||
72 | }, | 78 | }, |
73 | { | 79 | { |
74 | 0x4b280000, | 80 | 0x4b280000, |
@@ -97,8 +103,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
97 | CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE, | 103 | CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE, |
98 | CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE, | 104 | CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE, |
99 | 0U, | 105 | 0U, |
100 | 0U, | ||
101 | 0U, | ||
102 | 0U | 106 | 0U |
103 | } | 107 | } |
104 | #elif defined (__TMS320C6X__) | 108 | #elif defined (__TMS320C6X__) |
@@ -129,8 +133,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
129 | CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE, | 133 | CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE, |
130 | CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE, | 134 | CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE, |
131 | 0U, | 135 | 0U, |
132 | 0U, | ||
133 | 0U, | ||
134 | 0U | 136 | 0U |
135 | }, | 137 | }, |
136 | { | 138 | { |
@@ -160,8 +162,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
160 | CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE, | 162 | CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE, |
161 | CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE, | 163 | CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE, |
162 | 0U, | 164 | 0U, |
163 | 0U, | ||
164 | 0U, | ||
165 | 0U | 165 | 0U |
166 | } | 166 | } |
167 | #else | 167 | #else |
@@ -192,8 +192,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
192 | CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE, | 192 | CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE, |
193 | CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE, | 193 | CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE, |
194 | 0U, | 194 | 0U, |
195 | 0U, | ||
196 | 0U, | ||
197 | 0U | 195 | 0U |
198 | }, | 196 | }, |
199 | { | 197 | { |
@@ -223,8 +221,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
223 | CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE, | 221 | CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE, |
224 | CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE, | 222 | CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE, |
225 | 0U, | 223 | 0U, |
226 | 0U, | ||
227 | 0U, | ||
228 | 0U | 224 | 0U |
229 | } | 225 | } |
230 | #endif | 226 | #endif |
diff --git a/soc/am65xx/pruicss_soc.c b/soc/am65xx/pruicss_soc.c index b022ca5..71f3997 100644 --- a/soc/am65xx/pruicss_soc.c +++ b/soc/am65xx/pruicss_soc.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * @brief This is device specific configuration file . | 4 | * @brief This is device specific configuration file . |
5 | */ | 5 | */ |
6 | /* | 6 | /* |
7 | * Copyright (c) 2017, Texas Instruments Incorporated | 7 | * Copyright (c) 2017-2018, Texas Instruments Incorporated |
8 | * All rights reserved. | 8 | * All rights reserved. |
9 | * | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without |
diff --git a/soc/k2g/pruicss_soc.c b/soc/k2g/pruicss_soc.c index eefe767..4f39705 100644 --- a/soc/k2g/pruicss_soc.c +++ b/soc/k2g/pruicss_soc.c | |||
@@ -4,7 +4,7 @@ | |||
4 | * @brief This is device specific configuration file . | 4 | * @brief This is device specific configuration file . |
5 | */ | 5 | */ |
6 | /* | 6 | /* |
7 | * Copyright (c) 2016, Texas Instruments Incorporated | 7 | * Copyright (c) 2016-2018, Texas Instruments Incorporated |
8 | * All rights reserved. | 8 | * All rights reserved. |
9 | * | 9 | * |
10 | * Redistribution and use in source and binary forms, with or without | 10 | * Redistribution and use in source and binary forms, with or without |
@@ -76,8 +76,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
76 | CSL_ICSS_0_DATA_RAM_64KB_REGS_SIZE, | 76 | CSL_ICSS_0_DATA_RAM_64KB_REGS_SIZE, |
77 | 0U, | 77 | 0U, |
78 | 0U, | 78 | 0U, |
79 | 0U, | ||
80 | 0U, | ||
81 | }, | 79 | }, |
82 | { | 80 | { |
83 | CSL_ICSS_1_DATA_RAM_8KB_0_REGS, | 81 | CSL_ICSS_1_DATA_RAM_8KB_0_REGS, |
@@ -106,8 +104,6 @@ PRUICSS_HwAttrs prussInitCfg[2] = | |||
106 | CSL_ICSS_0_INST_RAM_16KB_1_REGS_SIZE, | 104 | CSL_ICSS_0_INST_RAM_16KB_1_REGS_SIZE, |
107 | CSL_ICSS_0_DATA_RAM_64KB_REGS_SIZE, | 105 | CSL_ICSS_0_DATA_RAM_64KB_REGS_SIZE, |
108 | 0U, | 106 | 0U, |
109 | 0U, | ||
110 | 0U, | ||
111 | 0U | 107 | 0U |
112 | } | 108 | } |
113 | }; | 109 | }; |
diff --git a/src/pruicss_drv.c b/src/pruicss_drv.c index 79f6905..d033f3c 100644 --- a/src/pruicss_drv.c +++ b/src/pruicss_drv.c | |||
@@ -44,6 +44,7 @@ | |||
44 | #include <ti/drv/pruss/soc/pruicss_v1.h> | 44 | #include <ti/drv/pruss/soc/pruicss_v1.h> |
45 | #include <ti/drv/pruss/src/pruicss_osal.h> | 45 | #include <ti/drv/pruss/src/pruicss_osal.h> |
46 | 46 | ||
47 | #include <ti/csl/cslr.h> | ||
47 | #include <ti/csl/src/ip/icss/V1/cslr_icss_pru_ctrl.h> | 48 | #include <ti/csl/src/ip/icss/V1/cslr_icss_pru_ctrl.h> |
48 | #include <ti/csl/src/ip/icss/V1/cslr_icss_intc.h> | 49 | #include <ti/csl/src/ip/icss/V1/cslr_icss_intc.h> |
49 | #include <ti/csl/src/ip/icss/V1/cslr_icss_cfg.h> | 50 | #include <ti/csl/src/ip/icss/V1/cslr_icss_cfg.h> |