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authorFrank Livingston2019-05-24 12:26:06 -0500
committerFrank Livingston2019-05-24 12:26:06 -0500
commitd148f74195fdb6559047353434f759aa3872a1f3 (patch)
tree4133b69e74ea6b0825d7fb479e1955aedf06b3db
parent4366dbfe9761b4de298986d4665787b6fe0b6f15 (diff)
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PRSDK-5738:Add code to update Deadband on LHS (instead of RHS) of PWM signal
Signed-off-by: Frank Livingston <frank-livingston@ti.com>
-rw-r--r--example/apps/icssg_pwm/firmware/src/iepPwm.c60
1 files changed, 50 insertions, 10 deletions
diff --git a/example/apps/icssg_pwm/firmware/src/iepPwm.c b/example/apps/icssg_pwm/firmware/src/iepPwm.c
index a014647..e133ebb 100644
--- a/example/apps/icssg_pwm/firmware/src/iepPwm.c
+++ b/example/apps/icssg_pwm/firmware/src/iepPwm.c
@@ -415,8 +415,8 @@ static void execInitLhsActionDiff(
415); 415);
416 416
417/* Update IEP PWM CMPx Shadow Registers. 417/* Update IEP PWM CMPx Shadow Registers.
418 Enable and DC Count reconfiguration handled jointly. */ 418 PWM Enable and DC Count reconfiguration handled jointly. */
419static Int32 updateIepPwmCmpxShReg( 419static Int32 updateIepPwmCmpxShRegPwmEnDc(
420 IcssgIepPwmObj *pIcssgIepPwmObj 420 IcssgIepPwmObj *pIcssgIepPwmObj
421); 421);
422 422
@@ -542,6 +542,11 @@ static void execRhsActionStash(
542 IcssgIepPwmObj *pIcssgIepPwmObj 542 IcssgIepPwmObj *pIcssgIepPwmObj
543); 543);
544 544
545/* Update IEP PWM CMPx Shadow Registers for DB reconfiguration. */
546static Int32 updateIepPwmCmpxShRegDb(
547 IcssgIepPwmObj *pIcssgIepPwmObj
548);
549
545 550
546/* ------------------------------------------------------------------------- * 551/* ------------------------------------------------------------------------- *
547 * External Functions * 552 * External Functions *
@@ -993,10 +998,9 @@ static Int32 iepPwmConfigLhs(
993 since all CMPx already updated as part of Period Count reconfiguration. 998 since all CMPx already updated as part of Period Count reconfiguration.
994 */ 999 */
995 if (pIepPwmFwRegs->IEP_PWM_RECFG & (IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK | IEP_PWM_RECFG_RECFG_IEP_PWM_DC_COUNT_MASK)) { 1000 if (pIepPwmFwRegs->IEP_PWM_RECFG & (IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK | IEP_PWM_RECFG_RECFG_IEP_PWM_DC_COUNT_MASK)) {
996 (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_DC_COUNT_MASK)) { 1001 /* PWM Enable and Duty Cycle Count reconfiguration.
997 /* PWM Duty Cycle Count reconfiguration.
998 Update IEP PWM CMPx Shadow Registers. */ 1002 Update IEP PWM CMPx Shadow Registers. */
999 updateIepPwmCmpxShReg(pIcssgIepPwmObj); 1003 updateIepPwmCmpxShRegPwmEnDc(pIcssgIepPwmObj);
1000 1004
1001 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK) { 1005 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK) {
1002 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK; 1006 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK;
@@ -1008,9 +1012,9 @@ static Int32 iepPwmConfigLhs(
1008 } 1012 }
1009 1013
1010 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_DB_COUNT_MASK) { 1014 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_DB_COUNT_MASK) {
1011 /* PWM Deadband Count reconfiguration 1015 /* PWM Deadband Count reconfiguration.
1012 Latch IEP PWM Deadband Count */ 1016 Update IEP PWM CMPx Shadow Registers. */
1013 latchIepPwmDbCount(pIcssgIepPwmObj, TRUE); 1017 updateIepPwmCmpxShRegDb(pIcssgIepPwmObj);
1014 1018
1015 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_DB_COUNT_MASK; 1019 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_DB_COUNT_MASK;
1016 } 1020 }
@@ -1848,8 +1852,8 @@ static void execInitLhsActionDiff(
1848} 1852}
1849 1853
1850/* Update IEP PWM CMPx Shadow Registers. 1854/* Update IEP PWM CMPx Shadow Registers.
1851 Enable and DC Count reconfiguration handled jointly. */ 1855 PWM Enable and DC Count reconfiguration handled jointly. */
1852static Int32 updateIepPwmCmpxShReg( 1856static Int32 updateIepPwmCmpxShRegPwmEnDc(
1853 IcssgIepPwmObj *pIcssgIepPwmObj 1857 IcssgIepPwmObj *pIcssgIepPwmObj
1854) 1858)
1855{ 1859{
@@ -2637,3 +2641,39 @@ static void execRhsActionStash(
2637 } 2641 }
2638 } 2642 }
2639} 2643}
2644
2645/* Update IEP PWM CMPx Shadow Registers for DB reconfiguration. */
2646static Int32 updateIepPwmCmpxShRegDb(
2647 IcssgIepPwmObj *pIcssgIepPwmObj
2648)
2649{
2650 IepPwmFwRegs *pIepPwmFwRegs = pIcssgIepPwmObj->pIepPwmFwRegs;
2651 Uint32 *pIepPwmDcCount;
2652 volatile Uint16 *pIepPwmDbCount;
2653 volatile uint32_t *pShadowReg;
2654 Uint8 pwmIdx, dPwmIdx;
2655
2656 pIepPwmDcCount = &pIcssgIepPwmObj->iepPwmDcCountLhs[0]; /* init pointer to PWM Duty Cycle Count */
2657 pIepPwmDbCount = &pIepPwmFwRegs->IEP_PWM0_1_DB_COUNT; /* init pointer to PWM Deadband Count */
2658 for (dPwmIdx = 0; dPwmIdx < IEP_MAX_NUM_DIFF_PWM; dPwmIdx++)
2659 {
2660 if (((pIcssgIepPwmObj->iepPwmDiffUpdEn >> dPwmIdx) & 0x1) == 1) { /* check PWM update enabled */
2661 /* Write CMP SR for POS PWM */
2662 pwmIdx = dPwmIdx << 1;
2663 pShadowReg = pIcssgIepPwmObj->iepCmpSrAddr[pwmIdx]; /* set pointer to CMP Shadow Register */
2664 *pShadowReg = pIcssgIepPwmObj->iepPwmPeriodCount - *pIepPwmDcCount;
2665 /* Write CMP SR for NEG PWM.
2666 Increment CMP SR pointer by 2 since CMP registers are 64 bit. */
2667 pwmIdx++;
2668 pShadowReg = pIcssgIepPwmObj->iepCmpSrAddr[pwmIdx]; /* set pointer to CMP Shadow Register */
2669 *pShadowReg = pIcssgIepPwmObj->iepPwmPeriodCount - *pIepPwmDcCount - *pIepPwmDbCount;
2670 }
2671 pIepPwmDcCount += 2; /* differential pair use same Duty Cycle Count */
2672 pIepPwmDbCount++;
2673 }
2674
2675 /* Latch IEP PWM Deadband Count */
2676 latchIepPwmDbCount(pIcssgIepPwmObj, TRUE);
2677
2678 return 0;
2679}