summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorFrank Livingston2019-05-24 12:15:31 -0500
committerFrank Livingston2019-05-24 12:15:31 -0500
commitdaa008f52ece43a47be96b86035a64ed631b9702 (patch)
tree402949e683cef4f172d8fcc1214f1d693131fc33
parent5aeb7663b2986719405e11a38fda5dab126e3cc0 (diff)
downloadpruss-lld-daa008f52ece43a47be96b86035a64ed631b9702.tar.gz
pruss-lld-daa008f52ece43a47be96b86035a64ed631b9702.tar.xz
pruss-lld-daa008f52ece43a47be96b86035a64ed631b9702.zip
PRSDK-5738:Update to new RECFG mask names
Signed-off-by: Frank Livingston <frank-livingston@ti.com>
-rw-r--r--example/apps/icssg_pwm/firmware/src/iepPwm.c30
1 files changed, 15 insertions, 15 deletions
diff --git a/example/apps/icssg_pwm/firmware/src/iepPwm.c b/example/apps/icssg_pwm/firmware/src/iepPwm.c
index 4ae397b..fccd44b 100644
--- a/example/apps/icssg_pwm/firmware/src/iepPwm.c
+++ b/example/apps/icssg_pwm/firmware/src/iepPwm.c
@@ -941,7 +941,7 @@ static Int32 iepPwmConfigLhs(
941 if (pIepPwmFwRegs->IEP_PWM_RECFG != 0) { 941 if (pIepPwmFwRegs->IEP_PWM_RECFG != 0) {
942 /* Perform LHS Reconfiguration */ 942 /* Perform LHS Reconfiguration */
943 943
944 if (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_PRD_COUNT_MASK) { 944 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_PRD_COUNT_MASK) {
945 /* PWM Period Count reconfiguration -- affects all PWM for IEP. 945 /* PWM Period Count reconfiguration -- affects all PWM for IEP.
946 Note: reconfiguration flag is cleared below because of 946 Note: reconfiguration flag is cleared below because of
947 dependencies on other reconfigurations on Period Count 947 dependencies on other reconfigurations on Period Count
@@ -960,7 +960,7 @@ static Int32 iepPwmConfigLhs(
960 Place PWMs in Init State. */ 960 Place PWMs in Init State. */
961 reinitPwm(pIcssgIepPwmObj); 961 reinitPwm(pIcssgIepPwmObj);
962 962
963 if (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_EN_MASK) { 963 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK) {
964 964
965 /* Latch IEP PWM Enable */ 965 /* Latch IEP PWM Enable */
966 latchIepPwmEn(pIcssgIepPwmObj); 966 latchIepPwmEn(pIcssgIepPwmObj);
@@ -969,17 +969,17 @@ static Int32 iepPwmConfigLhs(
969 calcIepPwmSnglDiffEn(pIcssgIepPwmObj, &iepPwmSnglEn, &iepPwmDiffEn); 969 calcIepPwmSnglDiffEn(pIcssgIepPwmObj, &iepPwmSnglEn, &iepPwmDiffEn);
970 latchIepPwmSnglDiffEn(pIcssgIepPwmObj, iepPwmSnglEn, iepPwmDiffEn); 970 latchIepPwmSnglDiffEn(pIcssgIepPwmObj, iepPwmSnglEn, iepPwmDiffEn);
971 971
972 pIepPwmFwRegs->IEP_PWM_RECFG &= ~RECFG_IEP_PWM_EN_MASK; 972 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK;
973 } 973 }
974 974
975 if (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_DC_COUNT_MASK) { 975 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_DC_COUNT_MASK) {
976 /* Latch IEP PWM Duty Cycle Counts */ 976 /* Latch IEP PWM Duty Cycle Counts */
977 latchIepPwmDcCounts(pIcssgIepPwmObj, TRUE); 977 latchIepPwmDcCounts(pIcssgIepPwmObj, TRUE);
978 978
979 /* Calculate & Latch LHS/RHS Duty Cycle Counts */ 979 /* Calculate & Latch LHS/RHS Duty Cycle Counts */
980 calcAndLatchIepPwmDcLhsRhsCount(pIcssgIepPwmObj, FALSE); 980 calcAndLatchIepPwmDcLhsRhsCount(pIcssgIepPwmObj, FALSE);
981 981
982 pIepPwmFwRegs->IEP_PWM_RECFG &= ~RECFG_IEP_PWM_DC_COUNT_MASK; 982 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_DC_COUNT_MASK;
983 } 983 }
984 984
985 /* Set return status so State Machine executes INIT state */ 985 /* Set return status so State Machine executes INIT state */
@@ -992,36 +992,36 @@ static Int32 iepPwmConfigLhs(
992 Skip this reconfiguration if Period Count reconfigured 992 Skip this reconfiguration if Period Count reconfigured
993 since all CMPx already updated as part of Period Count reconfiguration. 993 since all CMPx already updated as part of Period Count reconfiguration.
994 */ 994 */
995 if ((pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_EN_MASK) || 995 if (pIepPwmFwRegs->IEP_PWM_RECFG & (IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK | IEP_PWM_RECFG_RECFG_IEP_PWM_DC_COUNT_MASK)) {
996 (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_DC_COUNT_MASK)) { 996 (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_DC_COUNT_MASK)) {
997 /* PWM Duty Cycle Count reconfiguration. 997 /* PWM Duty Cycle Count reconfiguration.
998 Update IEP PWM CMPx Shadow Registers. */ 998 Update IEP PWM CMPx Shadow Registers. */
999 updateIepPwmCmpxShReg(pIcssgIepPwmObj); 999 updateIepPwmCmpxShReg(pIcssgIepPwmObj);
1000 1000
1001 if (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_EN_MASK) { 1001 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK) {
1002 pIepPwmFwRegs->IEP_PWM_RECFG &= ~RECFG_IEP_PWM_EN_MASK; 1002 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK;
1003 } 1003 }
1004 if (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_DC_COUNT_MASK) { 1004 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_DC_COUNT_MASK) {
1005 pIepPwmFwRegs->IEP_PWM_RECFG &= ~RECFG_IEP_PWM_DC_COUNT_MASK; 1005 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_DC_COUNT_MASK;
1006 } 1006 }
1007 } 1007 }
1008 } 1008 }
1009 1009
1010 if (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_DB_COUNT_MASK) { 1010 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_DB_COUNT_MASK) {
1011 /* PWM Deadband Count reconfiguration 1011 /* PWM Deadband Count reconfiguration
1012 Latch IEP PWM Deadband Count */ 1012 Latch IEP PWM Deadband Count */
1013 latchIepPwmDbCount(pIcssgIepPwmObj, TRUE); 1013 latchIepPwmDbCount(pIcssgIepPwmObj, TRUE);
1014 1014
1015 pIepPwmFwRegs->IEP_PWM_RECFG &= ~RECFG_IEP_PWM_DB_COUNT_MASK; 1015 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_DB_COUNT_MASK;
1016 } 1016 }
1017 1017
1018 if (pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_PRD_COUNT_MASK) { 1018 if (pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_PRD_COUNT_MASK) {
1019 /* Latch Period */ 1019 /* Latch Period */
1020 latchIepPwmPeriodCount(pIcssgIepPwmObj); 1020 latchIepPwmPeriodCount(pIcssgIepPwmObj);
1021 /* Enable IEP0 Counter */ 1021 /* Enable IEP0 Counter */
1022 pIepHwRegs->GLOBAL_CFG_REG |= 0x1; 1022 pIepHwRegs->GLOBAL_CFG_REG |= 0x1;
1023 1023
1024 pIepPwmFwRegs->IEP_PWM_RECFG &= ~RECFG_IEP_PWM_PRD_COUNT_MASK; 1024 pIepPwmFwRegs->IEP_PWM_RECFG &= ~IEP_PWM_RECFG_RECFG_IEP_PWM_PRD_COUNT_MASK;
1025 } 1025 }
1026 } 1026 }
1027 1027
@@ -1889,7 +1889,7 @@ static Int32 updateIepPwmCmpxShReg(
1889 /* Init flag to disable execution of RHS Reconfiguration */ 1889 /* Init flag to disable execution of RHS Reconfiguration */
1890 *pIepPwmRhsRecfgFlag = FALSE; 1890 *pIepPwmRhsRecfgFlag = FALSE;
1891 1891
1892 if ((pIepPwmFwRegs->IEP_PWM_RECFG & RECFG_IEP_PWM_EN_MASK) == 0) { 1892 if ((pIepPwmFwRegs->IEP_PWM_RECFG & IEP_PWM_RECFG_RECFG_IEP_PWM_EN_MASK) == 0) {
1893 /* No change to PWM Enable */ 1893 /* No change to PWM Enable */
1894 1894
1895 for (dPwmIdx = 0; dPwmIdx < IEP_MAX_NUM_DIFF_PWM; dPwmIdx++) 1895 for (dPwmIdx = 0; dPwmIdx < IEP_MAX_NUM_DIFF_PWM; dPwmIdx++)