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Diffstat (limited to 'soc/am571x/pruicss_soc.c')
-rw-r--r--soc/am571x/pruicss_soc.c50
1 files changed, 43 insertions, 7 deletions
diff --git a/soc/am571x/pruicss_soc.c b/soc/am571x/pruicss_soc.c
index b0a4834..0dd461f 100644
--- a/soc/am571x/pruicss_soc.c
+++ b/soc/am571x/pruicss_soc.c
@@ -4,7 +4,7 @@
4 * @brief This is soc specific configuration file . 4 * @brief This is soc specific configuration file .
5 */ 5 */
6/* 6/*
7 * Copyright (c) 2015, Texas Instruments Incorporated 7 * Copyright (c) 2015-2018, Texas Instruments Incorporated
8 * All rights reserved. 8 * All rights reserved.
9 * 9 *
10 * Redistribution and use in source and binary forms, with or without 10 * Redistribution and use in source and binary forms, with or without
@@ -64,11 +64,17 @@ PRUICSS_HwAttrs prussInitCfg[2] =
64 CSL_IPU_PRUSS1_U_INST_RAM0_12KB_REGS, 64 CSL_IPU_PRUSS1_U_INST_RAM0_12KB_REGS,
65 CSL_IPU_PRUSS1_U_INST_RAM1_12KB_REGS, 65 CSL_IPU_PRUSS1_U_INST_RAM1_12KB_REGS,
66 CSL_IPU_PRUSS1_U_DATA_RAM_32KB_REGS, 66 CSL_IPU_PRUSS1_U_DATA_RAM_32KB_REGS,
67 0U,
68 0U,
69 0U,
70 0U,
67 CSL_IPU_PRUSS1_U_DATA_RAM0_8KB_SIZE, 71 CSL_IPU_PRUSS1_U_DATA_RAM0_8KB_SIZE,
68 CSL_IPU_PRUSS1_U_DATA_RAM1_8KB_SIZE, 72 CSL_IPU_PRUSS1_U_DATA_RAM1_8KB_SIZE,
69 CSL_IPU_PRUSS1_U_INST_RAM0_12KB_SIZE, 73 CSL_IPU_PRUSS1_U_INST_RAM0_12KB_SIZE,
70 CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE, 74 CSL_IPU_PRUSS1_U_INST_RAM1_12KB_SIZE,
71 CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE 75 CSL_IPU_PRUSS1_U_DATA_RAM_32KB_SIZE,
76 0U,
77 0U
72 }, 78 },
73 { 79 {
74 0x4b280000, 80 0x4b280000,
@@ -87,11 +93,17 @@ PRUICSS_HwAttrs prussInitCfg[2] =
87 CSL_IPU_PRUSS2_U_INST_RAM0_12KB_REGS, 93 CSL_IPU_PRUSS2_U_INST_RAM0_12KB_REGS,
88 CSL_IPU_PRUSS2_U_INST_RAM1_12KB_REGS, 94 CSL_IPU_PRUSS2_U_INST_RAM1_12KB_REGS,
89 CSL_IPU_PRUSS2_U_DATA_RAM_32KB_REGS, 95 CSL_IPU_PRUSS2_U_DATA_RAM_32KB_REGS,
96 0U,
97 0U,
98 0U,
99 0U,
90 CSL_IPU_PRUSS2_U_DATA_RAM0_8KB_SIZE, 100 CSL_IPU_PRUSS2_U_DATA_RAM0_8KB_SIZE,
91 CSL_IPU_PRUSS2_U_DATA_RAM1_8KB_SIZE, 101 CSL_IPU_PRUSS2_U_DATA_RAM1_8KB_SIZE,
92 CSL_IPU_PRUSS2_U_INST_RAM0_12KB_SIZE, 102 CSL_IPU_PRUSS2_U_INST_RAM0_12KB_SIZE,
93 CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE, 103 CSL_IPU_PRUSS2_U_INST_RAM1_12KB_SIZE,
94 CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE 104 CSL_IPU_PRUSS2_U_DATA_RAM_32KB_SIZE,
105 0U,
106 0U
95 } 107 }
96#elif defined (__TMS320C6X__) 108#elif defined (__TMS320C6X__)
97 { 109 {
@@ -111,11 +123,17 @@ PRUICSS_HwAttrs prussInitCfg[2] =
111 CSL_DSP_PRUSS1_U_INST_RAM0_12KB_REGS, 123 CSL_DSP_PRUSS1_U_INST_RAM0_12KB_REGS,
112 CSL_DSP_PRUSS1_U_INST_RAM1_12KB_REGS, 124 CSL_DSP_PRUSS1_U_INST_RAM1_12KB_REGS,
113 CSL_DSP_PRUSS1_U_DATA_RAM_32KB_REGS, 125 CSL_DSP_PRUSS1_U_DATA_RAM_32KB_REGS,
126 0U,
127 0U,
128 0U,
129 0U,
114 CSL_DSP_PRUSS1_U_DATA_RAM0_8KB_SIZE, 130 CSL_DSP_PRUSS1_U_DATA_RAM0_8KB_SIZE,
115 CSL_DSP_PRUSS1_U_DATA_RAM1_8KB_SIZE, 131 CSL_DSP_PRUSS1_U_DATA_RAM1_8KB_SIZE,
116 CSL_DSP_PRUSS1_U_INST_RAM0_12KB_SIZE, 132 CSL_DSP_PRUSS1_U_INST_RAM0_12KB_SIZE,
117 CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE, 133 CSL_DSP_PRUSS1_U_INST_RAM1_12KB_SIZE,
118 CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE 134 CSL_DSP_PRUSS1_U_DATA_RAM_32KB_SIZE,
135 0U,
136 0U
119 }, 137 },
120 { 138 {
121 0x4b280000, 139 0x4b280000,
@@ -134,11 +152,17 @@ PRUICSS_HwAttrs prussInitCfg[2] =
134 CSL_DSP_PRUSS2_U_INST_RAM0_12KB_REGS, 152 CSL_DSP_PRUSS2_U_INST_RAM0_12KB_REGS,
135 CSL_DSP_PRUSS2_U_INST_RAM1_12KB_REGS, 153 CSL_DSP_PRUSS2_U_INST_RAM1_12KB_REGS,
136 CSL_DSP_PRUSS2_U_DATA_RAM_32KB_REGS, 154 CSL_DSP_PRUSS2_U_DATA_RAM_32KB_REGS,
155 0U,
156 0U,
157 0U,
158 0U,
137 CSL_DSP_PRUSS2_U_DATA_RAM0_8KB_SIZE, 159 CSL_DSP_PRUSS2_U_DATA_RAM0_8KB_SIZE,
138 CSL_DSP_PRUSS2_U_DATA_RAM1_8KB_SIZE, 160 CSL_DSP_PRUSS2_U_DATA_RAM1_8KB_SIZE,
139 CSL_DSP_PRUSS2_U_INST_RAM0_12KB_SIZE, 161 CSL_DSP_PRUSS2_U_INST_RAM0_12KB_SIZE,
140 CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE, 162 CSL_DSP_PRUSS2_U_INST_RAM1_12KB_SIZE,
141 CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE 163 CSL_DSP_PRUSS2_U_DATA_RAM_32KB_SIZE,
164 0,
165 0
142 } 166 }
143#else 167#else
144 { 168 {
@@ -158,11 +182,17 @@ PRUICSS_HwAttrs prussInitCfg[2] =
158 CSL_MPU_PRUSS1_U_INST_RAM0_12KB_REGS, 182 CSL_MPU_PRUSS1_U_INST_RAM0_12KB_REGS,
159 CSL_MPU_PRUSS1_U_INST_RAM1_12KB_REGS, 183 CSL_MPU_PRUSS1_U_INST_RAM1_12KB_REGS,
160 CSL_MPU_PRUSS1_U_DATA_RAM_32KB_REGS, 184 CSL_MPU_PRUSS1_U_DATA_RAM_32KB_REGS,
185 0U,
186 0U,
187 0U,
188 0U,
161 CSL_MPU_PRUSS1_U_DATA_RAM0_8KB_SIZE, 189 CSL_MPU_PRUSS1_U_DATA_RAM0_8KB_SIZE,
162 CSL_MPU_PRUSS1_U_DATA_RAM1_8KB_SIZE, 190 CSL_MPU_PRUSS1_U_DATA_RAM1_8KB_SIZE,
163 CSL_MPU_PRUSS1_U_INST_RAM0_12KB_SIZE, 191 CSL_MPU_PRUSS1_U_INST_RAM0_12KB_SIZE,
164 CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE, 192 CSL_MPU_PRUSS1_U_INST_RAM1_12KB_SIZE,
165 CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE 193 CSL_MPU_PRUSS1_U_DATA_RAM_32KB_SIZE,
194 0,
195 0
166 }, 196 },
167 { 197 {
168 0x4b280000, 198 0x4b280000,
@@ -181,11 +211,17 @@ PRUICSS_HwAttrs prussInitCfg[2] =
181 CSL_MPU_PRUSS2_U_INST_RAM0_12KB_REGS, 211 CSL_MPU_PRUSS2_U_INST_RAM0_12KB_REGS,
182 CSL_MPU_PRUSS2_U_INST_RAM1_12KB_REGS, 212 CSL_MPU_PRUSS2_U_INST_RAM1_12KB_REGS,
183 CSL_MPU_PRUSS2_U_DATA_RAM_32KB_REGS, 213 CSL_MPU_PRUSS2_U_DATA_RAM_32KB_REGS,
214 0U,
215 0U,
216 0U,
217 0U,
184 CSL_MPU_PRUSS2_U_DATA_RAM0_8KB_SIZE, 218 CSL_MPU_PRUSS2_U_DATA_RAM0_8KB_SIZE,
185 CSL_MPU_PRUSS2_U_DATA_RAM1_8KB_SIZE, 219 CSL_MPU_PRUSS2_U_DATA_RAM1_8KB_SIZE,
186 CSL_MPU_PRUSS2_U_INST_RAM0_12KB_SIZE, 220 CSL_MPU_PRUSS2_U_INST_RAM0_12KB_SIZE,
187 CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE, 221 CSL_MPU_PRUSS2_U_INST_RAM1_12KB_SIZE,
188 CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE 222 CSL_MPU_PRUSS2_U_DATA_RAM_32KB_SIZE,
223 0,
224 0
189 } 225 }
190#endif 226#endif
191}; 227};