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authorSinthu Raja M2019-07-31 08:39:33 -0500
committerSinthu Raja M2019-07-31 08:45:35 -0500
commit1380135ede1d2a04367d8a55298e14b72bf95679 (patch)
treebad981d00748f12583cce21279f505cb7243d84b
parenta0e67160a3a5fd04eb05a5565372994a2cf46c89 (diff)
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PRSDK-5981 Fix DMA transfer issue
Issue: During DMA transfer of more than 4 MB data, that caused issue in the OMAPL13x platform, because the FIFO depth of MMCSD controller is 64 bytes which makes the cCount value of EDMA3 PaRAM set to exceed beyond the maximum value(65535) which is not been handled inside the driver. Fix: Added check to verify the cCount value before initiating the DMA transfer.
-rw-r--r--src/v0/MMCSD_v0.c34
-rw-r--r--test/src/main.c2
2 files changed, 30 insertions, 6 deletions
diff --git a/src/v0/MMCSD_v0.c b/src/v0/MMCSD_v0.c
index 05845fd..14ff077 100644
--- a/src/v0/MMCSD_v0.c
+++ b/src/v0/MMCSD_v0.c
@@ -1900,6 +1900,7 @@ static MMCSD_Error MMCSD_v0_transfer(MMCSD_Handle handle,
1900 MMCSD_Error ret = MMCSD_ERR; 1900 MMCSD_Error ret = MMCSD_ERR;
1901#ifdef MMCSD_EDMA_ENABLED 1901#ifdef MMCSD_EDMA_ENABLED
1902 uint32_t result = EDMA3_DRV_SOK; 1902 uint32_t result = EDMA3_DRV_SOK;
1903 uint32_t paRAM_cCount = 0;
1903 EDMA3_DRV_PaRAMRegs paramSet = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 1904 EDMA3_DRV_PaRAMRegs paramSet = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
1904 EDMA3_DRV_PaRAMRegs paramSetDummy = {0, 0, 0, 0, 0, 0xFFFF, 0, 0, 0, 0, 0, 0, 0}; 1905 EDMA3_DRV_PaRAMRegs paramSetDummy = {0, 0, 0, 0, 0, 0xFFFF, 0, 0, 0, 0, 0, 0, 0};
1905#endif 1906#endif
@@ -1979,13 +1980,23 @@ static MMCSD_Error MMCSD_v0_transfer(MMCSD_Handle handle,
1979 + MMCSD_MMCDRR); 1980 + MMCSD_MMCDRR);
1980 1981
1981 /** 1982 /**
1983 * Validate the cCount value of EDMA3 PaRAM set is less than 65535
1984 */
1985 paRAM_cCount = (object->dataBlockCount * \
1986 (MMCSD_BLOCK_SIZE / FIFO_LEVEL));
1987 if(paRAM_cCount >= MMCSD_EDMA3CC_COUNT_VALUE)
1988 {
1989 ret = MMCSD_ERR;
1990 }
1991
1992 /**
1982 * Be Careful !!! 1993 * Be Careful !!!
1983 * Valid values for SRCBIDX/DSTBIDX are between -32768 and 32767 1994 * Valid values for SRCBIDX/DSTBIDX are between -32768 and 32767
1984 * Valid values for SRCCIDX/DSTCIDX are between -32768 and 32767 1995 * Valid values for SRCCIDX/DSTCIDX are between -32768 and 32767
1985 */ 1996 */
1986 paramSet.aCnt = FIFO_WIDTH; 1997 paramSet.aCnt = FIFO_WIDTH;
1987 paramSet.bCnt = FIFO_LEVEL/FIFO_WIDTH; 1998 paramSet.bCnt = FIFO_LEVEL/FIFO_WIDTH;
1988 paramSet.cCnt = (uint16_t) object->dataBlockCount * 8; 1999 paramSet.cCnt = (uint16_t) paRAM_cCount;
1989 paramSet.srcBIdx = 0; 2000 paramSet.srcBIdx = 0;
1990 paramSet.srcCIdx = 0; 2001 paramSet.srcCIdx = 0;
1991 2002
@@ -2018,10 +2029,13 @@ static MMCSD_Error MMCSD_v0_transfer(MMCSD_Handle handle,
2018 paramSet.opt &= (~MMCSD_EDMA3CC_OPT_TCC_MASK); 2029 paramSet.opt &= (~MMCSD_EDMA3CC_OPT_TCC_MASK);
2019 paramSet.opt |= (( hwAttrs->edmaRxTCC) << MMCSD_EDMA3CC_OPT_TCC_SHIFT); 2030 paramSet.opt |= (( hwAttrs->edmaRxTCC) << MMCSD_EDMA3CC_OPT_TCC_SHIFT);
2020 2031
2021 result = (uint32_t)EDMA3_DRV_setPaRAM(hwAttrs->edmaHandle, hwAttrs->rxDmaEventNumber, &paramSet); 2032 if (MMCSD_OK == ret)
2022 if (result != ((uint32_t) EDMA3_DRV_SOK))
2023 { 2033 {
2024 ret = MMCSD_ERR; 2034 result = (uint32_t)EDMA3_DRV_setPaRAM(hwAttrs->edmaHandle, hwAttrs->rxDmaEventNumber, &paramSet);
2035 if (result != ((uint32_t) EDMA3_DRV_SOK))
2036 {
2037 ret = MMCSD_ERR;
2038 }
2025 } 2039 }
2026 2040
2027 /* Disabling all the pending EDMA transfers to avoid unwanted Read DMA */ 2041 /* Disabling all the pending EDMA transfers to avoid unwanted Read DMA */
@@ -2087,13 +2101,23 @@ static MMCSD_Error MMCSD_v0_transfer(MMCSD_Handle handle,
2087 + MMCSD_MMCDXR); 2101 + MMCSD_MMCDXR);
2088 2102
2089 /** 2103 /**
2104 * Validate the cCount value of EDMA3 PaRAM set is less than 65535
2105 */
2106 paRAM_cCount = (object->dataBlockCount * \
2107 (MMCSD_BLOCK_SIZE / FIFO_LEVEL));
2108 if(paRAM_cCount >= MMCSD_EDMA3CC_COUNT_VALUE)
2109 {
2110 ret = MMCSD_ERR;
2111 }
2112
2113 /**
2090 * Be Careful !!! 2114 * Be Careful !!!
2091 * Valid values for SRCBIDX/DSTBIDX are between -32768 and 32767 2115 * Valid values for SRCBIDX/DSTBIDX are between -32768 and 32767
2092 * Valid values for SRCCIDX/DSTCIDX are between -32768 and 32767 2116 * Valid values for SRCCIDX/DSTCIDX are between -32768 and 32767
2093 */ 2117 */
2094 paramSet.aCnt = FIFO_WIDTH; 2118 paramSet.aCnt = FIFO_WIDTH;
2095 paramSet.bCnt = FIFO_LEVEL/FIFO_WIDTH; 2119 paramSet.bCnt = FIFO_LEVEL/FIFO_WIDTH;
2096 paramSet.cCnt = (uint16_t) object->dataBlockCount * 8; 2120 paramSet.cCnt = (uint16_t) paRAM_cCount;
2097 paramSet.srcBIdx = 4; 2121 paramSet.srcBIdx = 4;
2098 paramSet.srcCIdx = FIFO_LEVEL; 2122 paramSet.srcCIdx = FIFO_LEVEL;
2099 2123
diff --git a/test/src/main.c b/test/src/main.c
index 029df15..0d9e616 100644
--- a/test/src/main.c
+++ b/test/src/main.c
@@ -199,7 +199,7 @@ const FATFSConfigList FATFS_config = {
199 199
200#ifndef BARE_METAL 200#ifndef BARE_METAL
201#define MMCSD_TEST_NUM_SIZES (5U) /* 0.25 MB, 0.5 MB, 1 MB , 2MB , 5MB*/ 201#define MMCSD_TEST_NUM_SIZES (5U) /* 0.25 MB, 0.5 MB, 1 MB , 2MB , 5MB*/
202uint32_t mmcsd_test_sizes[MMCSD_TEST_NUM_SIZES]={(1024*256),(1024*512),(1024*1024),(1024*1024*2),(1024*1024*5)}; 202uint32_t mmcsd_test_sizes[MMCSD_TEST_NUM_SIZES]={(1024*256),(1024*512),(1024*1024),(1024*1024*2),(1024*1024*3)};
203#else 203#else
204#define MMCSD_TEST_NUM_SIZES (1U) /* 10K */ 204#define MMCSD_TEST_NUM_SIZES (1U) /* 10K */
205uint32_t mmcsd_test_sizes[MMCSD_TEST_NUM_SIZES]={(1024*10)}; 205uint32_t mmcsd_test_sizes[MMCSD_TEST_NUM_SIZES]={(1024*10)};