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author | Dasnavis Sabiya | 2019-07-30 11:23:41 -0500 |
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committer | Dasnavis Sabiya | 2019-07-30 11:23:41 -0500 |
commit | 3d91d4d376b161cb39ef3423f51050e75e7848be (patch) | |
tree | d753235f363970dff40c5be09d0a71c70ebca064 | |
parent | 2b9132608bfdfe538ed02e6639726b4861f2d798 (diff) | |
download | spi-lld-3d91d4d376b161cb39ef3423f51050e75e7848be.tar.gz spi-lld-3d91d4d376b161cb39ef3423f51050e75e7848be.tar.xz spi-lld-3d91d4d376b161cb39ef3423f51050e75e7848be.zip |
Revert "PRSDK-5307: SPI Transfer Cancel implementation for SPI V1 Driver"
This reverts commit 2b9132608bfdfe538ed02e6639726b4861f2d798.
Reverting SPI Transfer Cancel implmentation on SPI V1 Driver and this
shall be added once the McSPI Master Slave example failure issue is fixed.
-rwxr-xr-x | src/v1/SPI_v1.c | 62 |
1 files changed, 0 insertions, 62 deletions
diff --git a/src/v1/SPI_v1.c b/src/v1/SPI_v1.c index 353c1d0..20c7123 100755 --- a/src/v1/SPI_v1.c +++ b/src/v1/SPI_v1.c | |||
@@ -1599,68 +1599,6 @@ void MCSPI_transferCallback_v1(MCSPI_Handle mcHandle, | |||
1599 | */ | 1599 | */ |
1600 | static void MCSPI_transferCancel_v1(MCSPI_Handle mcHandle) | 1600 | static void MCSPI_transferCancel_v1(MCSPI_Handle mcHandle) |
1601 | { | 1601 | { |
1602 | SPI_Handle handle; | ||
1603 | SPI_v1_Object *object; | ||
1604 | SPI_v1_chObject *chObj; | ||
1605 | SPI_v1_HWAttrs const *hwAttrs; | ||
1606 | uint32_t chNum, clrInt = 0U; | ||
1607 | |||
1608 | if (mcHandle != NULL) | ||
1609 | { | ||
1610 | /* Get the pointer to the channel object */ | ||
1611 | handle = mcHandle->handle; | ||
1612 | chNum = mcHandle->chnNum; | ||
1613 | object = (SPI_v1_Object*)handle->object; | ||
1614 | chObj = &(object->chObject[chNum]); | ||
1615 | hwAttrs = (const SPI_v1_HWAttrs *)handle->hwAttrs; | ||
1616 | |||
1617 | /* clear the interrupts */ | ||
1618 | #ifdef SPI_DMA_ENABLE | ||
1619 | McSPIDMADisable(hwAttrs->baseAddr, | ||
1620 | ((uint32_t) MCSPI_DMA_RX_EVENT | (uint32_t) MCSPI_DMA_TX_EVENT), | ||
1621 | chNum); | ||
1622 | #endif | ||
1623 | clrInt = (uint32_t)((MCSPI_INT_TX_EMPTY(chNum) | MCSPI_INT_RX_FULL(chNum) | ||
1624 | | MCSPI_INT_EOWKE)); | ||
1625 | |||
1626 | if(SPI_MASTER == chObj->spiParams.mode) | ||
1627 | { | ||
1628 | McSPIIntDisable(hwAttrs->baseAddr, clrInt); | ||
1629 | } | ||
1630 | else | ||
1631 | { | ||
1632 | McSPIIntDisable(hwAttrs->baseAddr, (uint32_t)(MCSPI_INT_RX_FULL(chNum))); | ||
1633 | } | ||
1634 | McSPIIntStatusClear(hwAttrs->baseAddr, clrInt); | ||
1635 | McSPIChannelDisable(hwAttrs->baseAddr, chNum); | ||
1636 | if ((SPI_MASTER == chObj->spiParams.mode) && | ||
1637 | (hwAttrs->chMode == MCSPI_SINGLE_CH)) | ||
1638 | { | ||
1639 | McSPICSDeAssert(hwAttrs->baseAddr, chNum); | ||
1640 | } | ||
1641 | |||
1642 | chObj->transaction->status=SPI_TRANSFER_CANCELED; | ||
1643 | if (chObj->operMode == SPI_OPER_MODE_BLOCKING) | ||
1644 | { | ||
1645 | SPI_osalPostLock(object->transferComplete); | ||
1646 | } | ||
1647 | if (chObj->operMode == SPI_OPER_MODE_CALLBACK) | ||
1648 | { | ||
1649 | if (object->transferCallbackFxn != NULL) | ||
1650 | { | ||
1651 | /* Single channel mode callback */ | ||
1652 | object->transferCallbackFxn(handle, chObj->transaction); | ||
1653 | } | ||
1654 | } | ||
1655 | SPI_osalPostLock(object->mutex); | ||
1656 | chObj->transaction = NULL; | ||
1657 | #ifdef SPI_DMA_ENABLE | ||
1658 | if (hwAttrs->dmaMode == true) | ||
1659 | { | ||
1660 | MCSPI_dmaFreeChannel(mcHandle); | ||
1661 | } | ||
1662 | #endif | ||
1663 | } | ||
1664 | return; | 1602 | return; |
1665 | } | 1603 | } |
1666 | 1604 | ||