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author | Hao Zhang | 2019-06-20 09:03:19 -0500 |
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committer | Hao Zhang | 2019-06-20 09:03:19 -0500 |
commit | d1c308176652ed7a8087e6c6e0345dce003f6344 (patch) | |
tree | c37b4276e9b418be70404cb91e29175b78ffbc94 | |
parent | 4a106b2419556b19c11012cca5c4616dd51a542f (diff) | |
download | spi-lld-d1c308176652ed7a8087e6c6e0345dce003f6344.tar.gz spi-lld-d1c308176652ed7a8087e6c6e0345dce003f6344.tar.xz spi-lld-d1c308176652ed7a8087e6c6e0345dce003f6344.zip |
ospi: PRSDK-5745: fix R5 PMU counter roll over issue
Use the OSAL TimerP_getTimeInUsecs() API to get the time stamp in
usec instead of reading a 32-bit PMU counter to fix the roll over
issue.
Signed-off-by: Hao Zhang <hzhang@ti.com>
-rw-r--r-- | test/ospi_flash/src/main_ospi_flash_test.c | 116 |
1 files changed, 17 insertions, 99 deletions
diff --git a/test/ospi_flash/src/main_ospi_flash_test.c b/test/ospi_flash/src/main_ospi_flash_test.c index cec9f1b..9bb1d55 100644 --- a/test/ospi_flash/src/main_ospi_flash_test.c +++ b/test/ospi_flash/src/main_ospi_flash_test.c | |||
@@ -567,36 +567,6 @@ void OSPI_initConfig(OSPI_Tests *test) | |||
567 | OSPI_socSetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg); | 567 | OSPI_socSetInitCfg(BOARD_OSPI_NOR_INSTANCE, &ospi_cfg); |
568 | } | 568 | } |
569 | 569 | ||
570 | #ifdef OSPI_PROFILE | ||
571 | void OSPI_init_profile(void) | ||
572 | { | ||
573 | #if defined (__aarch64__) | ||
574 | CSL_initGTC(); | ||
575 | #else | ||
576 | CSL_armR5PmuEnableAllCntrs(1); /* Set/clear PMCR E-bit */ | ||
577 | CSL_armR5PmuResetCntrs(); /* Set PMCR P-bit */ | ||
578 | CSL_armR5PmuResetCycleCnt(); /* Set PMCR C-bit */ | ||
579 | CSL_armR5PmuEnableCntr(0, 1); /* Set PMCNTENSET for event */ | ||
580 | CSL_armR5PmuEnableCntr(1, 1); | ||
581 | CSL_armR5PmuEnableCntr(2, 1); | ||
582 | CSL_armR5PmuClearCntrOverflowStatus(0x80000007); | ||
583 | #endif | ||
584 | } | ||
585 | |||
586 | uint64_t OSPI_get_clock(void) | ||
587 | { | ||
588 | uint64_t count; | ||
589 | |||
590 | #if defined (__aarch64__) | ||
591 | count = CSL_getGTCcount(); | ||
592 | #else | ||
593 | count = (uint64_t)CSL_armR5PmuReadCntr(0x1F); | ||
594 | #endif | ||
595 | |||
596 | return count; | ||
597 | } | ||
598 | #endif | ||
599 | |||
600 | /* | 570 | /* |
601 | * ======== OSPI unit test function ======== | 571 | * ======== OSPI unit test function ======== |
602 | */ | 572 | */ |
@@ -618,11 +588,10 @@ static bool OSPI_flash_test(void *arg) | |||
618 | uint32_t testSegLen = TEST_XFER_SEG_LEN; | 588 | uint32_t testSegLen = TEST_XFER_SEG_LEN; |
619 | #ifdef OSPI_PROFILE | 589 | #ifdef OSPI_PROFILE |
620 | uint32_t testLen = TEST_XFER_SEG_LEN; | 590 | uint32_t testLen = TEST_XFER_SEG_LEN; |
621 | uint64_t startClockCnt; | 591 | uint64_t startTime; /* start time stamp in usec */ |
622 | uint64_t endClockCnt; | 592 | uint64_t elapsedTime; /* elapsed time in usec */ |
623 | uint64_t elapsedClockCnt; | 593 | float xferRate; |
624 | uint32_t rdXferRate; | 594 | uint32_t xferRateInt; |
625 | uint64_t xferClockCnt; | ||
626 | #ifdef USE_BIOS | 595 | #ifdef USE_BIOS |
627 | uint32_t cpuLoad; | 596 | uint32_t cpuLoad; |
628 | #endif | 597 | #endif |
@@ -689,8 +658,8 @@ static bool OSPI_flash_test(void *arg) | |||
689 | #ifdef USE_BIOS | 658 | #ifdef USE_BIOS |
690 | Load_reset( ); | 659 | Load_reset( ); |
691 | #endif | 660 | #endif |
692 | /* reset xferClockCnt for write operation */ | 661 | /* Get start time stamp for the write performance measurement */ |
693 | xferClockCnt = 0; | 662 | startTime = TimerP_getTimeInUsecs(); |
694 | #endif | 663 | #endif |
695 | for (i = 0; i < testLen; i += testSegLen) | 664 | for (i = 0; i < testLen; i += testSegLen) |
696 | { | 665 | { |
@@ -703,10 +672,6 @@ static bool OSPI_flash_test(void *arg) | |||
703 | { | 672 | { |
704 | xferLen = testSegLen; | 673 | xferLen = testSegLen; |
705 | } | 674 | } |
706 | #ifdef OSPI_PROFILE | ||
707 | /* Start the write performance measurement for each write segment */ | ||
708 | startClockCnt = OSPI_get_clock(); | ||
709 | #endif | ||
710 | /* Write buffer to flash */ | 675 | /* Write buffer to flash */ |
711 | if (Board_flashWrite(boardHandle, offset, &txBuf[i], | 676 | if (Board_flashWrite(boardHandle, offset, &txBuf[i], |
712 | xferLen, (void *)(&ioMode))) | 677 | xferLen, (void *)(&ioMode))) |
@@ -715,37 +680,18 @@ static bool OSPI_flash_test(void *arg) | |||
715 | testPassed = false; | 680 | testPassed = false; |
716 | goto err; | 681 | goto err; |
717 | } | 682 | } |
718 | #ifdef OSPI_PROFILE | ||
719 | /* End the write performance measurement for each write segment */ | ||
720 | endClockCnt = OSPI_get_clock(); | ||
721 | if (endClockCnt > startClockCnt) | ||
722 | { | ||
723 | elapsedClockCnt = endClockCnt - startClockCnt; | ||
724 | } | ||
725 | else | ||
726 | { | ||
727 | #if defined (__aarch64__) | ||
728 | elapsedClockCnt = (0xffffffffffffffff - startClockCnt + endClockCnt + 1); | ||
729 | #else | ||
730 | elapsedClockCnt = (0x100000000 - startClockCnt + endClockCnt ); | ||
731 | #endif | ||
732 | } | ||
733 | xferClockCnt += elapsedClockCnt; | ||
734 | #endif | ||
735 | } | 683 | } |
736 | 684 | ||
737 | #ifdef OSPI_PROFILE | 685 | #ifdef OSPI_PROFILE |
686 | elapsedTime = TimerP_getTimeInUsecs() - startTime; | ||
738 | #ifdef USE_BIOS | 687 | #ifdef USE_BIOS |
739 | Load_update( ); | 688 | Load_update( ); |
740 | cpuLoad = Load_getCPULoad(); | 689 | cpuLoad = Load_getCPULoad(); |
741 | #endif | 690 | #endif |
742 | /* calculate the write transfer rate in Kbps */ | 691 | /* calculate the write transfer rate in Kbps */ |
743 | #if defined (__aarch64__) | 692 | xferRate = (float) (((float) (testLen * 8)) / elapsedTime) * 1000U; |
744 | rdXferRate = testLen * 8 * 200 / (uint32_t)(xferClockCnt / 1000); /* A53 GTC 200 MHz */ | 693 | xferRateInt = (uint32_t)xferRate; |
745 | #else | 694 | SPI_log("\n Board_flashWrite %d bytes at transfer rate %d Kbps \n", testLen, xferRateInt); |
746 | rdXferRate = testLen * 8 * 400 / (uint32_t)(xferClockCnt / 1000); /* R5 core 400 MHz */ | ||
747 | #endif | ||
748 | SPI_log("\n Board_flashWrite %d bytes at transfer rate %d Kbps \n", testLen, rdXferRate); | ||
749 | #ifdef USE_BIOS | 695 | #ifdef USE_BIOS |
750 | SPI_log("\n Board_flashWrite CPU load %d%% \n", cpuLoad); | 696 | SPI_log("\n Board_flashWrite CPU load %d%% \n", cpuLoad); |
751 | #endif | 697 | #endif |
@@ -756,8 +702,8 @@ static bool OSPI_flash_test(void *arg) | |||
756 | #ifdef USE_BIOS | 702 | #ifdef USE_BIOS |
757 | Load_reset( ); | 703 | Load_reset( ); |
758 | #endif | 704 | #endif |
759 | /* reset xferClockCnt for read operation */ | 705 | /* Get start time stamp for the read performance measurement */ |
760 | xferClockCnt = 0; | 706 | startTime = TimerP_getTimeInUsecs(); |
761 | #endif | 707 | #endif |
762 | 708 | ||
763 | for (i = 0; i < testLen; i += testSegLen) | 709 | for (i = 0; i < testLen; i += testSegLen) |
@@ -771,10 +717,6 @@ static bool OSPI_flash_test(void *arg) | |||
771 | { | 717 | { |
772 | xferLen = testSegLen; | 718 | xferLen = testSegLen; |
773 | } | 719 | } |
774 | #ifdef OSPI_PROFILE | ||
775 | /* Start the read performance measurement for each write segment */ | ||
776 | startClockCnt = OSPI_get_clock(); | ||
777 | #endif | ||
778 | if (Board_flashRead(boardHandle, offset, &rxBuf[i], | 720 | if (Board_flashRead(boardHandle, offset, &rxBuf[i], |
779 | xferLen, (void *)(&ioMode))) | 721 | xferLen, (void *)(&ioMode))) |
780 | { | 722 | { |
@@ -782,38 +724,18 @@ static bool OSPI_flash_test(void *arg) | |||
782 | testPassed = false; | 724 | testPassed = false; |
783 | goto err; | 725 | goto err; |
784 | } | 726 | } |
785 | #ifdef OSPI_PROFILE | ||
786 | /* End the read performance measurement for each write segment */ | ||
787 | endClockCnt = OSPI_get_clock(); | ||
788 | if (endClockCnt > startClockCnt) | ||
789 | { | ||
790 | elapsedClockCnt = endClockCnt - startClockCnt; | ||
791 | } | ||
792 | else | ||
793 | { | ||
794 | |||
795 | #if defined (__aarch64__) | ||
796 | elapsedClockCnt = (0xffffffffffffffff - startClockCnt + endClockCnt + 1); | ||
797 | #else | ||
798 | elapsedClockCnt = (0x100000000 - startClockCnt + endClockCnt ); | ||
799 | #endif | ||
800 | } | ||
801 | xferClockCnt += elapsedClockCnt; | ||
802 | #endif | ||
803 | } | 727 | } |
804 | 728 | ||
805 | #ifdef OSPI_PROFILE | 729 | #ifdef OSPI_PROFILE |
730 | elapsedTime = TimerP_getTimeInUsecs() - startTime; | ||
806 | #ifdef USE_BIOS | 731 | #ifdef USE_BIOS |
807 | Load_update( ); | 732 | Load_update( ); |
808 | cpuLoad = Load_getCPULoad(); | 733 | cpuLoad = Load_getCPULoad(); |
809 | #endif | 734 | #endif |
810 | /* calculate the read transfer rate in Mbps */ | 735 | /* calculate the write transfer rate in Kbps */ |
811 | #if defined (__aarch64__) | 736 | xferRate = (float) (((float) (testLen * 8)) / elapsedTime); |
812 | rdXferRate = testLen * 8 * 200 / (uint32_t)xferClockCnt; /* A53 GTC 200 MHz */ | 737 | xferRateInt = (uint32_t)xferRate; |
813 | #else | 738 | SPI_log("\n Board_flashRead %d bytes at transfer rate %d Mbps \n", testLen, xferRateInt); |
814 | rdXferRate = testLen * 8 * 400 / (uint32_t)xferClockCnt; /* R5 core 400 MHz */ | ||
815 | #endif | ||
816 | SPI_log("\n Board_flashRead %d bytes at transfer rate %d Mbps \n", testLen, rdXferRate); | ||
817 | #ifdef USE_BIOS | 739 | #ifdef USE_BIOS |
818 | SPI_log("\n Board_flashRead CPU load %d%% \n", cpuLoad); | 740 | SPI_log("\n Board_flashRead CPU load %d%% \n", cpuLoad); |
819 | #endif | 741 | #endif |
@@ -960,10 +882,6 @@ int main(void) | |||
960 | 882 | ||
961 | Board_init(boardCfg); | 883 | Board_init(boardCfg); |
962 | 884 | ||
963 | #ifdef OSPI_PROFILE | ||
964 | OSPI_init_profile(); | ||
965 | #endif | ||
966 | |||
967 | #ifdef USE_BIOS | 885 | #ifdef USE_BIOS |
968 | /* Start BIOS */ | 886 | /* Start BIOS */ |
969 | Error_init(&eb); | 887 | Error_init(&eb); |