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author | Tinku Mannan | 2019-08-07 13:22:09 -0500 |
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committer | Tinku Mannan | 2019-08-07 13:22:09 -0500 |
commit | e536d59854501e173c1d4e33c3672cc36d68f434 (patch) | |
tree | 4e0125b4d79d7392e597cbb4f0c8c910b7b65f9d | |
parent | 70fead21c102b9b75db99f1933aade27a000ef34 (diff) | |
download | transport-e536d59854501e173c1d4e33c3672cc36d68f434.tar.gz transport-e536d59854501e173c1d4e33c3672cc36d68f434.tar.xz transport-e536d59854501e173c1d4e33c3672cc36d68f434.zip |
Add custom am335x config bld file
application cached data memory section set to 10MB
update to example's Module.xs to package new bld file.
Signed-off-by: Tinku Mannan <tmannan@ti.com>
-rw-r--r-- | ndk/nimu_icss/example/Module.xs | 3 | ||||
-rw-r--r-- | ndk/nimu_icss/example/am335x/config_am335x_a8_example.bld | 171 |
2 files changed, 174 insertions, 0 deletions
diff --git a/ndk/nimu_icss/example/Module.xs b/ndk/nimu_icss/example/Module.xs index 99f960c..424a3b8 100644 --- a/ndk/nimu_icss/example/Module.xs +++ b/ndk/nimu_icss/example/Module.xs | |||
@@ -56,4 +56,7 @@ function modBuild() | |||
56 | for (var k = 0 ; k < mkFiles.length; k++) | 56 | for (var k = 0 ; k < mkFiles.length; k++) |
57 | Pkg.otherFiles[Pkg.otherFiles.length++] = mkFiles[k]; | 57 | Pkg.otherFiles[Pkg.otherFiles.length++] = mkFiles[k]; |
58 | 58 | ||
59 | var mkFiles = libUtility.listAllFiles (".bld", "example", true); | ||
60 | for (var k = 0 ; k < mkFiles.length; k++) | ||
61 | Pkg.otherFiles[Pkg.otherFiles.length++] = mkFiles[k]; | ||
59 | } | 62 | } |
diff --git a/ndk/nimu_icss/example/am335x/config_am335x_a8_example.bld b/ndk/nimu_icss/example/am335x/config_am335x_a8_example.bld new file mode 100644 index 0000000..dfcb46f --- /dev/null +++ b/ndk/nimu_icss/example/am335x/config_am335x_a8_example.bld | |||
@@ -0,0 +1,171 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2019, Texas Instruments Incorporated | ||
3 | * All rights reserved. | ||
4 | * | ||
5 | * Redistribution and use in source and binary forms, with or without | ||
6 | * modification, are permitted provided that the following conditions | ||
7 | * are met: | ||
8 | * | ||
9 | * * Redistributions of source code must retain the above copyright | ||
10 | * notice, this list of conditions and the following disclaimer. | ||
11 | * | ||
12 | * * Redistributions in binary form must reproduce the above copyright | ||
13 | * notice, this list of conditions and the following disclaimer in the | ||
14 | * documentation and/or other materials provided with the distribution. | ||
15 | * | ||
16 | * * Neither the name of Texas Instruments Incorporated nor the names of | ||
17 | * its contributors may be used to endorse or promote products derived | ||
18 | * from this software without specific prior written permission. | ||
19 | * | ||
20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | ||
21 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, | ||
22 | * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR | ||
23 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR | ||
24 | * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, | ||
25 | * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, | ||
26 | * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; | ||
27 | * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, | ||
28 | * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR | ||
29 | * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, | ||
30 | * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
31 | */ | ||
32 | |||
33 | /* | ||
34 | * ======== config_am335x_a8_example.bld ======== | ||
35 | * Build configuration script for BSP drivers | ||
36 | */ | ||
37 | /* load the required modules for the configuration */ | ||
38 | var A8 = xdc.useModule('gnu.targets.arm.A8F'); | ||
39 | /* A8 compiler directory path */ | ||
40 | A8.rootDir = java.lang.System.getenv("CGTOOLS_A8"); | ||
41 | |||
42 | /* Read the current board */ | ||
43 | var CurrentPlatform = java.lang.System.getenv("BOARD"); | ||
44 | |||
45 | if (CurrentPlatform == null) | ||
46 | { | ||
47 | /* The env variable is probably not set while running inside CCS */ | ||
48 | CurrentPlatform = java.lang.System.getProperty("BOARD"); | ||
49 | } | ||
50 | |||
51 | /*add bspLib to support SemiHosting to enable system_printf on A8*/ | ||
52 | /* GCC bare metal targets */ | ||
53 | var gccArmTargets = xdc.loadPackage('gnu.targets.arm'); | ||
54 | gccArmTargets.A8F.bspLib = "rdimon"; | ||
55 | |||
56 | |||
57 | /* | ||
58 | Memory map | ||
59 | |||
60 | DDR: 0x80000000 (Ist 512MB - Cached) | ||
61 | |||
62 | NOTE: APP_CACHED_DATA_BLK1_MEM is used to route sections which needs to be in a | ||
63 | separate section preferably at the end of 512 MB memory. | ||
64 | For example: | ||
65 | Frame buffer memory can be less at runtime depending on boards with lesser DDR (as in TDA 12x12 POP boards). | ||
66 | If the same is routed to APP_CACHED_DATA_MEM section then the linker will | ||
67 | place the frame buffer before other data section and the other data will fall into | ||
68 | region outside the DDR in the board. Hence separate section is used!! | ||
69 | |||
70 | +-----------------------------+ | ||
71 | | APP_CODE_MEM | 2MB | ||
72 | +-----------------------------+ | ||
73 | | APP_CACHED_DATA_MEM | 10MB | ||
74 | +-----------------------------+ | ||
75 | | APP_CACHED_DATA_BLK1_MEM | 244MB | ||
76 | +-----------------------------+ | ||
77 | | APP_CACHED_DATA_BLK2_MEM | 128MB | ||
78 | +-----------------------------+ | ||
79 | | NOT USED | Remaining MB | ||
80 | +-----------------------------+ | ||
81 | |||
82 | DDR: 0xA0000000 (2nd 512MB - Non-Cached) | ||
83 | +-----------------------------+ | ||
84 | | | | ||
85 | | APP_UNCACHED_DATA_BLK3_MEM | 2MB | ||
86 | +-----------------------------+ | ||
87 | | NOT USED | Remaining MB | ||
88 | +-----------------------------+ | ||
89 | |||
90 | */ | ||
91 | |||
92 | var KB=1024; | ||
93 | var MB=KB*KB; | ||
94 | |||
95 | var DDR3_ADDR_0; | ||
96 | var DDR3_ADDR_1; | ||
97 | |||
98 | var APP_CODE_ADDR; | ||
99 | var APP_CODE_SIZE; | ||
100 | |||
101 | var APP_CACHED_DATA_ADDR; | ||
102 | var APP_CACHED_DATA_SIZE; | ||
103 | |||
104 | var APP_UNCACHED_DATA_BLK3_ADDR; | ||
105 | var APP_UNCACHED_DATA_BLK3_SIZE; | ||
106 | |||
107 | var APP_CACHED_DATA_BLK1_ADDR; | ||
108 | var APP_CACHED_DATA_BLK1_SIZE; | ||
109 | |||
110 | var APP_CACHED_DATA_BLK2_ADDR; | ||
111 | var APP_CACHED_DATA_BLK2_SIZE; | ||
112 | |||
113 | DDR3_ADDR_0 = 0x80000000; | ||
114 | DDR3_ADDR_1 = 0xA0000000; | ||
115 | |||
116 | APP_CODE_SIZE = 2*MB; | ||
117 | APP_CACHED_DATA_SIZE = 10*MB; | ||
118 | APP_CACHED_DATA_BLK1_SIZE = 244*MB; | ||
119 | APP_CACHED_DATA_BLK2_SIZE = 128*MB; | ||
120 | APP_UNCACHED_DATA_BLK3_SIZE = 2*MB; | ||
121 | |||
122 | APP_CODE_ADDR = DDR3_ADDR_0; | ||
123 | APP_CACHED_DATA_ADDR = APP_CODE_ADDR + APP_CODE_SIZE; | ||
124 | APP_CACHED_DATA_BLK1_ADDR = APP_CACHED_DATA_ADDR + APP_CACHED_DATA_SIZE; | ||
125 | APP_CACHED_DATA_BLK2_ADDR = APP_CACHED_DATA_BLK1_ADDR + APP_CACHED_DATA_BLK1_SIZE; | ||
126 | APP_UNCACHED_DATA_BLK3_ADDR = DDR3_ADDR_1; | ||
127 | |||
128 | |||
129 | |||
130 | myplatform = "ti.platforms.evmAM3359"; | ||
131 | |||
132 | |||
133 | Build.platformTable[myplatform] = | ||
134 | { | ||
135 | externalMemoryMap: | ||
136 | [ | ||
137 | ["APP_CODE_MEM", { | ||
138 | comment : "APP_CODE_MEM", | ||
139 | name : "APP_CODE_MEM", | ||
140 | base : APP_CODE_ADDR, | ||
141 | len : APP_CODE_SIZE | ||
142 | }], | ||
143 | ["APP_CACHED_DATA_MEM", { | ||
144 | comment : "APP_CACHED_DATA_MEM", | ||
145 | name : "APP_CACHED_DATA_MEM", | ||
146 | base : APP_CACHED_DATA_ADDR, | ||
147 | len : APP_CACHED_DATA_SIZE | ||
148 | }], | ||
149 | ["APP_UNCACHED_DATA_BLK3_MEM", { | ||
150 | comment : "APP_UNCACHED_DATA_BLK3_MEM", | ||
151 | name : "APP_UNCACHED_DATA_BLK3_MEM", | ||
152 | base : APP_UNCACHED_DATA_BLK3_ADDR, | ||
153 | len : APP_UNCACHED_DATA_BLK3_SIZE | ||
154 | }], | ||
155 | ["APP_CACHED_DATA_BLK1_MEM", { | ||
156 | comment : "APP_CACHED_DATA_BLK1_MEM", | ||
157 | name : "APP_CACHED_DATA_BLK1_MEM", | ||
158 | base : APP_CACHED_DATA_BLK1_ADDR, | ||
159 | len : APP_CACHED_DATA_BLK1_SIZE | ||
160 | }], | ||
161 | ["APP_CACHED_DATA_BLK2_MEM", { | ||
162 | comment : "APP_CACHED_DATA_BLK2_MEM", | ||
163 | name : "APP_CACHED_DATA_BLK2_MEM", | ||
164 | base : APP_CACHED_DATA_BLK2_ADDR, | ||
165 | len : APP_CACHED_DATA_BLK2_SIZE | ||
166 | }], | ||
167 | ], | ||
168 | codeMemory: "APP_CODE_MEM", | ||
169 | dataMemory: "APP_CACHED_DATA_MEM", | ||
170 | stackMemory: "APP_CACHED_DATA_MEM" | ||
171 | }; | ||