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authorKishon Vijay Abraham I2014-03-18 06:50:34 -0500
committerKishon Vijay Abraham I2014-05-29 01:23:21 -0500
commit0e0841be7eb4a75cb8602b30c2c63f4ac162ffdc (patch)
treeddd872af8257543e2c0dcbe7c0fea7904f15d007
parentf789f79477dc7341bd9fb6ae1c1c27cb45782b79 (diff)
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ARM: dts: dra7: Add dt data for PCIe controller
Added dt data for PCIe controller. This node contains dt data for both the DRA7 part of designware controller and for the designware core. The documention for this node can be found @ ../bindings/pci/ti-pci.txt. Cc: Tony Lindgren <tony@atomide.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
-rw-r--r--arch/arm/boot/dts/dra7.dtsi69
1 files changed, 69 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index eaeccaff67a3..1239f0d621ee 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1036,6 +1036,75 @@
1036 }; 1036 };
1037 }; 1037 };
1038 1038
1039 axi@0 {
1040 compatible = "simple-bus";
1041 #size-cells = <1>;
1042 #address-cells = <1>;
1043 ranges = <0x51000000 0x51000000 0x3000
1044 0x0 0x20000000 0x10000000>;
1045 pcie@51000000 {
1046 compatible = "ti,dra7-pcie";
1047 reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
1048 reg-names = "rc_dbics", "ti_conf", "config";
1049 interrupts = <0 232 0x4>, <0 233 0x4>;
1050 #address-cells = <3>;
1051 #size-cells = <2>;
1052 device_type = "pci";
1053 ranges = <0x81000000 0 0 0x03000 0 0x00010000
1054 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
1055 #interrupt-cells = <1>;
1056 num-lanes = <1>;
1057 ti,hwmods = "pcie1";
1058 phys = <&pcie1_phy>;
1059 phy-names = "pcie-phy0";
1060 interrupt-map-mask = <0 0 0 7>;
1061 interrupt-map = <0 0 0 1 &pcie1_intc 1>,
1062 <0 0 0 2 &pcie1_intc 2>,
1063 <0 0 0 3 &pcie1_intc 3>,
1064 <0 0 0 4 &pcie1_intc 4>;
1065 pcie1_intc: interrupt-controller {
1066 interrupt-controller;
1067 #address-cells = <0>;
1068 #interrupt-cells = <1>;
1069 };
1070 };
1071 };
1072
1073 axi@1 {
1074 compatible = "simple-bus";
1075 #size-cells = <1>;
1076 #address-cells = <1>;
1077 ranges = <0x51800000 0x51800000 0x3000
1078 0x0 0x30000000 0x10000000>;
1079 status = "disabled";
1080 pcie@51000000 {
1081 compatible = "ti,dra7-pcie";
1082 reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
1083 reg-names = "rc_dbics", "ti_conf", "config";
1084 interrupts = <0 355 0x4>, <0 356 0x4>;
1085 #address-cells = <3>;
1086 #size-cells = <2>;
1087 device_type = "pci";
1088 ranges = <0x81000000 0 0 0x03000 0 0x00010000
1089 0x82000000 0 0x30013000 0x13000 0 0xffed000>;
1090 #interrupt-cells = <1>;
1091 num-lanes = <1>;
1092 ti,hwmods = "pcie2";
1093 phys = <&pcie2_phy>;
1094 phy-names = "pcie-phy0";
1095 interrupt-map-mask = <0 0 0 7>;
1096 interrupt-map = <0 0 0 1 &pcie2_intc 1>,
1097 <0 0 0 2 &pcie2_intc 2>,
1098 <0 0 0 3 &pcie2_intc 3>,
1099 <0 0 0 4 &pcie2_intc 4>;
1100 pcie2_intc: interrupt-controller {
1101 interrupt-controller;
1102 #address-cells = <0>;
1103 #interrupt-cells = <1>;
1104 };
1105 };
1106 };
1107
1039 sata: sata@4a141100 { 1108 sata: sata@4a141100 {
1040 compatible = "snps,dwc-ahci"; 1109 compatible = "snps,dwc-ahci";
1041 reg = <0x4a140000 0x1100>, <0x4a141100 0x7>; 1110 reg = <0x4a140000 0x1100>, <0x4a141100 0x7>;