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authorKishon Vijay Abraham I2017-07-18 00:35:30 -0500
committerKishon Vijay Abraham I2017-07-18 00:35:30 -0500
commitda3c2a1b3f7794338ce9a9c3f50bf47fb6063345 (patch)
tree6f97c273e81e0bc6de826e07bc81c24d39ad0a0d
parent3be6bf6d56c7b51fb19a38fa931d593210b6cf0c (diff)
downloadlinux-phy-mmc_omap_sdhci.tar.gz
linux-phy-mmc_omap_sdhci.tar.xz
linux-phy-mmc_omap_sdhci.zip
rw workingmmc_omap_sdhci
-rw-r--r--drivers/mmc/core/block.c2
-rw-r--r--drivers/mmc/core/core.c2
-rw-r--r--drivers/mmc/host/omap_hsmmc.c79
-rw-r--r--drivers/mmc/host/sdhci-omap.c32
-rw-r--r--drivers/mmc/host/sdhci.c71
-rw-r--r--drivers/mmc/host/sdhci.h2
6 files changed, 174 insertions, 14 deletions
diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c
index fa7f3cd4d0ae..11181aabdf9d 100644
--- a/drivers/mmc/core/block.c
+++ b/drivers/mmc/core/block.c
@@ -1592,6 +1592,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq,
1592 * We'll avoid using CMD23-bounded multiblock writes for 1592 * We'll avoid using CMD23-bounded multiblock writes for
1593 * these, while retaining features like reliable writes. 1593 * these, while retaining features like reliable writes.
1594 */ 1594 */
1595 printk("%s %d %d %d %x %d WTF came here\n", __func__, md->flags, mmc_op_multi(brq->cmd.opcode), do_rel_wr, card->quirks, do_data_tag);
1595 if ((md->flags & MMC_BLK_CMD23) && mmc_op_multi(brq->cmd.opcode) && 1596 if ((md->flags & MMC_BLK_CMD23) && mmc_op_multi(brq->cmd.opcode) &&
1596 (do_rel_wr || !(card->quirks & MMC_QUIRK_BLK_NO_CMD23) || 1597 (do_rel_wr || !(card->quirks & MMC_QUIRK_BLK_NO_CMD23) ||
1597 do_data_tag)) { 1598 do_data_tag)) {
@@ -1600,6 +1601,7 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq,
1600 (do_rel_wr ? (1 << 31) : 0) | 1601 (do_rel_wr ? (1 << 31) : 0) |
1601 (do_data_tag ? (1 << 29) : 0); 1602 (do_data_tag ? (1 << 29) : 0);
1602 brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; 1603 brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC;
1604 printk("%s WTF came here2\n", __func__);
1603 brq->mrq.sbc = &brq->sbc; 1605 brq->mrq.sbc = &brq->sbc;
1604 } 1606 }
1605 1607
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
index 6699384b5cef..7942602c8d97 100644
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -187,6 +187,7 @@ void mmc_request_done(struct mmc_host *host, struct mmc_request *mrq)
187 if (!host->ongoing_mrq) 187 if (!host->ongoing_mrq)
188 led_trigger_event(host->led, LED_OFF); 188 led_trigger_event(host->led, LED_OFF);
189 189
190 printk("%s %x\n", __func__, mrq->sbc);
190 if (mrq->sbc) { 191 if (mrq->sbc) {
191 pr_debug("%s: req done <CMD%u>: %d: %08x %08x %08x %08x\n", 192 pr_debug("%s: req done <CMD%u>: %d: %08x %08x %08x %08x\n",
192 mmc_hostname(host), mrq->sbc->opcode, 193 mmc_hostname(host), mrq->sbc->opcode,
@@ -271,6 +272,7 @@ static void __mmc_start_request(struct mmc_host *host, struct mmc_request *mrq)
271 272
272static void mmc_mrq_pr_debug(struct mmc_host *host, struct mmc_request *mrq) 273static void mmc_mrq_pr_debug(struct mmc_host *host, struct mmc_request *mrq)
273{ 274{
275 printk("%s %x\n", __func__, mrq->sbc);
274 if (mrq->sbc) { 276 if (mrq->sbc) {
275 pr_debug("<%s: starting CMD%u arg %08x flags %08x>\n", 277 pr_debug("<%s: starting CMD%u arg %08x flags %08x>\n",
276 mmc_hostname(host), mrq->sbc->opcode, 278 mmc_hostname(host), mrq->sbc->opcode,
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index ba17e3a13bbe..fd64ac1e05fc 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -838,7 +838,6 @@ static void send_init_stream(struct omap_hsmmc_host *host)
838 OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 838 OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM);
839 OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 839 OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD);
840 840
841 omap_hsmmc_regs_show1(host);
842 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 841 timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS);
843 while ((reg != CC_EN) && time_before(jiffies, timeout)) 842 while ((reg != CC_EN) && time_before(jiffies, timeout))
844 reg = OMAP_HSMMC_READ(host->base, STAT) & CC_EN; 843 reg = OMAP_HSMMC_READ(host->base, STAT) & CC_EN;
@@ -923,6 +922,7 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd,
923 922
924 cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 923 cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22);
925 924
925 printk("%s %x\n", __func__, host->mrq->sbc);
926 if ((host->flags & AUTO_CMD23) && mmc_op_multi(cmd->opcode) && 926 if ((host->flags & AUTO_CMD23) && mmc_op_multi(cmd->opcode) &&
927 host->mrq->sbc) { 927 host->mrq->sbc) {
928 cmdreg |= ACEN_ACMD23; 928 cmdreg |= ACEN_ACMD23;
@@ -941,8 +941,61 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd,
941 941
942 host->req_in_progress = 1; 942 host->req_in_progress = 1;
943 943
944 printk("%s arg=%x cmd=%x %d\n", __func__, cmd->arg, cmdreg, __LINE__); 944 if (cmd->opcode == MMC_SET_BLOCK_COUNT)
945 omap_hsmmc_regs_show1(host);
946 printk("%s %x arg=%x cmd=%x %d\n", __func__, readl(ioremap(0x4809C110, 0x4)), cmd->arg, cmdreg, __LINE__);
945 OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 947 OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg);
948
949 if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK) {
950 printk("****************************\n");
951 printk("0x4809C000 %x\n", readl(ioremap(0x4809C000, 0x4)));
952 printk("0x4809C004 %x\n", readl(ioremap(0x4809C004, 0x4)));
953 printk("0x4809C010 %x\n", readl(ioremap(0x4809C010, 0x4)));
954
955 printk("0x4809C110 %x\n", readl(ioremap(0x4809C110, 0x4)));
956 printk("0x4809C114 %x\n", readl(ioremap(0x4809C114, 0x4)));
957 printk("0x4809C124 %x\n", readl(ioremap(0x4809C124, 0x4)));
958 printk("0x4809C128 %x\n", readl(ioremap(0x4809C128, 0x4)));
959 printk("0x4809C12c %x\n", readl(ioremap(0x4809C12c, 0x4)));
960 printk("0x4809C130 %x\n", readl(ioremap(0x4809C130, 0x4)));
961 printk("0x4809C134 %x\n", readl(ioremap(0x4809C134, 0x4)));
962
963 printk("0x4809C200 %x\n", readl(ioremap(0x4809C200, 0x4)));
964 printk("0x4809C204 %x\n", readl(ioremap(0x4809C204, 0x4)));
965 printk("0x4809C208 %x\n", readl(ioremap(0x4809C208, 0x4)));
966 printk("0x4809C20c %x\n", readl(ioremap(0x4809C20c, 0x4)));
967
968 printk("0x4809C210 %x\n", readl(ioremap(0x4809C210, 0x4)));
969 printk("0x4809C214 %x\n", readl(ioremap(0x4809C214, 0x4)));
970 printk("0x4809C218 %x\n", readl(ioremap(0x4809C218, 0x4)));
971 printk("0x4809C21c %x\n", readl(ioremap(0x4809C21c, 0x4)));
972
973 printk("0x4809C224 %x\n", readl(ioremap(0x4809C224, 0x4)));
974 printk("0x4809C228 %x\n", readl(ioremap(0x4809C228, 0x4)));
975 printk("0x4809C22c %x\n", readl(ioremap(0x4809C22c, 0x4)));
976
977 printk("0x4809C230 %x\n", readl(ioremap(0x4809C230, 0x4)));
978 printk("0x4809C234 %x\n", readl(ioremap(0x4809C234, 0x4)));
979 printk("0x4809C238 %x\n", readl(ioremap(0x4809C238, 0x4)));
980 printk("0x4809C23c %x\n", readl(ioremap(0x4809C23c, 0x4)));
981
982 printk("0x4809C240 %x\n", readl(ioremap(0x4809C240, 0x4)));
983 printk("0x4809C244 %x\n", readl(ioremap(0x4809C244, 0x4)));
984 printk("0x4809C248 %x\n", readl(ioremap(0x4809C248, 0x4)));
985 printk("0x4809C24c %x\n", readl(ioremap(0x4809C24c, 0x4)));
986
987 printk("0x4809C250 %x\n", readl(ioremap(0x4809C250, 0x4)));
988 printk("0x4809C254 %x\n", readl(ioremap(0x4809C254, 0x4)));
989 printk("0x4809C258 %x\n", readl(ioremap(0x4809C258, 0x4)));
990 printk("0x4809C25c %x\n", readl(ioremap(0x4809C25c, 0x4)));
991
992 printk("0x4809C260 %x\n", readl(ioremap(0x4809C260, 0x4)));
993 printk("0x4809C264 %x\n", readl(ioremap(0x4809C264, 0x4)));
994 printk("0x4809C268 %x\n", readl(ioremap(0x4809C268, 0x4)));
995 printk("0x4809C26c %x\n", readl(ioremap(0x4809C26c, 0x4)));
996 printk("0x4809C2fc %x\n", readl(ioremap(0x4809C2fc, 0x4)));
997 printk("****************************\n");
998 }
946 OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 999 OMAP_HSMMC_WRITE(host->base, CMD, cmdreg);
947} 1000}
948 1001
@@ -1895,18 +1948,28 @@ static int omap_hsmmc_regs_show1(struct omap_hsmmc_host *host)
1895 pm_runtime_get_sync(host->dev); 1948 pm_runtime_get_sync(host->dev);
1896 printk("CON:\t\t0x%08x\n", 1949 printk("CON:\t\t0x%08x\n",
1897 OMAP_HSMMC_READ(host->base, CON)); 1950 OMAP_HSMMC_READ(host->base, CON));
1951 printk("IE:\t\t0x%08x\n",
1952 OMAP_HSMMC_READ(host->base, IE));
1953 printk("ISE:\t\t0x%08x\n",
1954 OMAP_HSMMC_READ(host->base, ISE));
1955 printk("SYSSTATUS:\t\t0x%08x\n",
1956 OMAP_HSMMC_READ(host->base, SYSSTATUS));
1957 printk("CON:\t\t0x%08x\n",
1958 OMAP_HSMMC_READ(host->base, CON));
1959 printk("SDMASA:\t\t0x%08x\n",
1960 OMAP_HSMMC_READ(host->base, SDMASA));
1961 printk("ARG:\t\t0x%08x\n",
1962 OMAP_HSMMC_READ(host->base, ARG));
1963 printk("CMD:\t\t0x%08x\n",
1964 OMAP_HSMMC_READ(host->base, CMD));
1898 printk("PSTATE:\t\t0x%08x\n", 1965 printk("PSTATE:\t\t0x%08x\n",
1899 OMAP_HSMMC_READ(host->base, PSTATE)); 1966 OMAP_HSMMC_READ(host->base, PSTATE));
1900 printk("HCTL:\t\t0x%08x\n", 1967 printk("HCTL:\t\t0x%08x\n",
1901 OMAP_HSMMC_READ(host->base, HCTL)); 1968 OMAP_HSMMC_READ(host->base, HCTL));
1902 printk("SYSCTL:\t\t0x%08x\n", 1969 printk("SYSCTL:\t\t0x%08x\n",
1903 OMAP_HSMMC_READ(host->base, SYSCTL)); 1970 OMAP_HSMMC_READ(host->base, SYSCTL));
1904 printk("IE:\t\t0x%08x\n", 1971 printk("AC12:\t\t0x%08x\n",
1905 OMAP_HSMMC_READ(host->base, IE)); 1972 OMAP_HSMMC_READ(host->base, AC12));
1906 printk("ISE:\t\t0x%08x\n",
1907 OMAP_HSMMC_READ(host->base, ISE));
1908 printk("CAPA:\t\t0x%08x\n",
1909 OMAP_HSMMC_READ(host->base, CAPA));
1910 1973
1911 pm_runtime_mark_last_busy(host->dev); 1974 pm_runtime_mark_last_busy(host->dev);
1912 pm_runtime_put_autosuspend(host->dev); 1975 pm_runtime_put_autosuspend(host->dev);
diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c
index 5ca0c09ba9c6..633904387401 100644
--- a/drivers/mmc/host/sdhci-omap.c
+++ b/drivers/mmc/host/sdhci-omap.c
@@ -1,3 +1,4 @@
1#include <linux/mmc/slot-gpio.h>
1#include <linux/module.h> 2#include <linux/module.h>
2#include <linux/of.h> 3#include <linux/of.h>
3#include <linux/of_device.h> 4#include <linux/of_device.h>
@@ -10,6 +11,7 @@
10#define CON_DW8 BIT(5) 11#define CON_DW8 BIT(5)
11#define CON_DMA_MASTER BIT(20) 12#define CON_DMA_MASTER BIT(20)
12#define CON_INIT BIT(1) 13#define CON_INIT BIT(1)
14#define CON_OD BIT(0)
13 15
14#define SDHCI_OMAP_CMD 0x20c 16#define SDHCI_OMAP_CMD 0x20c
15 17
@@ -52,6 +54,21 @@ static inline void sdhci_omap_writel(struct sdhci_omap_host *host,
52 writel(data, host->base + offset); 54 writel(data, host->base + offset);
53} 55}
54 56
57static void sdhci_omap_set_bus_mode(struct sdhci_host *host, unsigned int mode)
58{
59 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
60 struct sdhci_omap_host *omap_host = sdhci_pltfm_priv(pltfm_host);
61 u32 con;
62 u32 val;
63
64 con = sdhci_omap_readl(omap_host, SDHCI_OMAP_CON);
65 if (mode == MMC_BUSMODE_OPENDRAIN)
66 val = con | CON_OD;
67 else
68 val = con & ~CON_OD;
69 sdhci_omap_writel(omap_host, SDHCI_OMAP_CON, val);
70}
71
55static void sdhci_omap_set_bus_width(struct sdhci_host *host, int width) 72static void sdhci_omap_set_bus_width(struct sdhci_host *host, int width)
56{ 73{
57 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 74 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
@@ -210,6 +227,7 @@ static struct sdhci_ops sdhci_omap_ops = {
210 .set_clock = sdhci_omap_set_clock, 227 .set_clock = sdhci_omap_set_clock,
211// .set_clock = sdhci_set_clock, 228// .set_clock = sdhci_set_clock,
212 .set_bus_width = sdhci_omap_set_bus_width, 229 .set_bus_width = sdhci_omap_set_bus_width,
230 .set_bus_mode = sdhci_omap_set_bus_mode,
213 .set_uhs_signaling = sdhci_set_uhs_signaling, 231 .set_uhs_signaling = sdhci_set_uhs_signaling,
214 .platform_send_init_74_clocks = sdhci_omap_init_74_clocks, 232 .platform_send_init_74_clocks = sdhci_omap_init_74_clocks,
215 .enable_dma = sdhci_omap_enable_dma, 233 .enable_dma = sdhci_omap_enable_dma,
@@ -219,10 +237,12 @@ static const struct sdhci_pltfm_data sdhci_omap_pdata = {
219 .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN | 237 .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN |
220 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | 238 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
221 SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER | 239 SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
222 SDHCI_QUIRK2_STOP_WITH_TC | 240 SDHCI_QUIRK_NO_HISPD_BIT |
223 SDHCI_QUIRK_BROKEN_CARD_DETECTION, 241 SDHCI_QUIRK_BROKEN_CARD_DETECTION,
224 .quirks2 = SDHCI_QUIRK2_NO_1_8_V | 242 .quirks2 = SDHCI_QUIRK2_NO_1_8_V |
225 SDHCI_QUIRK2_NO_CRC_SHIFTING, 243 SDHCI_QUIRK2_NO_CRC_SHIFTING |
244 SDHCI_QUIRK2_ACMD23_BROKEN |
245 SDHCI_QUIRK2_NO_CAP_CMD23,
226 .ops = &sdhci_omap_ops, 246 .ops = &sdhci_omap_ops,
227}; 247};
228 248
@@ -247,6 +267,7 @@ static int sdhci_omap_probe(struct platform_device *pdev)
247 struct mmc_host *mmc; 267 struct mmc_host *mmc;
248 const struct of_device_id *match; 268 const struct of_device_id *match;
249 struct sdhci_omap_data *data; 269 struct sdhci_omap_data *data;
270 struct clk *clk;
250 271
251 match = of_match_device(omap_sdhci_match, dev); 272 match = of_match_device(omap_sdhci_match, dev);
252 if (!match) 273 if (!match)
@@ -290,14 +311,21 @@ static int sdhci_omap_probe(struct platform_device *pdev)
290 goto err_of_parse; 311 goto err_of_parse;
291 } 312 }
292 313
314// clk = devm_clk_get(&pdev->dev, "mmchsdb_fck");
315// clk_prepare_enable(clk);
293 pm_runtime_enable(dev); 316 pm_runtime_enable(dev);
294 pm_runtime_get_sync(dev); 317 pm_runtime_get_sync(dev);
295 318
319 host->mmc_host_ops.get_ro = mmc_gpio_get_ro,
296 sdhci_omap_writel(omap_host, 0x240, 0x27e90080); 320 sdhci_omap_writel(omap_host, 0x240, 0x27e90080);
297 ret = sdhci_add_host(host); 321 ret = sdhci_add_host(host);
298 if (ret) 322 if (ret)
299 goto err_add_host; 323 goto err_add_host;
300 324
325 printk("KISHON KISHON %s %x\n", __func__, readl(ioremap(0x4809C110, 0x4)));
326 writel(0x301d, ioremap(0x4809C110, 0x4));
327 printk("KISHON KISHON %s %x\n", __func__, readl(ioremap(0x4809C110, 0x4)));
328
301 return 0; 329 return 0;
302 330
303err_add_host: 331err_add_host:
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index 13bddc31d23d..d4448e14e0b8 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -902,6 +902,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd)
902 sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG, 902 sdhci_writew(host, SDHCI_MAKE_BLKSZ(SDHCI_DEFAULT_BOUNDARY_ARG,
903 data->blksz), SDHCI_BLOCK_SIZE); 903 data->blksz), SDHCI_BLOCK_SIZE);
904 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT); 904 sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
905 printk("%s BLK = %x\n", __func__, readl(ioremap(0x4809c204, 0x4)));
905} 906}
906 907
907static inline bool sdhci_auto_cmd12(struct sdhci_host *host, 908static inline bool sdhci_auto_cmd12(struct sdhci_host *host,
@@ -1093,6 +1094,7 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
1093 1094
1094 WARN_ON(host->cmd); 1095 WARN_ON(host->cmd);
1095 1096
1097 writel(0x301d, ioremap(0x4809C110, 0x4));
1096 /* Initially, a command has no error */ 1098 /* Initially, a command has no error */
1097 cmd->error = 0; 1099 cmd->error = 0;
1098 1100
@@ -1161,19 +1163,74 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
1161 else 1163 else
1162 flags = SDHCI_CMD_RESP_SHORT; 1164 flags = SDHCI_CMD_RESP_SHORT;
1163 1165
1164/* 1166
1165 if (cmd->flags & MMC_RSP_CRC) 1167 if (cmd->flags & MMC_RSP_CRC)
1166 flags |= SDHCI_CMD_CRC; 1168 flags |= SDHCI_CMD_CRC;
1167 if (cmd->flags & MMC_RSP_OPCODE) 1169 if (cmd->flags & MMC_RSP_OPCODE)
1168 flags |= SDHCI_CMD_INDEX; 1170 flags |= SDHCI_CMD_INDEX;
1169*/ 1171
1170 1172
1171 /* CMD19 is special in that the Data Present Select should be set */ 1173 /* CMD19 is special in that the Data Present Select should be set */
1172 if (cmd->data || cmd->opcode == MMC_SEND_TUNING_BLOCK || 1174 if (cmd->data || cmd->opcode == MMC_SEND_TUNING_BLOCK ||
1173 cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200) 1175 cmd->opcode == MMC_SEND_TUNING_BLOCK_HS200)
1174 flags |= SDHCI_CMD_DATA; 1176 flags |= SDHCI_CMD_DATA;
1175 1177
1176 printk("%s %d %x\n", __func__, __LINE__, SDHCI_MAKE_CMD(cmd->opcode, flags)); 1178#if 0
1179 if (cmd->opcode == MMC_READ_MULTIPLE_BLOCK) {
1180 printk("****************************\n");
1181 printk("0x4809C000 %x\n", readl(ioremap(0x4809C000, 0x4)));
1182 printk("0x4809C004 %x\n", readl(ioremap(0x4809C004, 0x4)));
1183 printk("0x4809C010 %x\n", readl(ioremap(0x4809C010, 0x4)));
1184
1185 printk("0x4809C110 %x\n", readl(ioremap(0x4809C110, 0x4)));
1186 printk("0x4809C114 %x\n", readl(ioremap(0x4809C114, 0x4)));
1187 printk("0x4809C124 %x\n", readl(ioremap(0x4809C124, 0x4)));
1188 printk("0x4809C128 %x\n", readl(ioremap(0x4809C128, 0x4)));
1189 printk("0x4809C12c %x\n", readl(ioremap(0x4809C12c, 0x4)));
1190 printk("0x4809C130 %x\n", readl(ioremap(0x4809C130, 0x4)));
1191 printk("0x4809C134 %x\n", readl(ioremap(0x4809C134, 0x4)));
1192
1193 printk("0x4809C200 %x\n", readl(ioremap(0x4809C200, 0x4)));
1194 printk("0x4809C204 %x\n", readl(ioremap(0x4809C204, 0x4)));
1195 printk("0x4809C208 %x\n", readl(ioremap(0x4809C208, 0x4)));
1196 printk("0x4809C20c %x\n", readl(ioremap(0x4809C20c, 0x4)));
1197
1198 printk("0x4809C210 %x\n", readl(ioremap(0x4809C210, 0x4)));
1199 printk("0x4809C214 %x\n", readl(ioremap(0x4809C214, 0x4)));
1200 printk("0x4809C218 %x\n", readl(ioremap(0x4809C218, 0x4)));
1201 printk("0x4809C21c %x\n", readl(ioremap(0x4809C21c, 0x4)));
1202
1203 printk("0x4809C224 %x\n", readl(ioremap(0x4809C224, 0x4)));
1204 printk("0x4809C228 %x\n", readl(ioremap(0x4809C228, 0x4)));
1205 printk("0x4809C22c %x\n", readl(ioremap(0x4809C22c, 0x4)));
1206
1207 printk("0x4809C230 %x\n", readl(ioremap(0x4809C230, 0x4)));
1208 printk("0x4809C234 %x\n", readl(ioremap(0x4809C234, 0x4)));
1209 printk("0x4809C238 %x\n", readl(ioremap(0x4809C238, 0x4)));
1210 printk("0x4809C23c %x\n", readl(ioremap(0x4809C23c, 0x4)));
1211
1212 printk("0x4809C240 %x\n", readl(ioremap(0x4809C240, 0x4)));
1213 printk("0x4809C244 %x\n", readl(ioremap(0x4809C244, 0x4)));
1214 printk("0x4809C248 %x\n", readl(ioremap(0x4809C248, 0x4)));
1215 printk("0x4809C24c %x\n", readl(ioremap(0x4809C24c, 0x4)));
1216
1217 printk("0x4809C250 %x\n", readl(ioremap(0x4809C250, 0x4)));
1218 printk("0x4809C254 %x\n", readl(ioremap(0x4809C254, 0x4)));
1219 printk("0x4809C258 %x\n", readl(ioremap(0x4809C258, 0x4)));
1220 printk("0x4809C25c %x\n", readl(ioremap(0x4809C25c, 0x4)));
1221
1222 printk("0x4809C260 %x\n", readl(ioremap(0x4809C260, 0x4)));
1223 printk("0x4809C264 %x\n", readl(ioremap(0x4809C264, 0x4)));
1224 printk("0x4809C268 %x\n", readl(ioremap(0x4809C268, 0x4)));
1225 printk("0x4809C26c %x\n", readl(ioremap(0x4809C26c, 0x4)));
1226 printk("0x4809C2fc %x\n", readl(ioremap(0x4809C2fc, 0x4)));
1227 printk("****************************\n");
1228 }
1229#endif
1230
1231 if (cmd->opcode == MMC_SET_BLOCK_COUNT)
1232 sdhci_dumpregs(host);
1233 printk("%s %d %x %x\n", __func__, __LINE__, SDHCI_MAKE_CMD(cmd->opcode, flags), readl(ioremap(0x4809C110, 0x4)));
1177 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); 1234 sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
1178} 1235}
1179EXPORT_SYMBOL_GPL(sdhci_send_command); 1236EXPORT_SYMBOL_GPL(sdhci_send_command);
@@ -1774,6 +1831,8 @@ void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1774 if (host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS) 1831 if (host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1775 sdhci_do_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA); 1832 sdhci_do_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
1776 1833
1834 host->ops->set_bus_mode(host, ios->bus_mode);
1835
1777 mmiowb(); 1836 mmiowb();
1778} 1837}
1779EXPORT_SYMBOL_GPL(sdhci_set_ios); 1838EXPORT_SYMBOL_GPL(sdhci_set_ios);
@@ -3471,7 +3530,10 @@ int sdhci_setup_host(struct sdhci_host *host)
3471 mmc->max_busy_timeout /= host->timeout_clk; 3530 mmc->max_busy_timeout /= host->timeout_clk;
3472 } 3531 }
3473 3532
3474 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE | MMC_CAP_CMD23; 3533 if (!(host->quirks2 & SDHCI_QUIRK2_NO_CAP_CMD23))
3534 mmc->caps |= MMC_CAP_CMD23;
3535
3536 mmc->caps |= MMC_CAP_SDIO_IRQ | MMC_CAP_ERASE;
3475 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; 3537 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD;
3476 3538
3477 if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12) 3539 if (host->quirks & SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12)
@@ -3705,6 +3767,7 @@ int sdhci_setup_host(struct sdhci_host *host)
3705 mmc->max_seg_size = 65535; 3767 mmc->max_seg_size = 65535;
3706 else 3768 else
3707 mmc->max_seg_size = 65536; 3769 mmc->max_seg_size = 65536;
3770 mmc->max_seg_size = 65532;
3708 } else { 3771 } else {
3709 mmc->max_seg_size = mmc->max_req_size; 3772 mmc->max_seg_size = mmc->max_req_size;
3710 } 3773 }
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index 3ad2f4b3a326..dfc7764e848f 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -436,6 +436,7 @@ struct sdhci_host {
436/* Broken Clock divider zero in controller */ 436/* Broken Clock divider zero in controller */
437#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15) 437#define SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN (1<<15)
438#define SDHCI_QUIRK2_NO_CRC_SHIFTING (1<<16) 438#define SDHCI_QUIRK2_NO_CRC_SHIFTING (1<<16)
439#define SDHCI_QUIRK2_NO_CAP_CMD23 (1<<17)
439 440
440 int irq; /* Device IRQ */ 441 int irq; /* Device IRQ */
441 void __iomem *ioaddr; /* Mapped address */ 442 void __iomem *ioaddr; /* Mapped address */
@@ -570,6 +571,7 @@ struct sdhci_ops {
570 void (*set_timeout)(struct sdhci_host *host, 571 void (*set_timeout)(struct sdhci_host *host,
571 struct mmc_command *cmd); 572 struct mmc_command *cmd);
572 void (*set_bus_width)(struct sdhci_host *host, int width); 573 void (*set_bus_width)(struct sdhci_host *host, int width);
574 void (*set_bus_mode)(struct sdhci_host *host, unsigned int mode);
573 void (*platform_send_init_74_clocks)(struct sdhci_host *host, 575 void (*platform_send_init_74_clocks)(struct sdhci_host *host,
574 u8 power_mode); 576 u8 power_mode);
575 unsigned int (*get_ro)(struct sdhci_host *host); 577 unsigned int (*get_ro)(struct sdhci_host *host);