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authorRoger Quadros2014-05-05 04:54:45 -0500
committerKishon Vijay Abraham I2014-05-05 04:57:26 -0500
commit010bdc287b20706e22cec953fac6fdf96c9917ed (patch)
tree1d7b679dddc93cd9ef785fc90adcd97ca4a2223d /arch
parentcc72957862a3f50e8f0caad50ef2a7b760e0dbb1 (diff)
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ARM: dts: dra7: Add USB related nodes
Add nodes for the Super Speed USB controllers, omap-control-usb, USB2 PHY and USB3 PHY devices. Remove ocp2scp1 address space from hwmod data as it is now provided via device tree. CC: Benoît Cousson <bcousson@baylibre.com> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/boot/dts/dra7.dtsi149
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c10
2 files changed, 149 insertions, 10 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index d93311a40046..faebcf326222 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -798,6 +798,155 @@
798 dma-names = "tx0", "rx0"; 798 dma-names = "tx0", "rx0";
799 status = "disabled"; 799 status = "disabled";
800 }; 800 };
801
802 omap_control_usb2phy1: control-phy@4a002300 {
803 compatible = "ti,control-phy-usb2";
804 reg = <0x4a002300 0x4>;
805 reg-names = "power";
806 };
807
808 omap_control_usb3phy1: control-phy@4a002370 {
809 compatible = "ti,control-phy-pipe3";
810 reg = <0x4a002370 0x4>;
811 reg-names = "power";
812 };
813
814 omap_control_usb2phy2: control-phy@0x4a002e74 {
815 compatible = "ti,control-phy-usb2-dra7";
816 reg = <0x4a002e74 0x4>;
817 reg-names = "power";
818 };
819
820 /* OCP2SCP1 */
821 ocp2scp@4a080000 {
822 compatible = "ti,omap-ocp2scp";
823 #address-cells = <1>;
824 #size-cells = <1>;
825 ranges;
826 reg = <0x4a080000 0x20>;
827 ti,hwmods = "ocp2scp1";
828
829 usb2_phy1: phy@4a084000 {
830 compatible = "ti,omap-usb2";
831 reg = <0x4a084000 0x400>;
832 ctrl-module = <&omap_control_usb2phy1>;
833 clocks = <&usb_phy1_always_on_clk32k>,
834 <&usb_otg_ss1_refclk960m>;
835 clock-names = "wkupclk",
836 "refclk";
837 #phy-cells = <0>;
838 };
839
840 usb2_phy2: phy@4a085000 {
841 compatible = "ti,omap-usb2";
842 reg = <0x4a085000 0x400>;
843 ctrl-module = <&omap_control_usb2phy2>;
844 clocks = <&usb_phy2_always_on_clk32k>,
845 <&usb_otg_ss2_refclk960m>;
846 clock-names = "wkupclk",
847 "refclk";
848 #phy-cells = <0>;
849 };
850
851 usb3_phy1: phy@4a084400 {
852 compatible = "ti,omap-usb3";
853 reg = <0x4a084400 0x80>,
854 <0x4a084800 0x64>,
855 <0x4a084c00 0x40>;
856 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
857 ctrl-module = <&omap_control_usb3phy1>;
858 clocks = <&usb_phy3_always_on_clk32k>,
859 <&sys_clkin1>,
860 <&usb_otg_ss1_refclk960m>;
861 clock-names = "wkupclk",
862 "sysclk",
863 "refclk";
864 #phy-cells = <0>;
865 };
866 };
867
868 omap_dwc3_1@48880000 {
869 compatible = "ti,dwc3";
870 ti,hwmods = "usb_otg_ss1";
871 reg = <0x48880000 0x10000>;
872 interrupts = <0 77 4>;
873 #address-cells = <1>;
874 #size-cells = <1>;
875 utmi-mode = <2>;
876 ranges;
877 usb1: usb@48890000 {
878 compatible = "snps,dwc3";
879 reg = <0x48890000 0x17000>;
880 interrupts = <0 76 4>;
881 phys = <&usb2_phy1>, <&usb3_phy1>;
882 phy-names = "usb2-phy", "usb3-phy";
883 tx-fifo-resize;
884 maximum-speed = "super-speed";
885 dr_mode = "otg";
886 };
887 };
888
889 omap_dwc3_2@488c0000 {
890 compatible = "ti,dwc3";
891 ti,hwmods = "usb_otg_ss2";
892 reg = <0x488c0000 0x10000>;
893 interrupts = <0 92 4>;
894 #address-cells = <1>;
895 #size-cells = <1>;
896 utmi-mode = <2>;
897 ranges;
898 usb2: usb@488d0000 {
899 compatible = "snps,dwc3";
900 reg = <0x488d0000 0x17000>;
901 interrupts = <0 78 4>;
902 phys = <&usb2_phy2>;
903 phy-names = "usb2-phy";
904 tx-fifo-resize;
905 maximum-speed = "high-speed";
906 dr_mode = "otg";
907 };
908 };
909
910 /* IRQ for DWC3_3 and DWC3_4 need IRQ crossbar */
911 omap_dwc3_3@48900000 {
912 compatible = "ti,dwc3";
913 ti,hwmods = "usb_otg_ss3";
914 reg = <0x48900000 0x10000>;
915 /* interrupts = <0 TBD 4>; */
916 #address-cells = <1>;
917 #size-cells = <1>;
918 utmi-mode = <2>;
919 ranges;
920 status = "disabled";
921 usb3: usb@48910000 {
922 compatible = "snps,dwc3";
923 reg = <0x48910000 0x17000>;
924 /* interrupts = <0 93 4>; */
925 tx-fifo-resize;
926 maximum-speed = "high-speed";
927 dr_mode = "otg";
928 };
929 };
930
931 omap_dwc3_4@48940000 {
932 compatible = "ti,dwc3";
933 ti,hwmods = "usb_otg_ss4";
934 reg = <0x48940000 0x10000>;
935 /* interrupts = <0 TBD 4>; */
936 #address-cells = <1>;
937 #size-cells = <1>;
938 utmi-mode = <2>;
939 ranges;
940 status = "disabled";
941 usb4: usb@48950000 {
942 compatible = "snps,dwc3";
943 reg = <0x48950000 0x17000>;
944 /* interrupts = <0 TBD 4>; */
945 tx-fifo-resize;
946 maximum-speed = "high-speed";
947 dr_mode = "otg";
948 };
949 };
801 }; 950 };
802 951
803 crossbar_mpu: crossbar@4a020000 { 952 crossbar_mpu: crossbar@4a020000 {
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 7594a8ec762a..c7c932ed71e0 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -2321,21 +2321,11 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__mpu = {
2321 .user = OCP_USER_MPU | OCP_USER_SDMA, 2321 .user = OCP_USER_MPU | OCP_USER_SDMA,
2322}; 2322};
2323 2323
2324static struct omap_hwmod_addr_space dra7xx_ocp2scp1_addrs[] = {
2325 {
2326 .pa_start = 0x4a080000,
2327 .pa_end = 0x4a08001f,
2328 .flags = ADDR_TYPE_RT
2329 },
2330 { }
2331};
2332
2333/* l4_cfg -> ocp2scp1 */ 2324/* l4_cfg -> ocp2scp1 */
2334static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp1 = { 2325static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp1 = {
2335 .master = &dra7xx_l4_cfg_hwmod, 2326 .master = &dra7xx_l4_cfg_hwmod,
2336 .slave = &dra7xx_ocp2scp1_hwmod, 2327 .slave = &dra7xx_ocp2scp1_hwmod,
2337 .clk = "l4_root_clk_div", 2328 .clk = "l4_root_clk_div",
2338 .addr = dra7xx_ocp2scp1_addrs,
2339 .user = OCP_USER_MPU | OCP_USER_SDMA, 2329 .user = OCP_USER_MPU | OCP_USER_SDMA,
2340}; 2330};
2341 2331