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authorunknown2016-07-25 13:31:26 -0500
committerunknown2016-07-25 13:31:26 -0500
commita003d8b2f5307ebd866be72c35b12a1389e379d4 (patch)
treec1873bde42a0b9459f02b745f3989c8622907f0b
parentfb1a735dfa02fafb4bbc26c028aae0227dec7b2f (diff)
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pcm186x -> audk2g_pcm186x
Signed-off-by: unknown <a0226073@GTLA0226073.am.dhcp.ti.com>
Diffstat
-rw-r--r--include/evmc66x_audio_dc_adc.h58
-rw-r--r--src/audk2g.c62
-rw-r--r--src/audk2g_dc_adc.c416
-rw-r--r--src/audk2g_dc_dac.c6
4 files changed, 271 insertions, 271 deletions
diff --git a/include/evmc66x_audio_dc_adc.h b/include/evmc66x_audio_dc_adc.h
index 135efd1..0cfa13b 100644
--- a/include/evmc66x_audio_dc_adc.h
+++ b/include/evmc66x_audio_dc_adc.h
@@ -116,9 +116,9 @@
116/** Macro to enable DEBUG mode */ 116/** Macro to enable DEBUG mode */
117#define DEBUG_PCM186x_ENABLE 117#define DEBUG_PCM186x_ENABLE
118 118
119/** Macro to enable register echo in pcm186x_write_reg() 119/** Macro to enable register echo in audk2g_pcm186x_write_reg()
120 When this macro is enabled, every register written is read back and 120 When this macro is enabled, every register written is read back and
121 its value is displayed by pcm186x_write_reg()*/ 121 its value is displayed by audk2g_pcm186x_write_reg()*/
122#define ENABLE_AUDK2G_ADC_REG_ECHO (1) 122#define ENABLE_AUDK2G_ADC_REG_ECHO (1)
123 123
124#ifdef DEBUG_PCM186x_ENABLE 124#ifdef DEBUG_PCM186x_ENABLE
@@ -158,7 +158,7 @@ typedef struct _AdcRegDefConfig
158 * \return 0 if success. 158 * \return 0 if success.
159 * 159 *
160 **/ 160 **/
161AUDK2G_ADC_RET pcm186xAdcInit(Uint8 addr); 161AUDK2G_ADC_RET audk2g_pcm186xAdcInit(Uint8 addr);
162 162
163/** 163/**
164 * \brief Reads the Current Page no. 164 * \brief Reads the Current Page no.
@@ -168,7 +168,7 @@ AUDK2G_ADC_RET pcm186xAdcInit(Uint8 addr);
168 * \return Page no if success. 168 * \return Page no if success.
169 * 169 *
170 **/ 170 **/
171Int8 pcm186xPageCheck(Uint8 addr); 171Int8 audk2g_pcm186xPageCheck(Uint8 addr);
172 172
173/** 173/**
174 * \brief Register dump of Page 0, 1 and 253. 174 * \brief Register dump of Page 0, 1 and 253.
@@ -178,7 +178,7 @@ Int8 pcm186xPageCheck(Uint8 addr);
178 * \return 0 if success. 178 * \return 0 if success.
179 * 179 *
180 **/ 180 **/
181AUDK2G_ADC_RET pcm186xRegDump(Uint8 addr); 181AUDK2G_ADC_RET audk2g_pcm186xRegDump(Uint8 addr);
182 182
183/** 183/**
184 * \brief Enable/Disable Mic Bias Control for analog MIC input. 184 * \brief Enable/Disable Mic Bias Control for analog MIC input.
@@ -192,7 +192,7 @@ AUDK2G_ADC_RET pcm186xRegDump(Uint8 addr);
192 * \return 0 if success. 192 * \return 0 if success.
193 * 193 *
194 */ 194 */
195AUDK2G_ADC_RET pcm186xMicBiasCtrl(Uint8 addr, Uint8 power); 195AUDK2G_ADC_RET audk2g_pcm186xMicBiasCtrl(Uint8 addr, Uint8 power);
196 196
197/** 197/**
198 * \brief Resets PCM1865 ADC. . 198 * \brief Resets PCM1865 ADC. .
@@ -200,7 +200,7 @@ AUDK2G_ADC_RET pcm186xMicBiasCtrl(Uint8 addr, Uint8 power);
200 * \return 0 if success. 200 * \return 0 if success.
201 * 201 *
202 **/ 202 **/
203AUDK2G_ADC_RET audk2g_pcm186xReset(Uint8 addr); 203AUDK2G_ADC_RET audk2g_audk2g_pcm186xReset(Uint8 addr);
204 204
205/** 205/**
206 * \brief Configures the data format and slot width 206 * \brief Configures the data format and slot width
@@ -221,7 +221,7 @@ AUDK2G_ADC_RET audk2g_pcm186xReset(Uint8 addr);
221 * \return 0 if success. 221 * \return 0 if success.
222 * 222 *
223 **/ 223 **/
224AUDK2G_ADC_RET pcm186xDataConfig(Uint8 addr, Uint8 dataType, Uint8 slotWidth); 224AUDK2G_ADC_RET audk2g_pcm186xDataConfig(Uint8 addr, Uint8 dataType, Uint8 slotWidth);
225 225
226/** 226/**
227 * \brief Selects input channel for ADC. 227 * \brief Selects input channel for ADC.
@@ -258,7 +258,7 @@ AUDK2G_ADC_RET pcm186xDataConfig(Uint8 addr, Uint8 dataType, Uint8 slotWidth);
258 * \return 0 for success. 258 * \return 0 for success.
259 * 259 *
260 **/ 260 **/
261AUDK2G_ADC_RET pcm186xInputSel(Uint8 addr, Uint8 channel, Uint8 input); 261AUDK2G_ADC_RET audk2g_audk2g_pcm186xInputSel(Uint8 addr, Uint8 channel, Uint8 input);
262 262
263/** 263/**
264 * \brief Sets the ADC PGA Volume. 264 * \brief Sets the ADC PGA Volume.
@@ -277,7 +277,7 @@ AUDK2G_ADC_RET pcm186xInputSel(Uint8 addr, Uint8 channel, Uint8 input);
277 * \return 0 for success. 277 * \return 0 for success.
278 * 278 *
279 **/ 279 **/
280AUDK2G_ADC_RET audk2g_pcm186xSetVolume(Uint8 addr, Uint8 vol, Uint8 channel); 280AUDK2G_ADC_RET audk2g_audk2g_pcm186xSetVolume(Uint8 addr, Uint8 vol, Uint8 channel);
281 281
282/** 282/**
283 * \brief Unmute or Mute ADC the Channel. 283 * \brief Unmute or Mute ADC the Channel.
@@ -298,7 +298,7 @@ AUDK2G_ADC_RET audk2g_pcm186xSetVolume(Uint8 addr, Uint8 vol, Uint8 channel);
298 * \return 0 for success. 298 * \return 0 for success.
299 * 299 *
300 **/ 300 **/
301AUDK2G_ADC_RET pcm186xMuteChannel(Uint8 addr, Uint8 channel, Uint8 mute); 301AUDK2G_ADC_RET audk2g_pcm186xMuteChannel(Uint8 addr, Uint8 channel, Uint8 mute);
302 302
303/** 303/**
304 * \brief Unmute or Mute ADC the Channel. 304 * \brief Unmute or Mute ADC the Channel.
@@ -317,7 +317,7 @@ AUDK2G_ADC_RET pcm186xMuteChannel(Uint8 addr, Uint8 channel, Uint8 mute);
317 * \return 0 for success. 317 * \return 0 for success.
318 * 318 *
319 **/ 319 **/
320AUDK2G_ADC_RET pcm186xConfigPowState(Uint8 addr, Uint8 powState, Uint8 enable); 320AUDK2G_ADC_RET audk2g_pcm186xConfigPowState(Uint8 addr, Uint8 powState, Uint8 enable);
321 321
322/** 322/**
323 * \brief Enables/Disables ADC interrupts. 323 * \brief Enables/Disables ADC interrupts.
@@ -339,7 +339,7 @@ AUDK2G_ADC_RET pcm186xConfigPowState(Uint8 addr, Uint8 powState, Uint8 enable);
339 * \return 0 for success. 339 * \return 0 for success.
340 * 340 *
341 **/ 341 **/
342AUDK2G_ADC_RET pcm186xSetIntr(Uint8 addr, Uint8 intrNum, Uint8 enable); 342AUDK2G_ADC_RET audk2g_pcm186xSetIntr(Uint8 addr, Uint8 intrNum, Uint8 enable);
343 343
344/** 344/**
345 * \brief Reads ADC interrupt status register. 345 * \brief Reads ADC interrupt status register.
@@ -350,7 +350,7 @@ AUDK2G_ADC_RET pcm186xSetIntr(Uint8 addr, Uint8 intrNum, Uint8 enable);
350 * 0xFF in case of failure 350 * 0xFF in case of failure
351 * 351 *
352 **/ 352 **/
353Uint8 pcm186xGetIntrStatus(Uint8 addr); 353Uint8 audk2g_pcm186xGetIntrStatus(Uint8 addr);
354 354
355/** 355/**
356 * \brief Controls ADC DSP channel configuration 356 * \brief Controls ADC DSP channel configuration
@@ -364,7 +364,7 @@ Uint8 pcm186xGetIntrStatus(Uint8 addr);
364 * \return 0 for success. 364 * \return 0 for success.
365 * 365 *
366 **/ 366 **/
367AUDK2G_ADC_RET pcm186xDspCtrl(Uint8 addr, Uint8 channel); 367AUDK2G_ADC_RET audk2g_pcm186xDspCtrl(Uint8 addr, Uint8 channel);
368 368
369/** 369/**
370 * \brief Programs ADC DSP coefficients 370 * \brief Programs ADC DSP coefficients
@@ -378,7 +378,7 @@ AUDK2G_ADC_RET pcm186xDspCtrl(Uint8 addr, Uint8 channel);
378 * \return 0 for success. 378 * \return 0 for success.
379 * 379 *
380 **/ 380 **/
381AUDK2G_ADC_RET pcm186xProgDspCoeff(Uint8 addr, Uint8 regAddr, Uint32 coeff); 381AUDK2G_ADC_RET audk2g_pcm186xProgDspCoeff(Uint8 addr, Uint8 regAddr, Uint32 coeff);
382 382
383/** 383/**
384 * \brief Reads ADC power state 384 * \brief Reads ADC power state
@@ -396,7 +396,7 @@ AUDK2G_ADC_RET pcm186xProgDspCoeff(Uint8 addr, Uint8 regAddr, Uint32 coeff);
396 * 0xF - Run 396 * 0xF - Run
397 * 397 *
398 **/ 398 **/
399Uint8 pcm186xGetPowerStateStatus(Uint8 addr); 399Uint8 audk2g_pcm186xGetPowerStateStatus(Uint8 addr);
400 400
401/** 401/**
402 * \brief Reads current sampling frequency 402 * \brief Reads current sampling frequency
@@ -414,7 +414,7 @@ Uint8 pcm186xGetPowerStateStatus(Uint8 addr);
414 * 0x7 - Invalid Fs 414 * 0x7 - Invalid Fs
415 * 415 *
416 **/ 416 **/
417Uint8 pcm186xGetSampleFreqStatus(Uint8 addr); 417Uint8 audk2g_pcm186xGetSampleFreqStatus(Uint8 addr);
418 418
419/** 419/**
420 * \brief Reads bit clock ratio status 420 * \brief Reads bit clock ratio status
@@ -431,7 +431,7 @@ Uint8 pcm186xGetSampleFreqStatus(Uint8 addr);
431 * 0x7 - Invalid BCK ratio or LRCK Halt 431 * 0x7 - Invalid BCK ratio or LRCK Halt
432 * 432 *
433 **/ 433 **/
434Uint8 pcm186xGetBckRatioStatus(Uint8 addr); 434Uint8 audk2g_pcm186xGetBckRatioStatus(Uint8 addr);
435 435
436/** 436/**
437 * \brief Reads Current SCK Ratio 437 * \brief Reads Current SCK Ratio
@@ -449,7 +449,7 @@ Uint8 pcm186xGetBckRatioStatus(Uint8 addr);
449 * 0x7 - Invalid SCK ratio or LRCK Halt 449 * 0x7 - Invalid SCK ratio or LRCK Halt
450 * 450 *
451 **/ 451 **/
452Uint8 pcm186xGetSckRatioStatus(Uint8 addr); 452Uint8 audk2g_pcm186xGetSckRatioStatus(Uint8 addr);
453 453
454/** 454/**
455 * \brief Reads LRCK Halt Status 455 * \brief Reads LRCK Halt Status
@@ -461,7 +461,7 @@ Uint8 pcm186xGetSckRatioStatus(Uint8 addr);
461 * 1 - Halt 461 * 1 - Halt
462 * 462 *
463 **/ 463 **/
464Uint8 pcm186xGetLrckHltStatus(Uint8 addr); 464Uint8 audk2g_pcm186xGetLrckHltStatus(Uint8 addr);
465 465
466/** 466/**
467 * \brief Reads BCK Halt Status 467 * \brief Reads BCK Halt Status
@@ -473,7 +473,7 @@ Uint8 pcm186xGetLrckHltStatus(Uint8 addr);
473 * 1 - Halt 473 * 1 - Halt
474 * 474 *
475 **/ 475 **/
476Uint8 pcm186xGetBckHltStatus(Uint8 addr); 476Uint8 audk2g_pcm186xGetBckHltStatus(Uint8 addr);
477 477
478/** 478/**
479 * \brief Reads SCK Halt Status 479 * \brief Reads SCK Halt Status
@@ -485,7 +485,7 @@ Uint8 pcm186xGetBckHltStatus(Uint8 addr);
485 * 1 - Halt 485 * 1 - Halt
486 * 486 *
487 **/ 487 **/
488Uint8 pcm186xGetSckHltStatus(Uint8 addr); 488Uint8 audk2g_pcm186xGetSckHltStatus(Uint8 addr);
489 489
490/** 490/**
491 * \brief Reads LRCK Error Status 491 * \brief Reads LRCK Error Status
@@ -497,7 +497,7 @@ Uint8 pcm186xGetSckHltStatus(Uint8 addr);
497 * 1 - Error 497 * 1 - Error
498 * 498 *
499 **/ 499 **/
500Uint8 pcm186xGetLrckErrStatus(Uint8 addr); 500Uint8 audk2g_pcm186xGetLrckErrStatus(Uint8 addr);
501 501
502/** 502/**
503 * \brief Reads BCK Error Status 503 * \brief Reads BCK Error Status
@@ -509,7 +509,7 @@ Uint8 pcm186xGetLrckErrStatus(Uint8 addr);
509 * 1 - Error 509 * 1 - Error
510 * 510 *
511 **/ 511 **/
512Uint8 pcm186xGetBckErrStatus(Uint8 addr); 512Uint8 audk2g_pcm186xGetBckErrStatus(Uint8 addr);
513 513
514/** 514/**
515 * \brief Reads SCK Error Status 515 * \brief Reads SCK Error Status
@@ -521,7 +521,7 @@ Uint8 pcm186xGetBckErrStatus(Uint8 addr);
521 * 1 - Error 521 * 1 - Error
522 * 522 *
523 **/ 523 **/
524Uint8 pcm186xGetSckErrStatus(Uint8 addr); 524Uint8 audk2g_pcm186xGetSckErrStatus(Uint8 addr);
525 525
526/** 526/**
527 * \brief Reads DVDD Status 527 * \brief Reads DVDD Status
@@ -533,7 +533,7 @@ Uint8 pcm186xGetSckErrStatus(Uint8 addr);
533 * 1 - Good 533 * 1 - Good
534 * 534 *
535 **/ 535 **/
536Uint8 pcm186xGetDvddStatus(Uint8 addr); 536Uint8 audk2g_pcm186xGetDvddStatus(Uint8 addr);
537 537
538/** 538/**
539 * \brief Reads AVDD Status 539 * \brief Reads AVDD Status
@@ -545,7 +545,7 @@ Uint8 pcm186xGetDvddStatus(Uint8 addr);
545 * 1 - Good 545 * 1 - Good
546 * 546 *
547 **/ 547 **/
548Uint8 pcm186xGetAvddStatus(Uint8 addr); 548Uint8 audk2g_pcm186xGetAvddStatus(Uint8 addr);
549 549
550/** 550/**
551 * \brief Reads Digital LDO Status 551 * \brief Reads Digital LDO Status
@@ -557,7 +557,7 @@ Uint8 pcm186xGetAvddStatus(Uint8 addr);
557 * 1 - Good 557 * 1 - Good
558 * 558 *
559 **/ 559 **/
560Uint8 pcm186xGetLdoStatus(Uint8 addr); 560Uint8 audk2g_pcm186xGetLdoStatus(Uint8 addr);
561 561
562#endif // _EVMC66X_AUDIO_DC_AUDK2G_ADC_H_ 562#endif // _EVMC66X_AUDIO_DC_AUDK2G_ADC_H_
563 563
diff --git a/src/audk2g.c b/src/audk2g.c
index 612fe29..f9d34da 100644
--- a/src/audk2g.c
+++ b/src/audk2g.c
@@ -252,7 +252,7 @@ Audk2g_STATUS audk2g_AudioAdcInit(AdcDevId devId)
252 { 252 {
253 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 253 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
254 { 254 {
255 retVal = pcm186xAdcInit(audk2g_gAdcI2cAddr[id]); 255 retVal = audk2g_pcm186xAdcInit(audk2g_gAdcI2cAddr[id]);
256 if(retVal) 256 if(retVal)
257 { 257 {
258 IFPRINT(audk2g_write("audk2g_AudioAdcInit : ADC Initialization Failed \n")); 258 IFPRINT(audk2g_write("audk2g_AudioAdcInit : ADC Initialization Failed \n"));
@@ -295,7 +295,7 @@ Audk2g_STATUS audk2g_AudioAdcReset(AdcDevId devId)
295 { 295 {
296 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 296 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
297 { 297 {
298 retVal = audk2g_pcm186xReset(audk2g_gAdcI2cAddr[id]); 298 retVal = audk2g_audk2g_pcm186xReset(audk2g_gAdcI2cAddr[id]);
299 if(retVal) 299 if(retVal)
300 { 300 {
301 IFPRINT(audk2g_write("audk2g_AudioAdcReset : ADC Reset Failed \n")); 301 IFPRINT(audk2g_write("audk2g_AudioAdcReset : ADC Reset Failed \n"));
@@ -349,7 +349,7 @@ Audk2g_STATUS audk2g_AudioAdcSetGain(AdcDevId devId,
349 { 349 {
350 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 350 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
351 { 351 {
352 retVal = audk2g_pcm186xSetVolume(audk2g_gAdcI2cAddr[id], (Uint8)gain, 352 retVal = audk2g_audk2g_pcm186xSetVolume(audk2g_gAdcI2cAddr[id], (Uint8)gain,
353 (Uint8)chanId); 353 (Uint8)chanId);
354 if(retVal) 354 if(retVal)
355 { 355 {
@@ -412,7 +412,7 @@ Audk2g_STATUS audk2g_AudioAdcSetLeftInputMux(AdcDevId devId,
412 { 412 {
413 if(chanId == AUDK2G_ADC_CH_ALL) 413 if(chanId == AUDK2G_ADC_CH_ALL)
414 { 414 {
415 retVal = pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)AUDK2G_ADC_CH1_LEFT, 415 retVal = audk2g_audk2g_pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)AUDK2G_ADC_CH1_LEFT,
416 (Uint8)inputMux); 416 (Uint8)inputMux);
417 if(retVal) 417 if(retVal)
418 { 418 {
@@ -421,12 +421,12 @@ Audk2g_STATUS audk2g_AudioAdcSetLeftInputMux(AdcDevId devId,
421 return (Audk2g_EFAIL); 421 return (Audk2g_EFAIL);
422 } 422 }
423 423
424 retVal = pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)AUDK2G_ADC_CH2_LEFT, 424 retVal = audk2g_audk2g_pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)AUDK2G_ADC_CH2_LEFT,
425 (Uint8)inputMux); 425 (Uint8)inputMux);
426 } 426 }
427 else 427 else
428 { 428 {
429 retVal = pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)chanId, 429 retVal = audk2g_audk2g_pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)chanId,
430 (Uint8)inputMux); 430 (Uint8)inputMux);
431 } 431 }
432 432
@@ -491,7 +491,7 @@ Audk2g_STATUS audk2g_AudioAdcSetRightInputMux(AdcDevId devId,
491 { 491 {
492 if(chanId == AUDK2G_ADC_CH_ALL) 492 if(chanId == AUDK2G_ADC_CH_ALL)
493 { 493 {
494 retVal = pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)AUDK2G_ADC_CH1_RIGHT, 494 retVal = audk2g_audk2g_pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)AUDK2G_ADC_CH1_RIGHT,
495 (Uint8)inputMux); 495 (Uint8)inputMux);
496 if(retVal) 496 if(retVal)
497 { 497 {
@@ -500,12 +500,12 @@ Audk2g_STATUS audk2g_AudioAdcSetRightInputMux(AdcDevId devId,
500 return (Audk2g_EFAIL); 500 return (Audk2g_EFAIL);
501 } 501 }
502 502
503 retVal = pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)AUDK2G_ADC_CH2_RIGHT, 503 retVal = audk2g_audk2g_pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)AUDK2G_ADC_CH2_RIGHT,
504 (Uint8)inputMux); 504 (Uint8)inputMux);
505 } 505 }
506 else 506 else
507 { 507 {
508 retVal = pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)chanId, 508 retVal = audk2g_audk2g_pcm186xInputSel(audk2g_gAdcI2cAddr[id], (Uint8)chanId,
509 (Uint8)inputMux); 509 (Uint8)inputMux);
510 } 510 }
511 511
@@ -560,7 +560,7 @@ Audk2g_STATUS audk2g_AudioAdcDataConfig(AdcDevId devId,
560 { 560 {
561 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 561 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
562 { 562 {
563 retVal = pcm186xDataConfig(audk2g_gAdcI2cAddr[id], (Uint8)format, 563 retVal = audk2g_pcm186xDataConfig(audk2g_gAdcI2cAddr[id], (Uint8)format,
564 (Uint8)wLen); 564 (Uint8)wLen);
565 if(retVal) 565 if(retVal)
566 { 566 {
@@ -625,7 +625,7 @@ Audk2g_STATUS audk2g_AudioAdcMuteCtrl(AdcDevId devId,
625 { 625 {
626 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 626 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
627 { 627 {
628 retVal = pcm186xMuteChannel(audk2g_gAdcI2cAddr[id], chan, 628 retVal = audk2g_pcm186xMuteChannel(audk2g_gAdcI2cAddr[id], chan,
629 (Uint8)muteEnable); 629 (Uint8)muteEnable);
630 if(retVal) 630 if(retVal)
631 { 631 {
@@ -674,7 +674,7 @@ Audk2g_STATUS audk2g_AudioAdcMicBiasCtrl(AdcDevId devId,
674 { 674 {
675 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 675 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
676 { 676 {
677 retVal = pcm186xMicBiasCtrl(audk2g_gAdcI2cAddr[id], (Uint8)micBiasEnable); 677 retVal = audk2g_pcm186xMicBiasCtrl(audk2g_gAdcI2cAddr[id], (Uint8)micBiasEnable);
678 if(retVal) 678 if(retVal)
679 { 679 {
680 IFPRINT(audk2g_write("audk2g_AudioAdcMicBiasCtrl : ADC Access for Mic Bias Config Failed \n")); 680 IFPRINT(audk2g_write("audk2g_AudioAdcMicBiasCtrl : ADC Access for Mic Bias Config Failed \n"));
@@ -727,7 +727,7 @@ Audk2g_STATUS audk2g_AudioAdcConfigPowState(AdcDevId devId,
727 { 727 {
728 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 728 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
729 { 729 {
730 retVal = pcm186xConfigPowState(audk2g_gAdcI2cAddr[id], (Uint8)powState, 730 retVal = audk2g_pcm186xConfigPowState(audk2g_gAdcI2cAddr[id], (Uint8)powState,
731 (Uint8)stateEnable); 731 (Uint8)stateEnable);
732 if(retVal) 732 if(retVal)
733 { 733 {
@@ -782,7 +782,7 @@ Audk2g_STATUS audk2g_AudioAdcConfigIntr(AdcDevId devId,
782 { 782 {
783 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 783 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
784 { 784 {
785 retVal = pcm186xSetIntr(audk2g_gAdcI2cAddr[id], (Uint8)intId, 785 retVal = audk2g_pcm186xSetIntr(audk2g_gAdcI2cAddr[id], (Uint8)intId,
786 (Uint8)intEnable); 786 (Uint8)intEnable);
787 if(retVal) 787 if(retVal)
788 { 788 {
@@ -827,7 +827,7 @@ uint8_t audk2g_AudioAdcGetIntrStatus(AdcDevId devId,
827 return (1); 827 return (1);
828 } 828 }
829 829
830 retVal = pcm186xGetIntrStatus(audk2g_gAdcI2cAddr[devId]); 830 retVal = audk2g_pcm186xGetIntrStatus(audk2g_gAdcI2cAddr[devId]);
831 if(retVal == 0xFF) 831 if(retVal == 0xFF)
832 { 832 {
833 IFPRINT(audk2g_write("audk2g_AudioAdcGetIntrStatus : ADC Access for Intr Status Failed \n")); 833 IFPRINT(audk2g_write("audk2g_AudioAdcGetIntrStatus : ADC Access for Intr Status Failed \n"));
@@ -885,7 +885,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
885 * 0xF - Run 885 * 0xF - Run
886 */ 886 */
887 case AUDK2G_ADC_STATUS_POWER_STATE: 887 case AUDK2G_ADC_STATUS_POWER_STATE:
888 retVal = pcm186xGetPowerStateStatus(audk2g_gAdcI2cAddr[devId]); 888 retVal = audk2g_pcm186xGetPowerStateStatus(audk2g_gAdcI2cAddr[devId]);
889 break; 889 break;
890 890
891 /* Current Sampling Frequency 891 /* Current Sampling Frequency
@@ -899,7 +899,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
899 * 0x7 - Invalid Fs 899 * 0x7 - Invalid Fs
900 */ 900 */
901 case AUDK2G_ADC_STATUS_SAMPLING_FREQ: 901 case AUDK2G_ADC_STATUS_SAMPLING_FREQ:
902 retVal = pcm186xGetSampleFreqStatus(audk2g_gAdcI2cAddr[devId]); 902 retVal = audk2g_pcm186xGetSampleFreqStatus(audk2g_gAdcI2cAddr[devId]);
903 break; 903 break;
904 904
905 /* Current receiving BCK ratio 905 /* Current receiving BCK ratio
@@ -912,7 +912,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
912 * 0x7 - Invalid BCK ratio or LRCK Halt 912 * 0x7 - Invalid BCK ratio or LRCK Halt
913 */ 913 */
914 case AUDK2G_ADC_STATUS_BCK_RATIO: 914 case AUDK2G_ADC_STATUS_BCK_RATIO:
915 retVal = pcm186xGetBckRatioStatus(audk2g_gAdcI2cAddr[devId]); 915 retVal = audk2g_pcm186xGetBckRatioStatus(audk2g_gAdcI2cAddr[devId]);
916 break; 916 break;
917 917
918 /* Current SCK Ratio 918 /* Current SCK Ratio
@@ -926,7 +926,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
926 * 0x7 - Invalid SCK ratio or LRCK Halt 926 * 0x7 - Invalid SCK ratio or LRCK Halt
927 */ 927 */
928 case AUDK2G_ADC_STATUS_SCK_RATIO: 928 case AUDK2G_ADC_STATUS_SCK_RATIO:
929 retVal = pcm186xGetSckRatioStatus(audk2g_gAdcI2cAddr[devId]); 929 retVal = audk2g_pcm186xGetSckRatioStatus(audk2g_gAdcI2cAddr[devId]);
930 break; 930 break;
931 931
932 /* LRCK Halt Status 932 /* LRCK Halt Status
@@ -934,7 +934,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
934 * 1 - Halt 934 * 1 - Halt
935 */ 935 */
936 case AUDK2G_ADC_STATUS_LRCK_HALT: 936 case AUDK2G_ADC_STATUS_LRCK_HALT:
937 retVal = pcm186xGetLrckHltStatus(audk2g_gAdcI2cAddr[devId]); 937 retVal = audk2g_pcm186xGetLrckHltStatus(audk2g_gAdcI2cAddr[devId]);
938 break; 938 break;
939 939
940 /* BCK Halt Status 940 /* BCK Halt Status
@@ -942,7 +942,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
942 * 1 - Halt 942 * 1 - Halt
943 */ 943 */
944 case AUDK2G_ADC_STATUS_BCK_HALT: 944 case AUDK2G_ADC_STATUS_BCK_HALT:
945 retVal = pcm186xGetBckHltStatus(audk2g_gAdcI2cAddr[devId]); 945 retVal = audk2g_pcm186xGetBckHltStatus(audk2g_gAdcI2cAddr[devId]);
946 break; 946 break;
947 947
948 /* SCK Halt Status 948 /* SCK Halt Status
@@ -950,7 +950,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
950 * 1 - Halt 950 * 1 - Halt
951 */ 951 */
952 case AUDK2G_ADC_STATUS_SCK_HALT: 952 case AUDK2G_ADC_STATUS_SCK_HALT:
953 retVal = pcm186xGetSckHltStatus(audk2g_gAdcI2cAddr[devId]); 953 retVal = audk2g_pcm186xGetSckHltStatus(audk2g_gAdcI2cAddr[devId]);
954 break; 954 break;
955 955
956 /* LRCK Error Status 956 /* LRCK Error Status
@@ -958,7 +958,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
958 * 1 - Error 958 * 1 - Error
959 */ 959 */
960 case AUDK2G_ADC_STATUS_LRCK_ERR: 960 case AUDK2G_ADC_STATUS_LRCK_ERR:
961 retVal = pcm186xGetLrckErrStatus(audk2g_gAdcI2cAddr[devId]); 961 retVal = audk2g_pcm186xGetLrckErrStatus(audk2g_gAdcI2cAddr[devId]);
962 break; 962 break;
963 963
964 /* BCK Error Status 964 /* BCK Error Status
@@ -966,7 +966,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
966 * 1 - Error 966 * 1 - Error
967 */ 967 */
968 case AUDK2G_ADC_STATUS_BCK_ERR: 968 case AUDK2G_ADC_STATUS_BCK_ERR:
969 retVal = pcm186xGetBckErrStatus(audk2g_gAdcI2cAddr[devId]); 969 retVal = audk2g_pcm186xGetBckErrStatus(audk2g_gAdcI2cAddr[devId]);
970 break; 970 break;
971 971
972 /* SCK Error Status 972 /* SCK Error Status
@@ -974,7 +974,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
974 * 1 - Error 974 * 1 - Error
975 */ 975 */
976 case AUDK2G_ADC_STATUS_SCK_ERR: 976 case AUDK2G_ADC_STATUS_SCK_ERR:
977 retVal = pcm186xGetSckErrStatus(audk2g_gAdcI2cAddr[devId]); 977 retVal = audk2g_pcm186xGetSckErrStatus(audk2g_gAdcI2cAddr[devId]);
978 break; 978 break;
979 979
980 /* DVDD Status 980 /* DVDD Status
@@ -982,7 +982,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
982 * 1 - Good 982 * 1 - Good
983 */ 983 */
984 case AUDK2G_ADC_STATUS_DVDD: 984 case AUDK2G_ADC_STATUS_DVDD:
985 retVal = pcm186xGetDvddStatus(audk2g_gAdcI2cAddr[devId]); 985 retVal = audk2g_pcm186xGetDvddStatus(audk2g_gAdcI2cAddr[devId]);
986 break; 986 break;
987 987
988 /* AVDD Status 988 /* AVDD Status
@@ -990,7 +990,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
990 * 1 - Good 990 * 1 - Good
991 */ 991 */
992 case AUDK2G_ADC_STATUS_AVDD: 992 case AUDK2G_ADC_STATUS_AVDD:
993 retVal = pcm186xGetAvddStatus(audk2g_gAdcI2cAddr[devId]); 993 retVal = audk2g_pcm186xGetAvddStatus(audk2g_gAdcI2cAddr[devId]);
994 break; 994 break;
995 995
996 /* Digital LDO Status 996 /* Digital LDO Status
@@ -998,7 +998,7 @@ uint8_t audk2g_AudioAdcGetStatus(AdcDevId devId,
998 * 1 - Good 998 * 1 - Good
999 */ 999 */
1000 case AUDK2G_ADC_STATUS_LDO: 1000 case AUDK2G_ADC_STATUS_LDO:
1001 retVal = pcm186xGetLdoStatus(audk2g_gAdcI2cAddr[devId]); 1001 retVal = audk2g_pcm186xGetLdoStatus(audk2g_gAdcI2cAddr[devId]);
1002 break; 1002 break;
1003 1003
1004 default: 1004 default:
@@ -1052,7 +1052,7 @@ Audk2g_STATUS audk2g_AudioAdcDspCtrl(AdcDevId devId,
1052 { 1052 {
1053 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 1053 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
1054 { 1054 {
1055 retVal = pcm186xDspCtrl(audk2g_gAdcI2cAddr[id], (Uint8)chanCfg); 1055 retVal = audk2g_pcm186xDspCtrl(audk2g_gAdcI2cAddr[id], (Uint8)chanCfg);
1056 if(retVal) 1056 if(retVal)
1057 { 1057 {
1058 IFPRINT(audk2g_write("audk2g_AudioAdcDspCtrl : ADC Access for DSP Chan Config Failed \n")); 1058 IFPRINT(audk2g_write("audk2g_AudioAdcDspCtrl : ADC Access for DSP Chan Config Failed \n"));
@@ -1104,7 +1104,7 @@ Audk2g_STATUS audk2g_AudioAdcProgDspCoeff(AdcDevId devId,
1104 { 1104 {
1105 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 1105 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
1106 { 1106 {
1107 retVal = pcm186xProgDspCoeff(audk2g_gAdcI2cAddr[id], (Uint8)coeffRegAddr, 1107 retVal = audk2g_pcm186xProgDspCoeff(audk2g_gAdcI2cAddr[id], (Uint8)coeffRegAddr,
1108 (Uint32)dspCoeff); 1108 (Uint32)dspCoeff);
1109 if(retVal) 1109 if(retVal)
1110 { 1110 {
@@ -1150,7 +1150,7 @@ Audk2g_STATUS audk2g_AudioAdcGetRegDump(AdcDevId devId)
1150 { 1150 {
1151 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL)) 1151 if((id == devId) || (devId == AUDK2G_ADC_DEVICE_ALL))
1152 { 1152 {
1153 retVal = pcm186xRegDump(audk2g_gAdcI2cAddr[id]); 1153 retVal = audk2g_pcm186xRegDump(audk2g_gAdcI2cAddr[id]);
1154 if(retVal) 1154 if(retVal)
1155 { 1155 {
1156 IFPRINT(audk2g_write("audk2g_AudioAdcGetRegDump : ADC Reg Read Failed \n")); 1156 IFPRINT(audk2g_write("audk2g_AudioAdcGetRegDump : ADC Reg Read Failed \n"));
diff --git a/src/audk2g_dc_adc.c b/src/audk2g_dc_adc.c
index 9970009..16837ff 100644
--- a/src/audk2g_dc_adc.c
+++ b/src/audk2g_dc_adc.c
@@ -61,7 +61,7 @@
61 * 61 *
62 * {"Reg addr", "Value"} 62 * {"Reg addr", "Value"}
63 * 63 *
64 * Array to to be used when we call pcm186xADCInit from app layer. 64 * Array to to be used when we call audk2g_pcm186xADCInit from app layer.
65 * 65 *
66 * Note: Default values shall be finalized while implementing audio demo 66 * Note: Default values shall be finalized while implementing audio demo
67 * 67 *
@@ -115,23 +115,23 @@ static const AdcRegDefConfig Pcm186xReg[] = {
115 * \return 0 for success. 115 * \return 0 for success.
116 * 116 *
117 **/ 117 **/
118static AUDK2G_ADC_RET pcm186x_read_reg(Uint8 addr, Uint8 reg, Uint8 *data) 118static AUDK2G_ADC_RET audk2g_pcm186x_read_reg(Uint8 addr, Uint8 reg, Uint8 *data)
119{ 119{
120 AUDK2G_ADC_RET ret; 120 AUDK2G_ADC_RET ret;
121 121
122 DBG_PCM186x (audk2g_write("\nEnter pcm186x_read_reg\n")); 122 DBG_PCM186x (audk2g_write("\nEnter audk2g_pcm186x_read_reg\n"));
123 123
124 ret = i2cRead(PCM186x_I2C_PORT_NUM, addr, data, reg, 1, 1); 124 ret = i2cRead(PCM186x_I2C_PORT_NUM, addr, data, reg, 1, 1);
125 if(ret) 125 if(ret)
126 { 126 {
127 IFPRINT (audk2g_write("pcm186x_read_reg() : i2cRead error : ret = %d\n", ret)); 127 IFPRINT (audk2g_write("audk2g_pcm186x_read_reg() : i2cRead error : ret = %d\n", ret));
128 } 128 }
129 else 129 else
130 { 130 {
131 DBG_PCM186x (audk2g_write("pcm186x_read_reg() : ADC Read Successful: Reg Addr = 0x%x; Reg Value = 0x%x\n", reg, *data)); 131 DBG_PCM186x (audk2g_write("audk2g_pcm186x_read_reg() : ADC Read Successful: Reg Addr = 0x%x; Reg Value = 0x%x\n", reg, *data));
132 } 132 }
133 133
134 DBG_PCM186x (audk2g_write("Exit pcm186x_read_reg\n")); 134 DBG_PCM186x (audk2g_write("Exit audk2g_pcm186x_read_reg\n"));
135 135
136 return (ret); 136 return (ret);
137} 137}
@@ -148,7 +148,7 @@ static AUDK2G_ADC_RET pcm186x_read_reg(Uint8 addr, Uint8 reg, Uint8 *data)
148 * \return 0 for success. 148 * \return 0 for success.
149 * 149 *
150 **/ 150 **/
151static AUDK2G_ADC_RET pcm186x_write_reg(Uint8 addr, Uint8 reg, Uint8 data) 151static AUDK2G_ADC_RET audk2g_pcm186x_write_reg(Uint8 addr, Uint8 reg, Uint8 data)
152{ 152{
153 Uint8 slaveData[2]; 153 Uint8 slaveData[2];
154 AUDK2G_ADC_RET ret; 154 AUDK2G_ADC_RET ret;
@@ -157,27 +157,27 @@ static AUDK2G_ADC_RET pcm186x_write_reg(Uint8 addr, Uint8 reg, Uint8 data)
157 slaveData[0] = reg; 157 slaveData[0] = reg;
158 slaveData[1] = data; 158 slaveData[1] = data;
159 159
160 DBG_PCM186x (audk2g_write("\nEnter pcm186x_write_reg\n")); 160 DBG_PCM186x (audk2g_write("\nEnter audk2g_pcm186x_write_reg\n"));
161 161
162 DBG_PCM186x (audk2g_write("\n Write Request : addr = 0x%x reg = 0x%x" 162 DBG_PCM186x (audk2g_write("\n Write Request : addr = 0x%x reg = 0x%x"
163 " data = 0x%x page = %d\n", addr, reg, data, 163 " data = 0x%x page = %d\n", addr, reg, data,
164 pcm186xPageCheck(addr))); 164 audk2g_pcm186xPageCheck(addr)));
165 165
166 ret = i2cWrite(PCM186x_I2C_PORT_NUM, addr, slaveData, 2, I2C_RELEASE_BUS); 166 ret = i2cWrite(PCM186x_I2C_PORT_NUM, addr, slaveData, 2, I2C_RELEASE_BUS);
167 if(ret) 167 if(ret)
168 { 168 {
169 IFPRINT (audk2g_write("\npcm186x_write_reg(): i2cWrite error : ret = %d\n", ret)); 169 IFPRINT (audk2g_write("\naudk2g_pcm186x_write_reg(): i2cWrite error : ret = %d\n", ret));
170 } 170 }
171 171
172#ifdef ENABLE_AUDK2G_ADC_REG_ECHO 172#ifdef ENABLE_AUDK2G_ADC_REG_ECHO
173 ret = pcm186x_read_reg(addr, reg, &value); 173 ret = audk2g_pcm186x_read_reg(addr, reg, &value);
174 if(ret) 174 if(ret)
175 { 175 {
176 IFPRINT (audk2g_write("pcm186x_write_reg(): ADC Read for Reg Echo Failed\n")); 176 IFPRINT (audk2g_write("audk2g_pcm186x_write_reg(): ADC Read for Reg Echo Failed\n"));
177 } 177 }
178#endif 178#endif
179 179
180 DBG_PCM186x (audk2g_write("Exit pcm186x_write_reg\n")); 180 DBG_PCM186x (audk2g_write("Exit audk2g_pcm186x_write_reg\n"));
181 181
182 return (ret); 182 return (ret);
183} 183}
@@ -190,30 +190,30 @@ static AUDK2G_ADC_RET pcm186x_write_reg(Uint8 addr, Uint8 reg, Uint8 data)
190 * \return 0 if success. 190 * \return 0 if success.
191 * 191 *
192 **/ 192 **/
193AUDK2G_ADC_RET pcm186xAdcInit(Uint8 addr) 193AUDK2G_ADC_RET audk2g_pcm186xAdcInit(Uint8 addr)
194{ 194{
195 AUDK2G_ADC_RET ret = -1; 195 AUDK2G_ADC_RET ret = -1;
196 Uint8 count; 196 Uint8 count;
197 197
198 DBG_PCM186x (audk2g_write("\nEnter pcm186xAdcInit\n")); 198 DBG_PCM186x (audk2g_write("\nEnter audk2g_pcm186xAdcInit\n"));
199 199
200 DBG_PCM186x (audk2g_write("pcm186xAdcInit() : addr = 0x%x page = %d\n", 200 DBG_PCM186x (audk2g_write("audk2g_pcm186xAdcInit() : addr = 0x%x page = %d\n",
201 addr, pcm186xPageCheck(addr))); 201 addr, audk2g_pcm186xPageCheck(addr)));
202 202
203 for (count = 0; count < ARRAY_SIZE(Pcm186xReg); count++) 203 for (count = 0; count < ARRAY_SIZE(Pcm186xReg); count++)
204 { 204 {
205 ret = pcm186x_write_reg(addr, Pcm186xReg[count].reg, Pcm186xReg[count].def); 205 ret = audk2g_pcm186x_write_reg(addr, Pcm186xReg[count].reg, Pcm186xReg[count].def);
206 if(ret) 206 if(ret)
207 { 207 {
208 IFPRINT (audk2g_write("pcm186xAdcInit() : Error in Writing Register = 0x%x\n", 208 IFPRINT (audk2g_write("audk2g_pcm186xAdcInit() : Error in Writing Register = 0x%x\n",
209 Pcm186xReg[count].reg)); 209 Pcm186xReg[count].reg));
210 return (ret); 210 return (ret);
211 } 211 }
212 } 212 }
213 213
214 DBG_PCM186x (audk2g_write("pcm186xAdcInit() : In Page %d\n.", pcm186xPageCheck(addr))); 214 DBG_PCM186x (audk2g_write("audk2g_pcm186xAdcInit() : In Page %d\n.", audk2g_pcm186xPageCheck(addr)));
215 215
216 DBG_PCM186x (audk2g_write("Exit pcm186xAdcInit\n")); 216 DBG_PCM186x (audk2g_write("Exit audk2g_pcm186xAdcInit\n"));
217 217
218 return (ret); 218 return (ret);
219} 219}
@@ -226,14 +226,14 @@ AUDK2G_ADC_RET pcm186xAdcInit(Uint8 addr)
226 * \return Page no if success. 226 * \return Page no if success.
227 * 227 *
228 **/ 228 **/
229Int8 pcm186xPageCheck(Uint8 addr) 229Int8 audk2g_pcm186xPageCheck(Uint8 addr)
230{ 230{
231 Int8 ret; 231 Int8 ret;
232 Uint8 read = 0; 232 Uint8 read = 0;
233 233
234 DBG_PCM186x (audk2g_write("Enter pcm186xPageCheck\n")); 234 DBG_PCM186x (audk2g_write("Enter audk2g_pcm186xPageCheck\n"));
235 235
236 ret = pcm186x_read_reg(addr, 0x0, &read); 236 ret = audk2g_pcm186x_read_reg(addr, 0x0, &read);
237 if(ret) 237 if(ret)
238 { 238 {
239 IFPRINT (audk2g_write("Error in reading Register 0 " 239 IFPRINT (audk2g_write("Error in reading Register 0 "
@@ -241,7 +241,7 @@ Int8 pcm186xPageCheck(Uint8 addr)
241 return (ret); 241 return (ret);
242 } 242 }
243 243
244 DBG_PCM186x (audk2g_write("Exit pcm186xPageCheck\n")); 244 DBG_PCM186x (audk2g_write("Exit audk2g_pcm186xPageCheck\n"));
245 245
246 return (read); 246 return (read);
247} 247}
@@ -254,19 +254,19 @@ Int8 pcm186xPageCheck(Uint8 addr)
254 * \return 0 if success. 254 * \return 0 if success.
255 * 255 *
256 **/ 256 **/
257AUDK2G_ADC_RET pcm186xRegDump(Uint8 addr) 257AUDK2G_ADC_RET audk2g_pcm186xRegDump(Uint8 addr)
258{ 258{
259 AUDK2G_ADC_RET ret; 259 AUDK2G_ADC_RET ret;
260 Uint8 count; 260 Uint8 count;
261 Uint8 read = 0; 261 Uint8 read = 0;
262 262
263 DBG_PCM186x (audk2g_write("pcm186xRegDump() : addr = 0x%x\n", addr)); 263 DBG_PCM186x (audk2g_write("audk2g_pcm186xRegDump() : addr = 0x%x\n", addr));
264 264
265 /* Page 0 Dump */ 265 /* Page 0 Dump */
266 ret = pcm186x_write_reg(addr, 0x0, 0x00); 266 ret = audk2g_pcm186x_write_reg(addr, 0x0, 0x00);
267 if(ret) 267 if(ret)
268 { 268 {
269 IFPRINT (audk2g_write("pcm186xRegDump() : ADC Page Switch Failed\n")); 269 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : ADC Page Switch Failed\n"));
270 return (ret); 270 return (ret);
271 } 271 }
272 272
@@ -275,94 +275,94 @@ AUDK2G_ADC_RET pcm186xRegDump(Uint8 addr)
275 Need to change this in case of issues */ 275 Need to change this in case of issues */
276 for (count = 1; count <= 120; count++) 276 for (count = 1; count <= 120; count++)
277 { 277 {
278 ret = pcm186x_read_reg(addr, count, &read); 278 ret = audk2g_pcm186x_read_reg(addr, count, &read);
279 if(ret) 279 if(ret)
280 { 280 {
281 IFPRINT (audk2g_write("pcm186xRegDump() : Error in Reading Register = 0x%x\n", 281 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : Error in Reading Register = 0x%x\n",
282 count)); 282 count));
283 return (ret); 283 return (ret);
284 } 284 }
285 285
286 DBG_PCM186x (audk2g_write("Page %d : Register 0x%x = 0x%x\n", 286 DBG_PCM186x (audk2g_write("Page %d : Register 0x%x = 0x%x\n",
287 pcm186xPageCheck(addr), count, read)); 287 audk2g_pcm186xPageCheck(addr), count, read));
288 read = 0; 288 read = 0;
289 } 289 }
290 290
291 /* Page 1 Dump */ 291 /* Page 1 Dump */
292 ret = pcm186x_write_reg(addr, 0x0, 0x01); 292 ret = audk2g_pcm186x_write_reg(addr, 0x0, 0x01);
293 if(ret) 293 if(ret)
294 { 294 {
295 IFPRINT (audk2g_write("pcm186xRegDump() : ADC Page Switch Failed\n")); 295 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : ADC Page Switch Failed\n"));
296 return (ret); 296 return (ret);
297 } 297 }
298 298
299 for (count = 1; count <= 11; count++) 299 for (count = 1; count <= 11; count++)
300 { 300 {
301 ret = pcm186x_read_reg(addr, count, &read); 301 ret = audk2g_pcm186x_read_reg(addr, count, &read);
302 if(ret) 302 if(ret)
303 { 303 {
304 IFPRINT (audk2g_write("pcm186xRegDump() : Error in Reading Register = 0x%x\n", 304 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : Error in Reading Register = 0x%x\n",
305 count)); 305 count));
306 return (ret); 306 return (ret);
307 } 307 }
308 308
309 DBG_PCM186x (audk2g_write("Page %d : Register 0x%x = 0x%x\n", 309 DBG_PCM186x (audk2g_write("Page %d : Register 0x%x = 0x%x\n",
310 pcm186xPageCheck(addr), count, read)); 310 audk2g_pcm186xPageCheck(addr), count, read));
311 read = 0; 311 read = 0;
312 } 312 }
313 313
314 /* Page 3 Dump */ 314 /* Page 3 Dump */
315 ret = pcm186x_write_reg(addr, 0x0, 0x03); 315 ret = audk2g_pcm186x_write_reg(addr, 0x0, 0x03);
316 if(ret) 316 if(ret)
317 { 317 {
318 IFPRINT (audk2g_write("pcm186xRegDump() : ADC Page Switch Failed\n")); 318 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : ADC Page Switch Failed\n"));
319 return (ret); 319 return (ret);
320 } 320 }
321 321
322 ret = pcm186x_read_reg(addr, 0x12, &read); 322 ret = audk2g_pcm186x_read_reg(addr, 0x12, &read);
323 if(ret) 323 if(ret)
324 { 324 {
325 IFPRINT (audk2g_write("pcm186xRegDump() : Error in Reading Register = 0x%x\n", 325 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : Error in Reading Register = 0x%x\n",
326 0x12)); 326 0x12));
327 return (ret); 327 return (ret);
328 } 328 }
329 329
330 DBG_PCM186x (audk2g_write("Page %d : Register 0x12 = 0x%x\n", 330 DBG_PCM186x (audk2g_write("Page %d : Register 0x12 = 0x%x\n",
331 pcm186xPageCheck(addr), read)); 331 audk2g_pcm186xPageCheck(addr), read));
332 read = 0; 332 read = 0;
333 ret = pcm186x_read_reg(addr, 0x15, &read); 333 ret = audk2g_pcm186x_read_reg(addr, 0x15, &read);
334 if(ret) 334 if(ret)
335 { 335 {
336 IFPRINT (audk2g_write("pcm186xRegDump() : Error in Reading Register = 0x%x\n", 336 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : Error in Reading Register = 0x%x\n",
337 0x15)); 337 0x15));
338 return (ret); 338 return (ret);
339 } 339 }
340 340
341 DBG_PCM186x (audk2g_write("Page %d : Register 0x15 = 0x%x\n", 341 DBG_PCM186x (audk2g_write("Page %d : Register 0x15 = 0x%x\n",
342 pcm186xPageCheck(addr), read)); 342 audk2g_pcm186xPageCheck(addr), read));
343 read = 0; 343 read = 0;
344 344
345 /* Page 253 Dump */ 345 /* Page 253 Dump */
346 ret = pcm186x_write_reg(addr, 0x0, 0xFD); 346 ret = audk2g_pcm186x_write_reg(addr, 0x0, 0xFD);
347 if(ret) 347 if(ret)
348 { 348 {
349 IFPRINT (audk2g_write("pcm186xRegDump() : ADC Page Switch Failed\n")); 349 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : ADC Page Switch Failed\n"));
350 return (ret); 350 return (ret);
351 } 351 }
352 352
353 ret = pcm186x_read_reg(addr, 0x14, &read); 353 ret = audk2g_pcm186x_read_reg(addr, 0x14, &read);
354 if(ret) 354 if(ret)
355 { 355 {
356 IFPRINT (audk2g_write("pcm186xRegDump() : Error in Reading Register = 0x%x\n", 356 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : Error in Reading Register = 0x%x\n",
357 0x14)); 357 0x14));
358 return (ret); 358 return (ret);
359 } 359 }
360 360
361 DBG_PCM186x (audk2g_write("Page %d : Register 0x14 = 0x%x\n", 361 DBG_PCM186x (audk2g_write("Page %d : Register 0x14 = 0x%x\n",
362 pcm186xPageCheck(addr), read)); 362 audk2g_pcm186xPageCheck(addr), read));
363 363
364 /* Change back to Page 0 */ 364 /* Change back to Page 0 */
365 ret = pcm186x_write_reg(addr, 0x0, 0x00); 365 ret = audk2g_pcm186x_write_reg(addr, 0x0, 0x00);
366 366
367 return (ret); 367 return (ret);
368} 368}
@@ -379,49 +379,49 @@ AUDK2G_ADC_RET pcm186xRegDump(Uint8 addr)
379 * \return 0 if success. 379 * \return 0 if success.
380 * 380 *
381 */ 381 */
382AUDK2G_ADC_RET pcm186xMicBiasCtrl(Uint8 addr, Uint8 power) 382AUDK2G_ADC_RET audk2g_pcm186xMicBiasCtrl(Uint8 addr, Uint8 power)
383{ 383{
384 Uint8 read = 0; 384 Uint8 read = 0;
385 AUDK2G_ADC_RET ret; 385 AUDK2G_ADC_RET ret;
386 386
387 /* Changing to Page 3 */ 387 /* Changing to Page 3 */
388 ret = pcm186x_write_reg(addr, 0x0, 0x03); 388 ret = audk2g_pcm186x_write_reg(addr, 0x0, 0x03);
389 if(ret) 389 if(ret)
390 { 390 {
391 IFPRINT (audk2g_write("pcm186xMicBiasCtrl() : ADC Page Switch Failed\n")); 391 IFPRINT (audk2g_write("audk2g_pcm186xMicBiasCtrl() : ADC Page Switch Failed\n"));
392 return (ret); 392 return (ret);
393 } 393 }
394 394
395 DBG_PCM186x (audk2g_write("pcm186xMicBiasCtrl() : addr = 0x%x" 395 DBG_PCM186x (audk2g_write("audk2g_pcm186xMicBiasCtrl() : addr = 0x%x"
396 " power = %d page = %d\n", addr, power, 396 " power = %d page = %d\n", addr, power,
397 pcm186xPageCheck(addr))); 397 audk2g_pcm186xPageCheck(addr)));
398 398
399 ret = pcm186x_read_reg(addr, PCM186x_MIC_BIAS_CTRL, &read); 399 ret = audk2g_pcm186x_read_reg(addr, PCM186x_MIC_BIAS_CTRL, &read);
400 if(ret) 400 if(ret)
401 { 401 {
402 IFPRINT (audk2g_write("pcm186xMicBiasCtrl() : Error in Reading Register = 0x%x\n", 402 IFPRINT (audk2g_write("audk2g_pcm186xMicBiasCtrl() : Error in Reading Register = 0x%x\n",
403 PCM186x_MIC_BIAS_CTRL)); 403 PCM186x_MIC_BIAS_CTRL));
404 return (ret); 404 return (ret);
405 } 405 }
406 406
407 ret = pcm186x_write_reg(addr, PCM186x_MIC_BIAS_CTRL, ((read & 0xFE) | power)); 407 ret = audk2g_pcm186x_write_reg(addr, PCM186x_MIC_BIAS_CTRL, ((read & 0xFE) | power));
408 if(ret) 408 if(ret)
409 { 409 {
410 IFPRINT (audk2g_write("pcm186xMicBiasCtrl() : Error in Writing Register = 0x%x\n", 410 IFPRINT (audk2g_write("audk2g_pcm186xMicBiasCtrl() : Error in Writing Register = 0x%x\n",
411 PCM186x_MIC_BIAS_CTRL)); 411 PCM186x_MIC_BIAS_CTRL));
412 return (ret); 412 return (ret);
413 } 413 }
414 414
415 /* Changing to Page 0 */ 415 /* Changing to Page 0 */
416 ret = pcm186x_write_reg(addr, 0x0, 0x00); 416 ret = audk2g_pcm186x_write_reg(addr, 0x0, 0x00);
417 if(ret) 417 if(ret)
418 { 418 {
419 IFPRINT (audk2g_write("pcm186xMicBiasCtrl() : ADC Page Switch Failed\n")); 419 IFPRINT (audk2g_write("audk2g_pcm186xMicBiasCtrl() : ADC Page Switch Failed\n"));
420 return (ret); 420 return (ret);
421 } 421 }
422 422
423 DBG_PCM186x (audk2g_write("pcm186xMicBiasCtrl() : In page %d.\n", 423 DBG_PCM186x (audk2g_write("audk2g_pcm186xMicBiasCtrl() : In page %d.\n",
424 pcm186xPageCheck(addr))); 424 audk2g_pcm186xPageCheck(addr)));
425 425
426 return (ret); 426 return (ret);
427} 427}
@@ -432,14 +432,14 @@ AUDK2G_ADC_RET pcm186xMicBiasCtrl(Uint8 addr, Uint8 power)
432 * \return 0 if success. 432 * \return 0 if success.
433 * 433 *
434 **/ 434 **/
435AUDK2G_ADC_RET audk2g_pcm186xReset(Uint8 addr) 435AUDK2G_ADC_RET audk2g_audk2g_pcm186xReset(Uint8 addr)
436{ 436{
437 AUDK2G_ADC_RET ret; 437 AUDK2G_ADC_RET ret;
438 438
439 DBG_PCM186x (audk2g_write("audk2g_pcm186xReset() : addr = 0x%x page = %d\n", 439 DBG_PCM186x (audk2g_write("audk2g_audk2g_pcm186xReset() : addr = 0x%x page = %d\n",
440 addr, pcm186xPageCheck(addr))); 440 addr, audk2g_pcm186xPageCheck(addr)));
441 441
442 ret = pcm186x_write_reg(addr, AUDK2G_PCM186x_ADC_RESET, 0xFF); 442 ret = audk2g_pcm186x_write_reg(addr, AUDK2G_PCM186x_ADC_RESET, 0xFF);
443 443
444 return (ret); 444 return (ret);
445} 445}
@@ -463,27 +463,27 @@ AUDK2G_ADC_RET audk2g_pcm186xReset(Uint8 addr)
463 * \return 0 if success. 463 * \return 0 if success.
464 * 464 *
465 **/ 465 **/
466AUDK2G_ADC_RET pcm186xDataConfig(Uint8 addr, Uint8 dataType, Uint8 slotWidth) 466AUDK2G_ADC_RET audk2g_pcm186xDataConfig(Uint8 addr, Uint8 dataType, Uint8 slotWidth)
467{ 467{
468 Uint8 read = 0; 468 Uint8 read = 0;
469 Uint8 val; 469 Uint8 val;
470 AUDK2G_ADC_RET ret; 470 AUDK2G_ADC_RET ret;
471 471
472 DBG_PCM186x (audk2g_write("pcm186xDataConfig() : addr = 0x%x dataType = %d " 472 DBG_PCM186x (audk2g_write("audk2g_pcm186xDataConfig() : addr = 0x%x dataType = %d "
473 "slotWidth = %d page = %d\n", addr, dataType, 473 "slotWidth = %d page = %d\n", addr, dataType,
474 slotWidth, pcm186xPageCheck(addr))); 474 slotWidth, audk2g_pcm186xPageCheck(addr)));
475 475
476 ret = pcm186x_read_reg(addr, PCM186x_AUDIO_FMT, &read); 476 ret = audk2g_pcm186x_read_reg(addr, PCM186x_AUDIO_FMT, &read);
477 if(ret) 477 if(ret)
478 { 478 {
479 IFPRINT (audk2g_write("pcm186xDataConfig() : Error in Reading Register = 0x%x\n", 479 IFPRINT (audk2g_write("audk2g_pcm186xDataConfig() : Error in Reading Register = 0x%x\n",
480 PCM186x_AUDIO_FMT)); 480 PCM186x_AUDIO_FMT));
481 return (ret); 481 return (ret);
482 } 482 }
483 483
484 val = (dataType | (slotWidth << 6)); 484 val = (dataType | (slotWidth << 6));
485 485
486 ret = pcm186x_write_reg(addr, PCM186x_AUDIO_FMT, ((read & 0x3C) | val)); 486 ret = audk2g_pcm186x_write_reg(addr, PCM186x_AUDIO_FMT, ((read & 0x3C) | val));
487 487
488 return (ret); 488 return (ret);
489} 489}
@@ -523,25 +523,25 @@ AUDK2G_ADC_RET pcm186xDataConfig(Uint8 addr, Uint8 dataType, Uint8 slotWidth)
523 * \return 0 for success. 523 * \return 0 for success.
524 * 524 *
525 **/ 525 **/
526AUDK2G_ADC_RET pcm186xInputSel(Uint8 addr, Uint8 channel, Uint8 input) 526AUDK2G_ADC_RET audk2g_audk2g_pcm186xInputSel(Uint8 addr, Uint8 channel, Uint8 input)
527{ 527{
528 AUDK2G_ADC_RET ret; 528 AUDK2G_ADC_RET ret;
529 Uint8 read = 0; 529 Uint8 read = 0;
530 530
531 DBG_PCM186x (audk2g_write("pcm186xInputSel() : addr = 0x%x " 531 DBG_PCM186x (audk2g_write("audk2g_audk2g_pcm186xInputSel() : addr = 0x%x "
532 "channel = %d input = 0x%x page = %d\n", 532 "channel = %d input = 0x%x page = %d\n",
533 addr, channel, input, pcm186xPageCheck(addr))); 533 addr, channel, input, audk2g_pcm186xPageCheck(addr)));
534 534
535 ret = pcm186x_read_reg(addr, PCM186x_INPUT_SELECT(channel), &read); 535 ret = audk2g_pcm186x_read_reg(addr, PCM186x_INPUT_SELECT(channel), &read);
536 if(ret) 536 if(ret)
537 { 537 {
538 IFPRINT (audk2g_write("pcm186xInputSel() : Error in Reading Register = 0x%x\n", 538 IFPRINT (audk2g_write("audk2g_audk2g_pcm186xInputSel() : Error in Reading Register = 0x%x\n",
539 PCM186x_INPUT_SELECT(channel))); 539 PCM186x_INPUT_SELECT(channel)));
540 return (ret); 540 return (ret);
541 } 541 }
542 542
543 read = ((read & 0xC0) | input); 543 read = ((read & 0xC0) | input);
544 ret = pcm186x_write_reg(addr, PCM186x_INPUT_SELECT(channel), read); 544 ret = audk2g_pcm186x_write_reg(addr, PCM186x_INPUT_SELECT(channel), read);
545 545
546 return (ret); 546 return (ret);
547} 547}
@@ -563,15 +563,15 @@ AUDK2G_ADC_RET pcm186xInputSel(Uint8 addr, Uint8 channel, Uint8 input)
563 * \return 0 for success. 563 * \return 0 for success.
564 * 564 *
565 **/ 565 **/
566AUDK2G_ADC_RET audk2g_pcm186xSetVolume(Uint8 addr, Uint8 vol, Uint8 channel) 566AUDK2G_ADC_RET audk2g_audk2g_pcm186xSetVolume(Uint8 addr, Uint8 vol, Uint8 channel)
567{ 567{
568 Uint8 value; 568 Uint8 value;
569 Uint8 count; 569 Uint8 count;
570 AUDK2G_ADC_RET ret; 570 AUDK2G_ADC_RET ret;
571 571
572 DBG_PCM186x (audk2g_write("audk2g_pcm186xSetVolume() : addr = 0x%x vol = %d " 572 DBG_PCM186x (audk2g_write("audk2g_audk2g_pcm186xSetVolume() : addr = 0x%x vol = %d "
573 "channel = %d page = %d\n", addr, 573 "channel = %d page = %d\n", addr,
574 vol, channel, pcm186xPageCheck(addr))); 574 vol, channel, audk2g_pcm186xPageCheck(addr)));
575 575
576 /* Gains -12dB to 38dB are supported with step value of 0.5. 576 /* Gains -12dB to 38dB are supported with step value of 0.5.
577 Values from 38.5dB to 40dB are ignored to simplify the computation. 577 Values from 38.5dB to 40dB are ignored to simplify the computation.
@@ -610,10 +610,10 @@ AUDK2G_ADC_RET audk2g_pcm186xSetVolume(Uint8 addr, Uint8 vol, Uint8 channel)
610 { 610 {
611 for (count = AUDK2G_ADC_CH1_LEFT; count <= AUDK2G_ADC_CH2_RIGHT; count++) 611 for (count = AUDK2G_ADC_CH1_LEFT; count <= AUDK2G_ADC_CH2_RIGHT; count++)
612 { 612 {
613 ret = pcm186x_write_reg(addr, PCM186x_VOL_CTRL(count), value); 613 ret = audk2g_pcm186x_write_reg(addr, PCM186x_VOL_CTRL(count), value);
614 if(ret) 614 if(ret)
615 { 615 {
616 IFPRINT (audk2g_write("audk2g_pcm186xSetVolume() : Error in Writing Register = 0x%x\n", 616 IFPRINT (audk2g_write("audk2g_audk2g_pcm186xSetVolume() : Error in Writing Register = 0x%x\n",
617 PCM186x_VOL_CTRL(count))); 617 PCM186x_VOL_CTRL(count)));
618 return (ret); 618 return (ret);
619 } 619 }
@@ -621,7 +621,7 @@ AUDK2G_ADC_RET audk2g_pcm186xSetVolume(Uint8 addr, Uint8 vol, Uint8 channel)
621 } 621 }
622 else 622 else
623 { 623 {
624 ret = pcm186x_write_reg(addr, PCM186x_VOL_CTRL(channel), value); 624 ret = audk2g_pcm186x_write_reg(addr, PCM186x_VOL_CTRL(channel), value);
625 } 625 }
626 626
627 return (ret); 627 return (ret);
@@ -646,19 +646,19 @@ AUDK2G_ADC_RET audk2g_pcm186xSetVolume(Uint8 addr, Uint8 vol, Uint8 channel)
646 * \return 0 for success. 646 * \return 0 for success.
647 * 647 *
648 **/ 648 **/
649AUDK2G_ADC_RET pcm186xMuteChannel(Uint8 addr, Uint8 channel, Uint8 mute) 649AUDK2G_ADC_RET audk2g_pcm186xMuteChannel(Uint8 addr, Uint8 channel, Uint8 mute)
650{ 650{
651 AUDK2G_ADC_RET ret; 651 AUDK2G_ADC_RET ret;
652 Uint8 read = 0; 652 Uint8 read = 0;
653 653
654 DBG_PCM186x (audk2g_write("pcm186xMuteChannel() : addr = 0x%x mute = %d" 654 DBG_PCM186x (audk2g_write("audk2g_pcm186xMuteChannel() : addr = 0x%x mute = %d"
655 " channel = %d page = %d\n", addr, mute, 655 " channel = %d page = %d\n", addr, mute,
656 channel, pcm186xPageCheck(addr))); 656 channel, audk2g_pcm186xPageCheck(addr)));
657 657
658 ret = pcm186x_read_reg(addr, PCM186x_MUTE_CTRL, &read); 658 ret = audk2g_pcm186x_read_reg(addr, PCM186x_MUTE_CTRL, &read);
659 if(ret) 659 if(ret)
660 { 660 {
661 IFPRINT (audk2g_write("pcm186xMuteChannel() : Error in Reading Register = 0x%x\n", 661 IFPRINT (audk2g_write("audk2g_pcm186xMuteChannel() : Error in Reading Register = 0x%x\n",
662 PCM186x_MUTE_CTRL)); 662 PCM186x_MUTE_CTRL));
663 return (ret); 663 return (ret);
664 } 664 }
@@ -672,7 +672,7 @@ AUDK2G_ADC_RET pcm186xMuteChannel(Uint8 addr, Uint8 channel, Uint8 mute)
672 read = (read | channel); 672 read = (read | channel);
673 } 673 }
674 674
675 ret = pcm186x_write_reg(addr, PCM186x_MUTE_CTRL, read); 675 ret = audk2g_pcm186x_write_reg(addr, PCM186x_MUTE_CTRL, read);
676 676
677 return (ret); 677 return (ret);
678} 678}
@@ -694,27 +694,27 @@ AUDK2G_ADC_RET pcm186xMuteChannel(Uint8 addr, Uint8 channel, Uint8 mute)
694 * \return 0 for success. 694 * \return 0 for success.
695 * 695 *
696 **/ 696 **/
697AUDK2G_ADC_RET pcm186xConfigPowState(Uint8 addr, Uint8 powState, Uint8 enable) 697AUDK2G_ADC_RET audk2g_pcm186xConfigPowState(Uint8 addr, Uint8 powState, Uint8 enable)
698{ 698{
699 AUDK2G_ADC_RET ret; 699 AUDK2G_ADC_RET ret;
700 Uint8 read = 0; 700 Uint8 read = 0;
701 701
702 DBG_PCM186x (audk2g_write("pcm186xConfigPowState() : addr = 0x%x" 702 DBG_PCM186x (audk2g_write("audk2g_pcm186xConfigPowState() : addr = 0x%x"
703 " powState = %d enable = %d page = %d\n", 703 " powState = %d enable = %d page = %d\n",
704 addr, powState, enable, 704 addr, powState, enable,
705 pcm186xPageCheck(addr))); 705 audk2g_pcm186xPageCheck(addr)));
706 706
707 ret = pcm186x_read_reg(addr, PCM186x_POWER_STATE_SEL, &read); 707 ret = audk2g_pcm186x_read_reg(addr, PCM186x_POWER_STATE_SEL, &read);
708 if(ret) 708 if(ret)
709 { 709 {
710 IFPRINT (audk2g_write("pcm186xConfigPowState() : Error in Reading Register = 0x%x\n", 710 IFPRINT (audk2g_write("audk2g_pcm186xConfigPowState() : Error in Reading Register = 0x%x\n",
711 PCM186x_POWER_STATE_SEL)); 711 PCM186x_POWER_STATE_SEL));
712 return (ret); 712 return (ret);
713 } 713 }
714 714
715 read = (read & ~(1 << powState)) | (enable << powState); 715 read = (read & ~(1 << powState)) | (enable << powState);
716 716
717 ret = pcm186x_write_reg(addr, PCM186x_POWER_STATE_SEL, read); 717 ret = audk2g_pcm186x_write_reg(addr, PCM186x_POWER_STATE_SEL, read);
718 718
719 return (ret); 719 return (ret);
720} 720}
@@ -739,21 +739,21 @@ AUDK2G_ADC_RET pcm186xConfigPowState(Uint8 addr, Uint8 powState, Uint8 enable)
739 * \return 0 for success. 739 * \return 0 for success.
740 * 740 *
741 **/ 741 **/
742AUDK2G_ADC_RET pcm186xSetIntr(Uint8 addr, Uint8 intrNum, Uint8 enable) 742AUDK2G_ADC_RET audk2g_pcm186xSetIntr(Uint8 addr, Uint8 intrNum, Uint8 enable)
743{ 743{
744 AUDK2G_ADC_RET ret; 744 AUDK2G_ADC_RET ret;
745 Uint8 value; 745 Uint8 value;
746 Uint8 read = 0; 746 Uint8 read = 0;
747 747
748 DBG_PCM186x (audk2g_write("pcm186xSetIntr() : addr = 0x%x" 748 DBG_PCM186x (audk2g_write("audk2g_pcm186xSetIntr() : addr = 0x%x"
749 " intrNum = %d enable = %d page = %d read =" 749 " intrNum = %d enable = %d page = %d read ="
750 " 0x%x", addr, intrNum, enable, 750 " 0x%x", addr, intrNum, enable,
751 pcm186xPageCheck(addr), read)); 751 audk2g_pcm186xPageCheck(addr), read));
752 752
753 ret = pcm186x_read_reg(addr, PCM186x_INTR_SEL, &read); 753 ret = audk2g_pcm186x_read_reg(addr, PCM186x_INTR_SEL, &read);
754 if(ret) 754 if(ret)
755 { 755 {
756 IFPRINT (audk2g_write("pcm186xSetIntr() : Error in Reading Register = 0x%x\n", 756 IFPRINT (audk2g_write("audk2g_pcm186xSetIntr() : Error in Reading Register = 0x%x\n",
757 PCM186x_INTR_SEL)); 757 PCM186x_INTR_SEL));
758 return (ret); 758 return (ret);
759 } 759 }
@@ -776,7 +776,7 @@ AUDK2G_ADC_RET pcm186xSetIntr(Uint8 addr, Uint8 intrNum, Uint8 enable)
776 read = ((read & (~(1 << intrNum))) | (enable << intrNum)); 776 read = ((read & (~(1 << intrNum))) | (enable << intrNum));
777 } 777 }
778 778
779 ret = pcm186x_write_reg(addr, PCM186x_INTR_SEL, read); 779 ret = audk2g_pcm186x_write_reg(addr, PCM186x_INTR_SEL, read);
780 780
781 return (ret); 781 return (ret);
782} 782}
@@ -790,24 +790,24 @@ AUDK2G_ADC_RET pcm186xSetIntr(Uint8 addr, Uint8 intrNum, Uint8 enable)
790 * 0xFF in case of failure 790 * 0xFF in case of failure
791 * 791 *
792 **/ 792 **/
793Uint8 pcm186xGetIntrStatus(Uint8 addr) 793Uint8 audk2g_pcm186xGetIntrStatus(Uint8 addr)
794{ 794{
795 AUDK2G_ADC_RET ret; 795 AUDK2G_ADC_RET ret;
796 Uint8 read = 0; 796 Uint8 read = 0;
797 797
798 DBG_PCM186x (audk2g_write("pcm186xGetIntrStatus() : addr = 0x%x page" 798 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetIntrStatus() : addr = 0x%x page"
799 " = %d\n", addr, pcm186xPageCheck(addr))); 799 " = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
800 800
801 ret = pcm186x_read_reg(addr, PCM186x_INTR_STAT, &read); 801 ret = audk2g_pcm186x_read_reg(addr, PCM186x_INTR_STAT, &read);
802 if(ret) 802 if(ret)
803 { 803 {
804 IFPRINT (audk2g_write("pcm186xGetIntrStatus() : Error in Reading Register = 0x%x\n", 804 IFPRINT (audk2g_write("audk2g_pcm186xGetIntrStatus() : Error in Reading Register = 0x%x\n",
805 PCM186x_INTR_STAT)); 805 PCM186x_INTR_STAT));
806 return (0xFF); 806 return (0xFF);
807 } 807 }
808 else 808 else
809 { 809 {
810 DBG_PCM186x (audk2g_write("pcm186xGetIntrStatus() : Intr Status = 0x%x\n", read)); 810 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetIntrStatus() : Intr Status = 0x%x\n", read));
811 return (read); 811 return (read);
812 } 812 }
813} 813}
@@ -824,26 +824,26 @@ Uint8 pcm186xGetIntrStatus(Uint8 addr)
824 * \return 0 for success. 824 * \return 0 for success.
825 * 825 *
826 **/ 826 **/
827AUDK2G_ADC_RET pcm186xDspCtrl(Uint8 addr, Uint8 channel) 827AUDK2G_ADC_RET audk2g_pcm186xDspCtrl(Uint8 addr, Uint8 channel)
828{ 828{
829 AUDK2G_ADC_RET ret; 829 AUDK2G_ADC_RET ret;
830 Uint8 read; 830 Uint8 read;
831 831
832 DBG_PCM186x (audk2g_write("pcm186xDspCtrl() : addr = 0x%x channel = %d" 832 DBG_PCM186x (audk2g_write("audk2g_pcm186xDspCtrl() : addr = 0x%x channel = %d"
833 " page = %d\n", addr, channel, 833 " page = %d\n", addr, channel,
834 pcm186xPageCheck(addr))); 834 audk2g_pcm186xPageCheck(addr)));
835 835
836 ret = pcm186x_read_reg(addr, PCM186x_MUTE_CTRL, &read); 836 ret = audk2g_pcm186x_read_reg(addr, PCM186x_MUTE_CTRL, &read);
837 if(ret) 837 if(ret)
838 { 838 {
839 IFPRINT (audk2g_write("pcm186xDspCtrl() : Error in Reading Register = 0x%x\n", 839 IFPRINT (audk2g_write("audk2g_pcm186xDspCtrl() : Error in Reading Register = 0x%x\n",
840 PCM186x_MUTE_CTRL)); 840 PCM186x_MUTE_CTRL));
841 return (ret); 841 return (ret);
842 } 842 }
843 843
844 read = ((read & 0x7F) | (channel << 7)); 844 read = ((read & 0x7F) | (channel << 7));
845 845
846 ret = pcm186x_write_reg(addr, PCM186x_MUTE_CTRL, read); 846 ret = audk2g_pcm186x_write_reg(addr, PCM186x_MUTE_CTRL, read);
847 847
848 return (ret); 848 return (ret);
849} 849}
@@ -860,30 +860,30 @@ AUDK2G_ADC_RET pcm186xDspCtrl(Uint8 addr, Uint8 channel)
860 * \return 0 for success. 860 * \return 0 for success.
861 * 861 *
862 **/ 862 **/
863AUDK2G_ADC_RET pcm186xProgDspCoeff(Uint8 addr, Uint8 regAddr, Uint32 coeff) 863AUDK2G_ADC_RET audk2g_pcm186xProgDspCoeff(Uint8 addr, Uint8 regAddr, Uint32 coeff)
864{ 864{
865 AUDK2G_ADC_RET ret; 865 AUDK2G_ADC_RET ret;
866 Uint8 value; 866 Uint8 value;
867 Uint8 count; 867 Uint8 count;
868 Uint8 coeffBuf[3]; 868 Uint8 coeffBuf[3];
869 869
870 DBG_PCM186x (audk2g_write("pcm186xProgDspCoeff() : addr = 0x%x " 870 DBG_PCM186x (audk2g_write("audk2g_pcm186xProgDspCoeff() : addr = 0x%x "
871 "Coeff Reg = 0x%x Coeff = 0x%x page = %d\n", 871 "Coeff Reg = 0x%x Coeff = 0x%x page = %d\n",
872 addr, regAddr, coeff, pcm186xPageCheck(addr))); 872 addr, regAddr, coeff, audk2g_pcm186xPageCheck(addr)));
873 873
874 /* Switch to page 1 */ 874 /* Switch to page 1 */
875 ret = pcm186x_write_reg(addr, 0x0, 0x1); 875 ret = audk2g_pcm186x_write_reg(addr, 0x0, 0x1);
876 if(ret) 876 if(ret)
877 { 877 {
878 IFPRINT (audk2g_write("pcm186xProgDspCoeff() : ADC Page Switch Failed\n")); 878 IFPRINT (audk2g_write("audk2g_pcm186xProgDspCoeff() : ADC Page Switch Failed\n"));
879 return (ret); 879 return (ret);
880 } 880 }
881 881
882 /* Write the memory address of coefficient register */ 882 /* Write the memory address of coefficient register */
883 ret = pcm186x_write_reg(addr, PCM186x_DSP_MEM_ADDR, regAddr); 883 ret = audk2g_pcm186x_write_reg(addr, PCM186x_DSP_MEM_ADDR, regAddr);
884 if(ret) 884 if(ret)
885 { 885 {
886 IFPRINT (audk2g_write("pcm186xProgDspCoeff() : Error in Writing Register = 0x%x\n", 886 IFPRINT (audk2g_write("audk2g_pcm186xProgDspCoeff() : Error in Writing Register = 0x%x\n",
887 PCM186x_DSP_MEM_ADDR)); 887 PCM186x_DSP_MEM_ADDR));
888 return (ret); 888 return (ret);
889 } 889 }
@@ -895,21 +895,21 @@ AUDK2G_ADC_RET pcm186xProgDspCoeff(Uint8 addr, Uint8 regAddr, Uint32 coeff)
895 /* Write the coefficient data */ 895 /* Write the coefficient data */
896 for (count = 0; count < 3; count ++) 896 for (count = 0; count < 3; count ++)
897 { 897 {
898 ret = pcm186x_write_reg(addr, PCM186x_DSP_MEM_WDATA(count), 898 ret = audk2g_pcm186x_write_reg(addr, PCM186x_DSP_MEM_WDATA(count),
899 coeffBuf[count]); 899 coeffBuf[count]);
900 if(ret) 900 if(ret)
901 { 901 {
902 IFPRINT (audk2g_write("pcm186xProgDspCoeff() : Error in Writing Register = 0x%x\n", 902 IFPRINT (audk2g_write("audk2g_pcm186xProgDspCoeff() : Error in Writing Register = 0x%x\n",
903 PCM186x_DSP_MEM_WDATA(count))); 903 PCM186x_DSP_MEM_WDATA(count)));
904 return (ret); 904 return (ret);
905 } 905 }
906 } 906 }
907 907
908 /* Execute write operation */ 908 /* Execute write operation */
909 ret = pcm186x_write_reg(addr, PCM186x_DSP_PROG, 0x1); 909 ret = audk2g_pcm186x_write_reg(addr, PCM186x_DSP_PROG, 0x1);
910 if(ret) 910 if(ret)
911 { 911 {
912 IFPRINT (audk2g_write("pcm186xProgDspCoeff() : Error in Writing Register = 0x%x\n", 912 IFPRINT (audk2g_write("audk2g_pcm186xProgDspCoeff() : Error in Writing Register = 0x%x\n",
913 PCM186x_DSP_PROG)); 913 PCM186x_DSP_PROG));
914 return (ret); 914 return (ret);
915 } 915 }
@@ -917,20 +917,20 @@ AUDK2G_ADC_RET pcm186xProgDspCoeff(Uint8 addr, Uint8 regAddr, Uint32 coeff)
917 /* Wait for DSP coefficient write to complete */ 917 /* Wait for DSP coefficient write to complete */
918 do 918 do
919 { 919 {
920 ret = pcm186x_read_reg(addr, PCM186x_DSP_PROG, &value); 920 ret = audk2g_pcm186x_read_reg(addr, PCM186x_DSP_PROG, &value);
921 if(ret) 921 if(ret)
922 { 922 {
923 IFPRINT (audk2g_write("pcm186xProgDspCoeff() : Error in Reading Register = 0x%x\n", 923 IFPRINT (audk2g_write("audk2g_pcm186xProgDspCoeff() : Error in Reading Register = 0x%x\n",
924 PCM186x_DSP_PROG)); 924 PCM186x_DSP_PROG));
925 return (ret); 925 return (ret);
926 } 926 }
927 } while (!(value & 0x10)); //TODO: Need to confirm the status check bit 927 } while (!(value & 0x10)); //TODO: Need to confirm the status check bit
928 928
929 /* Switch to page 0 */ 929 /* Switch to page 0 */
930 ret = pcm186x_write_reg(addr, 0, 0x0); 930 ret = audk2g_pcm186x_write_reg(addr, 0, 0x0);
931 if(ret) 931 if(ret)
932 { 932 {
933 IFPRINT (audk2g_write("pcm186xProgDspCoeff() : ADC Page Switch Failed\n")); 933 IFPRINT (audk2g_write("audk2g_pcm186xProgDspCoeff() : ADC Page Switch Failed\n"));
934 return (ret); 934 return (ret);
935 } 935 }
936 936
@@ -953,24 +953,24 @@ AUDK2G_ADC_RET pcm186xProgDspCoeff(Uint8 addr, Uint8 regAddr, Uint32 coeff)
953 * 0xF - Run 953 * 0xF - Run
954 * 954 *
955 **/ 955 **/
956Uint8 pcm186xGetPowerStateStatus(Uint8 addr) 956Uint8 audk2g_pcm186xGetPowerStateStatus(Uint8 addr)
957{ 957{
958 AUDK2G_ADC_RET ret; 958 AUDK2G_ADC_RET ret;
959 Uint8 read = 0; 959 Uint8 read = 0;
960 960
961 DBG_PCM186x (audk2g_write("pcm186xGetPowerStateStatus() : addr = 0x%x" 961 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetPowerStateStatus() : addr = 0x%x"
962 " page = %d\n", addr, pcm186xPageCheck(addr))); 962 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
963 963
964 ret = pcm186x_read_reg(addr, PCM186x_POWER_STAT, &read); 964 ret = audk2g_pcm186x_read_reg(addr, PCM186x_POWER_STAT, &read);
965 if(ret) 965 if(ret)
966 { 966 {
967 IFPRINT (audk2g_write("pcm186xGetPowerStateStatus() : Error in Reading Register = 0x%x\n", 967 IFPRINT (audk2g_write("audk2g_pcm186xGetPowerStateStatus() : Error in Reading Register = 0x%x\n",
968 PCM186x_POWER_STAT)); 968 PCM186x_POWER_STAT));
969 return (0xFF); 969 return (0xFF);
970 } 970 }
971 else 971 else
972 { 972 {
973 DBG_PCM186x (audk2g_write("pcm186xGetPowerStateStatus() : read = 0x%x\n", read)); 973 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetPowerStateStatus() : read = 0x%x\n", read));
974 return (read & 0x0F); 974 return (read & 0x0F);
975 } 975 }
976} 976}
@@ -991,24 +991,24 @@ Uint8 pcm186xGetPowerStateStatus(Uint8 addr)
991 * 0x7 - Invalid Fs 991 * 0x7 - Invalid Fs
992 * 992 *
993 **/ 993 **/
994Uint8 pcm186xGetSampleFreqStatus(Uint8 addr) 994Uint8 audk2g_pcm186xGetSampleFreqStatus(Uint8 addr)
995{ 995{
996 AUDK2G_ADC_RET ret; 996 AUDK2G_ADC_RET ret;
997 Uint8 read = 0; 997 Uint8 read = 0;
998 998
999 DBG_PCM186x (audk2g_write("pcm186xGetSampleFreqStatus() : addr = 0x%x" 999 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetSampleFreqStatus() : addr = 0x%x"
1000 " page = %d\n", addr, pcm186xPageCheck(addr))); 1000 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1001 1001
1002 ret = pcm186x_read_reg(addr, PCM16x_SAMPLE_FREQ_STAT, &read); 1002 ret = audk2g_pcm186x_read_reg(addr, PCM16x_SAMPLE_FREQ_STAT, &read);
1003 if(ret) 1003 if(ret)
1004 { 1004 {
1005 IFPRINT (audk2g_write("pcm186xGetSampleFreqStatus() : Error in Reading Register = 0x%x\n", 1005 IFPRINT (audk2g_write("audk2g_pcm186xGetSampleFreqStatus() : Error in Reading Register = 0x%x\n",
1006 PCM16x_SAMPLE_FREQ_STAT)); 1006 PCM16x_SAMPLE_FREQ_STAT));
1007 return (0xFF); 1007 return (0xFF);
1008 } 1008 }
1009 else 1009 else
1010 { 1010 {
1011 DBG_PCM186x (audk2g_write("pcm186xGetSampleFreqStatus() : read = 0x%x\n", read)); 1011 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetSampleFreqStatus() : read = 0x%x\n", read));
1012 return (read & 0x07); 1012 return (read & 0x07);
1013 } 1013 }
1014} 1014}
@@ -1028,24 +1028,24 @@ Uint8 pcm186xGetSampleFreqStatus(Uint8 addr)
1028 * 0x7 - Invalid BCK ratio or LRCK Halt 1028 * 0x7 - Invalid BCK ratio or LRCK Halt
1029 * 1029 *
1030 **/ 1030 **/
1031Uint8 pcm186xGetBckRatioStatus(Uint8 addr) 1031Uint8 audk2g_pcm186xGetBckRatioStatus(Uint8 addr)
1032{ 1032{
1033 AUDK2G_ADC_RET ret; 1033 AUDK2G_ADC_RET ret;
1034 Uint8 read = 0; 1034 Uint8 read = 0;
1035 1035
1036 DBG_PCM186x (audk2g_write("pcm186xGetBckRatioStatus() : addr = 0x%x" 1036 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetBckRatioStatus() : addr = 0x%x"
1037 " page = %d\n", addr, pcm186xPageCheck(addr))); 1037 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1038 1038
1039 ret = pcm186x_read_reg(addr, PCM186x_BCK_SCK_STAT, &read); 1039 ret = audk2g_pcm186x_read_reg(addr, PCM186x_BCK_SCK_STAT, &read);
1040 if(ret) 1040 if(ret)
1041 { 1041 {
1042 IFPRINT (audk2g_write("pcm186xGetBckRatioStatus() : Error in Reading Register = 0x%x\n", 1042 IFPRINT (audk2g_write("audk2g_pcm186xGetBckRatioStatus() : Error in Reading Register = 0x%x\n",
1043 PCM186x_BCK_SCK_STAT)); 1043 PCM186x_BCK_SCK_STAT));
1044 return (0xFF); 1044 return (0xFF);
1045 } 1045 }
1046 else 1046 else
1047 { 1047 {
1048 DBG_PCM186x (audk2g_write("pcm186xGetBckRatioStatus() : read = 0x%x\n", read)); 1048 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetBckRatioStatus() : read = 0x%x\n", read));
1049 return ((read & 0x70) >> 4); 1049 return ((read & 0x70) >> 4);
1050 } 1050 }
1051} 1051}
@@ -1066,18 +1066,18 @@ Uint8 pcm186xGetBckRatioStatus(Uint8 addr)
1066 * 0x7 - Invalid SCK ratio or LRCK Halt 1066 * 0x7 - Invalid SCK ratio or LRCK Halt
1067 * 1067 *
1068 **/ 1068 **/
1069Uint8 pcm186xGetSckRatioStatus(Uint8 addr) 1069Uint8 audk2g_pcm186xGetSckRatioStatus(Uint8 addr)
1070{ 1070{
1071 AUDK2G_ADC_RET ret; 1071 AUDK2G_ADC_RET ret;
1072 Uint8 read = 0; 1072 Uint8 read = 0;
1073 1073
1074 DBG_PCM186x (audk2g_write("pcm186xGetSckRatioStatus() : addr = 0x%x" 1074 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetSckRatioStatus() : addr = 0x%x"
1075 " page = %d\n", addr, pcm186xPageCheck(addr))); 1075 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1076 1076
1077 ret = pcm186x_read_reg(addr, PCM186x_BCK_SCK_STAT, &read); 1077 ret = audk2g_pcm186x_read_reg(addr, PCM186x_BCK_SCK_STAT, &read);
1078 if(ret) 1078 if(ret)
1079 { 1079 {
1080 IFPRINT (audk2g_write("pcm186xGetSckRatioStatus() : Error in Reading Register = 0x%x\n", 1080 IFPRINT (audk2g_write("audk2g_pcm186xGetSckRatioStatus() : Error in Reading Register = 0x%x\n",
1081 PCM186x_BCK_SCK_STAT)); 1081 PCM186x_BCK_SCK_STAT));
1082 return (0xFF); 1082 return (0xFF);
1083 } 1083 }
@@ -1098,24 +1098,24 @@ Uint8 pcm186xGetSckRatioStatus(Uint8 addr)
1098 * 1 - Halt 1098 * 1 - Halt
1099 * 1099 *
1100 **/ 1100 **/
1101Uint8 pcm186xGetLrckHltStatus(Uint8 addr) 1101Uint8 audk2g_pcm186xGetLrckHltStatus(Uint8 addr)
1102{ 1102{
1103 AUDK2G_ADC_RET ret; 1103 AUDK2G_ADC_RET ret;
1104 Uint8 read = 0; 1104 Uint8 read = 0;
1105 1105
1106 DBG_PCM186x (audk2g_write("pcm186xGetLrckHltStatus() : addr = 0x%x" 1106 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetLrckHltStatus() : addr = 0x%x"
1107 " page = %d\n", addr, pcm186xPageCheck(addr))); 1107 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1108 1108
1109 ret = pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read); 1109 ret = audk2g_pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read);
1110 if(ret) 1110 if(ret)
1111 { 1111 {
1112 IFPRINT (audk2g_write("pcm186xGetLrckHltStatus() : Error in Reading Register = 0x%x\n", 1112 IFPRINT (audk2g_write("audk2g_pcm186xGetLrckHltStatus() : Error in Reading Register = 0x%x\n",
1113 PCM186x_CLK_STAT)); 1113 PCM186x_CLK_STAT));
1114 return (0xFF); 1114 return (0xFF);
1115 } 1115 }
1116 else 1116 else
1117 { 1117 {
1118 DBG_PCM186x (audk2g_write("pcm186xGetLrckHltStatus() : read = 0x%x\n", read)); 1118 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetLrckHltStatus() : read = 0x%x\n", read));
1119 return (EXTRACT_STATUS(read, LRCKHLT)); 1119 return (EXTRACT_STATUS(read, LRCKHLT));
1120 } 1120 }
1121} 1121}
@@ -1130,24 +1130,24 @@ Uint8 pcm186xGetLrckHltStatus(Uint8 addr)
1130 * 1 - Halt 1130 * 1 - Halt
1131 * 1131 *
1132 **/ 1132 **/
1133Uint8 pcm186xGetBckHltStatus(Uint8 addr) 1133Uint8 audk2g_pcm186xGetBckHltStatus(Uint8 addr)
1134{ 1134{
1135 AUDK2G_ADC_RET ret; 1135 AUDK2G_ADC_RET ret;
1136 Uint8 read = 0; 1136 Uint8 read = 0;
1137 1137
1138 DBG_PCM186x (audk2g_write("pcm186xGetBckHltStatus() : addr = 0x%x" 1138 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetBckHltStatus() : addr = 0x%x"
1139 " page = %d\n", addr, pcm186xPageCheck(addr))); 1139 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1140 1140
1141 ret = pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read); 1141 ret = audk2g_pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read);
1142 if(ret) 1142 if(ret)
1143 { 1143 {
1144 IFPRINT (audk2g_write("pcm186xGetBckHltStatus() : Error in Reading Register = 0x%x\n", 1144 IFPRINT (audk2g_write("audk2g_pcm186xGetBckHltStatus() : Error in Reading Register = 0x%x\n",
1145 PCM186x_CLK_STAT)); 1145 PCM186x_CLK_STAT));
1146 return (0xFF); 1146 return (0xFF);
1147 } 1147 }
1148 else 1148 else
1149 { 1149 {
1150 DBG_PCM186x (audk2g_write("pcm186xGetBckHltStatus() : read = 0x%x\n", read)); 1150 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetBckHltStatus() : read = 0x%x\n", read));
1151 return (EXTRACT_STATUS(read, BCKHLT)); 1151 return (EXTRACT_STATUS(read, BCKHLT));
1152 } 1152 }
1153} 1153}
@@ -1162,24 +1162,24 @@ Uint8 pcm186xGetBckHltStatus(Uint8 addr)
1162 * 1 - Halt 1162 * 1 - Halt
1163 * 1163 *
1164 **/ 1164 **/
1165Uint8 pcm186xGetSckHltStatus(Uint8 addr) 1165Uint8 audk2g_pcm186xGetSckHltStatus(Uint8 addr)
1166{ 1166{
1167 AUDK2G_ADC_RET ret; 1167 AUDK2G_ADC_RET ret;
1168 Uint8 read = 0; 1168 Uint8 read = 0;
1169 1169
1170 DBG_PCM186x (audk2g_write("pcm186xGetSckHltStatus() : addr = 0x%x" 1170 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetSckHltStatus() : addr = 0x%x"
1171 " page = %d\n", addr, pcm186xPageCheck(addr))); 1171 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1172 1172
1173 ret = pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read); 1173 ret = audk2g_pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read);
1174 if(ret) 1174 if(ret)
1175 { 1175 {
1176 IFPRINT (audk2g_write("pcm186xGetSckHltStatus() : Error in Reading Register = 0x%x\n", 1176 IFPRINT (audk2g_write("audk2g_pcm186xGetSckHltStatus() : Error in Reading Register = 0x%x\n",
1177 PCM186x_CLK_STAT)); 1177 PCM186x_CLK_STAT));
1178 return (0xFF); 1178 return (0xFF);
1179 } 1179 }
1180 else 1180 else
1181 { 1181 {
1182 DBG_PCM186x (audk2g_write("pcm186xGetSckHltStatus() : read = 0x%x\n", read)); 1182 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetSckHltStatus() : read = 0x%x\n", read));
1183 return (EXTRACT_STATUS(read, SCKHLT)); 1183 return (EXTRACT_STATUS(read, SCKHLT));
1184 } 1184 }
1185} 1185}
@@ -1194,24 +1194,24 @@ Uint8 pcm186xGetSckHltStatus(Uint8 addr)
1194 * 1 - Error 1194 * 1 - Error
1195 * 1195 *
1196 **/ 1196 **/
1197Uint8 pcm186xGetLrckErrStatus(Uint8 addr) 1197Uint8 audk2g_pcm186xGetLrckErrStatus(Uint8 addr)
1198{ 1198{
1199 AUDK2G_ADC_RET ret; 1199 AUDK2G_ADC_RET ret;
1200 Uint8 read = 0; 1200 Uint8 read = 0;
1201 1201
1202 DBG_PCM186x (audk2g_write("pcm186xGetLrckErrStatus() : addr = 0x%x" 1202 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetLrckErrStatus() : addr = 0x%x"
1203 " page = %d\n", addr, pcm186xPageCheck(addr))); 1203 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1204 1204
1205 ret = pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read); 1205 ret = audk2g_pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read);
1206 if(ret) 1206 if(ret)
1207 { 1207 {
1208 IFPRINT (audk2g_write("pcm186xGetLrckErrStatus() : Error in Reading Register = 0x%x\n", 1208 IFPRINT (audk2g_write("audk2g_pcm186xGetLrckErrStatus() : Error in Reading Register = 0x%x\n",
1209 PCM186x_CLK_STAT)); 1209 PCM186x_CLK_STAT));
1210 return (0xFF); 1210 return (0xFF);
1211 } 1211 }
1212 else 1212 else
1213 { 1213 {
1214 DBG_PCM186x (audk2g_write("pcm186xGetLrckErrStatus() : read = 0x%x\n", read)); 1214 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetLrckErrStatus() : read = 0x%x\n", read));
1215 return (EXTRACT_STATUS(read, LRCKERR)); 1215 return (EXTRACT_STATUS(read, LRCKERR));
1216 } 1216 }
1217} 1217}
@@ -1226,24 +1226,24 @@ Uint8 pcm186xGetLrckErrStatus(Uint8 addr)
1226 * 1 - Error 1226 * 1 - Error
1227 * 1227 *
1228 **/ 1228 **/
1229Uint8 pcm186xGetBckErrStatus(Uint8 addr) 1229Uint8 audk2g_pcm186xGetBckErrStatus(Uint8 addr)
1230{ 1230{
1231 AUDK2G_ADC_RET ret; 1231 AUDK2G_ADC_RET ret;
1232 Uint8 read = 0; 1232 Uint8 read = 0;
1233 1233
1234 DBG_PCM186x (audk2g_write("pcm186xGetBckErrStatus() : addr = 0x%x" 1234 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetBckErrStatus() : addr = 0x%x"
1235 " page = %d\n", addr, pcm186xPageCheck(addr))); 1235 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1236 1236
1237 ret = pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read); 1237 ret = audk2g_pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read);
1238 if(ret) 1238 if(ret)
1239 { 1239 {
1240 IFPRINT (audk2g_write("pcm186xGetBckErrStatus() : Error in Reading Register = 0x%x\n", 1240 IFPRINT (audk2g_write("audk2g_pcm186xGetBckErrStatus() : Error in Reading Register = 0x%x\n",
1241 PCM186x_CLK_STAT)); 1241 PCM186x_CLK_STAT));
1242 return (0xFF); 1242 return (0xFF);
1243 } 1243 }
1244 else 1244 else
1245 { 1245 {
1246 DBG_PCM186x (audk2g_write("pcm186xGetBckErrStatus() : read = 0x%x\n", read)); 1246 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetBckErrStatus() : read = 0x%x\n", read));
1247 return (EXTRACT_STATUS(read, BCKERR)); 1247 return (EXTRACT_STATUS(read, BCKERR));
1248 } 1248 }
1249} 1249}
@@ -1258,24 +1258,24 @@ Uint8 pcm186xGetBckErrStatus(Uint8 addr)
1258 * 1 - Error 1258 * 1 - Error
1259 * 1259 *
1260 **/ 1260 **/
1261Uint8 pcm186xGetSckErrStatus(Uint8 addr) 1261Uint8 audk2g_pcm186xGetSckErrStatus(Uint8 addr)
1262{ 1262{
1263 AUDK2G_ADC_RET ret; 1263 AUDK2G_ADC_RET ret;
1264 Uint8 read = 0; 1264 Uint8 read = 0;
1265 1265
1266 DBG_PCM186x (audk2g_write("pcm186xGetSckErrStatus() : addr = 0x%x" 1266 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetSckErrStatus() : addr = 0x%x"
1267 " page = %d\n", addr, pcm186xPageCheck(addr))); 1267 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1268 1268
1269 ret = pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read); 1269 ret = audk2g_pcm186x_read_reg(addr, PCM186x_CLK_STAT, &read);
1270 if(ret) 1270 if(ret)
1271 { 1271 {
1272 IFPRINT (audk2g_write("pcm186xGetSckErrStatus() : Error in Reading Register = 0x%x\n", 1272 IFPRINT (audk2g_write("audk2g_pcm186xGetSckErrStatus() : Error in Reading Register = 0x%x\n",
1273 PCM186x_CLK_STAT)); 1273 PCM186x_CLK_STAT));
1274 return (0xFF); 1274 return (0xFF);
1275 } 1275 }
1276 else 1276 else
1277 { 1277 {
1278 DBG_PCM186x (audk2g_write("pcm186xGetSckErrStatus() : read = 0x%x\n", read)); 1278 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetSckErrStatus() : read = 0x%x\n", read));
1279 return (EXTRACT_STATUS(read, SCKERR)); 1279 return (EXTRACT_STATUS(read, SCKERR));
1280 } 1280 }
1281} 1281}
@@ -1290,24 +1290,24 @@ Uint8 pcm186xGetSckErrStatus(Uint8 addr)
1290 * 1 - Good 1290 * 1 - Good
1291 * 1291 *
1292 **/ 1292 **/
1293Uint8 pcm186xGetDvddStatus(Uint8 addr) 1293Uint8 audk2g_pcm186xGetDvddStatus(Uint8 addr)
1294{ 1294{
1295 AUDK2G_ADC_RET ret; 1295 AUDK2G_ADC_RET ret;
1296 Uint8 read = 0; 1296 Uint8 read = 0;
1297 1297
1298 DBG_PCM186x (audk2g_write("pcm186xGetDvddStatus() : addr = 0x%x" 1298 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetDvddStatus() : addr = 0x%x"
1299 " page = %d\n", addr, pcm186xPageCheck(addr))); 1299 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1300 1300
1301 ret = pcm186x_read_reg(addr, PCM186x_VOLTAGE_STAT, &read); 1301 ret = audk2g_pcm186x_read_reg(addr, PCM186x_VOLTAGE_STAT, &read);
1302 if(ret) 1302 if(ret)
1303 { 1303 {
1304 IFPRINT (audk2g_write("pcm186xGetDvddStatus() : Error in Reading Register = 0x%x\n", 1304 IFPRINT (audk2g_write("audk2g_pcm186xGetDvddStatus() : Error in Reading Register = 0x%x\n",
1305 PCM186x_VOLTAGE_STAT)); 1305 PCM186x_VOLTAGE_STAT));
1306 return (0xFF); 1306 return (0xFF);
1307 } 1307 }
1308 else 1308 else
1309 { 1309 {
1310 DBG_PCM186x (audk2g_write("pcm186xGetDvddStatus() : read = 0x%x\n", read)); 1310 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetDvddStatus() : read = 0x%x\n", read));
1311 return (EXTRACT_STATUS(read, DVDD)); 1311 return (EXTRACT_STATUS(read, DVDD));
1312 } 1312 }
1313} 1313}
@@ -1322,23 +1322,23 @@ Uint8 pcm186xGetDvddStatus(Uint8 addr)
1322 * 1 - Good 1322 * 1 - Good
1323 * 1323 *
1324 **/ 1324 **/
1325Uint8 pcm186xGetAvddStatus(Uint8 addr) 1325Uint8 audk2g_pcm186xGetAvddStatus(Uint8 addr)
1326{ 1326{
1327 AUDK2G_ADC_RET ret; 1327 AUDK2G_ADC_RET ret;
1328 Uint8 read = 0; 1328 Uint8 read = 0;
1329 1329
1330 DBG_PCM186x (audk2g_write("pcm186xGetAvddStatus() : addr = 0x%x" 1330 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetAvddStatus() : addr = 0x%x"
1331 " page = %d\n", addr, pcm186xPageCheck(addr))); 1331 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1332 1332
1333 ret = pcm186x_read_reg(addr, PCM186x_VOLTAGE_STAT, &read); 1333 ret = audk2g_pcm186x_read_reg(addr, PCM186x_VOLTAGE_STAT, &read);
1334 if(ret) 1334 if(ret)
1335 { 1335 {
1336 IFPRINT (audk2g_write("pcm186xGetAvddStatus() : Error in Reading Register = 0x%x\n", 1336 IFPRINT (audk2g_write("audk2g_pcm186xGetAvddStatus() : Error in Reading Register = 0x%x\n",
1337 PCM186x_VOLTAGE_STAT)); 1337 PCM186x_VOLTAGE_STAT));
1338 return (0xFF); 1338 return (0xFF);
1339 } 1339 }
1340 else { 1340 else {
1341 DBG_PCM186x (audk2g_write("pcm186xGetAvddStatus() : read = 0x%x\n", read)); 1341 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetAvddStatus() : read = 0x%x\n", read));
1342 return (EXTRACT_STATUS(read, AVDD)); 1342 return (EXTRACT_STATUS(read, AVDD));
1343 } 1343 }
1344} 1344}
@@ -1353,24 +1353,24 @@ Uint8 pcm186xGetAvddStatus(Uint8 addr)
1353 * 1 - Good 1353 * 1 - Good
1354 * 1354 *
1355 **/ 1355 **/
1356Uint8 pcm186xGetLdoStatus(Uint8 addr) 1356Uint8 audk2g_pcm186xGetLdoStatus(Uint8 addr)
1357{ 1357{
1358 AUDK2G_ADC_RET ret; 1358 AUDK2G_ADC_RET ret;
1359 Uint8 read = 0; 1359 Uint8 read = 0;
1360 1360
1361 DBG_PCM186x (audk2g_write("pcm186xGetLdoStatus() : addr = 0x%x" 1361 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetLdoStatus() : addr = 0x%x"
1362 " page = %d\n", addr, pcm186xPageCheck(addr))); 1362 " page = %d\n", addr, audk2g_pcm186xPageCheck(addr)));
1363 1363
1364 ret = pcm186x_read_reg(addr, PCM186x_VOLTAGE_STAT, &read); 1364 ret = audk2g_pcm186x_read_reg(addr, PCM186x_VOLTAGE_STAT, &read);
1365 if(ret) 1365 if(ret)
1366 { 1366 {
1367 IFPRINT (audk2g_write("pcm186xGetLdoStatus() : Error in Reading Register = 0x%x\n", 1367 IFPRINT (audk2g_write("audk2g_pcm186xGetLdoStatus() : Error in Reading Register = 0x%x\n",
1368 PCM186x_VOLTAGE_STAT)); 1368 PCM186x_VOLTAGE_STAT));
1369 return (0xFF); 1369 return (0xFF);
1370 } 1370 }
1371 else 1371 else
1372 { 1372 {
1373 DBG_PCM186x (audk2g_write("pcm186xGetLdoStatus() : read = 0x%x\n", read)); 1373 DBG_PCM186x (audk2g_write("audk2g_pcm186xGetLdoStatus() : read = 0x%x\n", read));
1374 return (EXTRACT_STATUS(read, LDO)); 1374 return (EXTRACT_STATUS(read, LDO));
1375 } 1375 }
1376} 1376}
diff --git a/src/audk2g_dc_dac.c b/src/audk2g_dc_dac.c
index 045ef95..977ec83 100644
--- a/src/audk2g_dc_dac.c
+++ b/src/audk2g_dc_dac.c
@@ -171,7 +171,7 @@ static DAC_RET pcm169x_write_reg(Uint8 addr, Uint8 reg, Uint8 data)
171 ret = pcm169x_read_reg(addr, reg, &value); 171 ret = pcm169x_read_reg(addr, reg, &value);
172 if(ret) 172 if(ret)
173 { 173 {
174 IFPRINT (audk2g_write("pcm186x_write_reg(): ADC Read for Reg Echo Failed\n")); 174 IFPRINT (audk2g_write("audk2g_pcm186x_write_reg(): ADC Read for Reg Echo Failed\n"));
175 } 175 }
176#endif 176#endif
177 177
@@ -637,14 +637,14 @@ DAC_RET pcm169xRegDump(Uint8 addr)
637 Uint8 count; 637 Uint8 count;
638 Uint8 read = 0; 638 Uint8 read = 0;
639 639
640 DBG_PCM169x (audk2g_write("pcm186xRegDump() : addr = 0x%x\n", addr)); 640 DBG_PCM169x (audk2g_write("audk2g_pcm186xRegDump() : addr = 0x%x\n", addr));
641 641
642 for (count = PCM169x_REG_START; count <= PCM169x_REG_END; count++) 642 for (count = PCM169x_REG_START; count <= PCM169x_REG_END; count++)
643 { 643 {
644 ret = pcm169x_read_reg(addr, count, &read); 644 ret = pcm169x_read_reg(addr, count, &read);
645 if(ret) 645 if(ret)
646 { 646 {
647 IFPRINT (audk2g_write("pcm186xRegDump() : Error in Reading Register = 0x%x\n", 647 IFPRINT (audk2g_write("audk2g_pcm186xRegDump() : Error in Reading Register = 0x%x\n",
648 count)); 648 count));
649 return (ret); 649 return (ret);
650 } 650 }
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