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authorSivaraj R2020-06-01 07:55:40 -0500
committerSivaraj R2020-06-01 22:10:40 -0500
commit92071d0532114d79ee9b3bda5cb9682309a4e240 (patch)
treea5dd662cb1c6fb712eee31de3ea2ee083de3c261
parent693c480b2ee9002d5b9437110440c85c76d9bfd0 (diff)
downloadpdk-92071d0532114d79ee9b3bda5cb9682309a4e240.tar.gz
pdk-92071d0532114d79ee9b3bda5cb9682309a4e240.tar.xz
pdk-92071d0532114d79ee9b3bda5cb9682309a4e240.zip
PRSDK-7753: HS build supportREL.CORESDK.07.00.00.26REL.CORESDK.07.00.00.25
- Added SCICLIENT API to return the default board cfg address and size - This way the caller need not include the private header file which has the size macros based on BUILD_HS flag - This way the caller need not be built special way using the BUILD_HS macro Signed-off-by: Sivaraj R <sivaraj@ti.com>
Diffstat
-rw-r--r--packages/ti/board/utils/makefile2
-rwxr-xr-xpackages/ti/board/utils/uniflash/target/build/uart_make.mk4
-rw-r--r--packages/ti/board/utils/uniflash/target/makefile120
-rwxr-xr-xpackages/ti/board/utils/uniflash/target/soc/k3/soc.c831
-rwxr-xr-xpackages/ti/board/utils/uniflash/target/soc/k3/soc_k3.h213
-rwxr-xr-xpackages/ti/boot/sbl/build/sbl_img.mk3
-rw-r--r--packages/ti/boot/sbl/example/k3MulticoreApp/sbl_boot_perf_benchmark.h1
-rw-r--r--packages/ti/boot/sbl/example/k3MulticoreApp/sbl_mcu_0_boot_perf_benchmark.c76
-rwxr-xr-xpackages/ti/boot/sbl/sbl_component.mk5
-rwxr-xr-xpackages/ti/boot/sbl/soc/k3/sbl_sci_client.c70
-rwxr-xr-xpackages/ti/boot/sbl/soc/k3/sbl_sci_client.h3
-rwxr-xr-xpackages/ti/drv/sciclient/include/sciclient_boardcfg.h298
-rwxr-xr-xpackages/ti/drv/sciclient/sciclient.h42
-rwxr-xr-xpackages/ti/drv/sciclient/src/sciclient_boardcfg.c27
14 files changed, 807 insertions, 888 deletions
diff --git a/packages/ti/board/utils/makefile b/packages/ti/board/utils/makefile
index 7165bce59..8a9b7e634 100644
--- a/packages/ti/board/utils/makefile
+++ b/packages/ti/board/utils/makefile
@@ -51,8 +51,6 @@ evmAM572x_UTILS = uartAppLoader
51idkAM574x_UTILS = uartAppLoader uniflash/target 51idkAM574x_UTILS = uartAppLoader uniflash/target
52evmK2G_UTILS = uartAppLoader uniflash/target 52evmK2G_UTILS = uartAppLoader uniflash/target
53iceK2G_UTILS = uartAppLoader uniflash/target 53iceK2G_UTILS = uartAppLoader uniflash/target
54am65xx_evm_UTILS = uniflash/target
55am65xx_idk_UTILS = uniflash/target
56evmOMAPL137_UTILS = uartAppLoader 54evmOMAPL137_UTILS = uartAppLoader
57lcdkOMAPL138_UTILS = uartAppLoader 55lcdkOMAPL138_UTILS = uartAppLoader
58 56
diff --git a/packages/ti/board/utils/uniflash/target/build/uart_make.mk b/packages/ti/board/utils/uniflash/target/build/uart_make.mk
index 5f6dc6349..432180bdc 100755
--- a/packages/ti/board/utils/uniflash/target/build/uart_make.mk
+++ b/packages/ti/board/utils/uniflash/target/build/uart_make.mk
@@ -114,9 +114,7 @@ ifeq ($(BOARD), $(filter $(BOARD), am65xx_evm am65xx_idk))
114CFLAGS_LOCAL_COMMON += -DSOC_AM65XX 114CFLAGS_LOCAL_COMMON += -DSOC_AM65XX
115endif 115endif
116 116
117ifeq ($(BUILD_HS),yes) 117ifeq ($(BUILD_HS),no)
118CFLAGS_LOCAL_COMMON += -DBUILD_HS
119else
120CFLAGS_LOCAL_COMMON += -DSPI_DMA_ENABLE 118CFLAGS_LOCAL_COMMON += -DSPI_DMA_ENABLE
121endif 119endif
122 120
diff --git a/packages/ti/board/utils/uniflash/target/makefile b/packages/ti/board/utils/uniflash/target/makefile
index b9d27fed3..56fa0f9f1 100644
--- a/packages/ti/board/utils/uniflash/target/makefile
+++ b/packages/ti/board/utils/uniflash/target/makefile
@@ -70,10 +70,6 @@ SOC_NAME = am335x
70SOC = AM335x 70SOC = AM335x
71endif 71endif
72 72
73ifeq ($(BOARD), $(filter $(BOARD), am65xx_evm am65xx_idk))
74SOC_NAME = am65xx
75SOC = AM65XX
76endif
77export SOC 73export SOC
78 74
79FLASH_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/src 75FLASH_SRC_DIR ?= $(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/src
@@ -83,21 +79,12 @@ ARMV7LIBDIR ?= ./lib
83BINFLAGS = -O binary 79BINFLAGS = -O binary
84 80
85#Cross tools 81#Cross tools
86ifeq ($(SOC), AM65XX)
87 CODEGEN_INCLUDE = $(TOOLCHAIN_PATH_R5)/include
88 CC = $(TOOLCHAIN_PATH_R5)/bin/armcl
89 AR = $(TOOLCHAIN_PATH_R5)/bin/armar
90 LNK = $(TOOLCHAIN_PATH_R5)/bin/armlnk
91 SIZE = $(TOOLCHAIN_PATH_R5)/bin/armofd
92 BIN = $(TOOLCHAIN_PATH_GCC_ARCH64)/bin/$(GCC_ARCH64_BIN_PREFIX)-objcopy
93else
94# Support backwards compatibility with KeyStone1 approach 82# Support backwards compatibility with KeyStone1 approach
95 CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc 83CC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
96 AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as 84AC = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)as
97 AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar 85AR = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)ar
98 LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc 86LD = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)gcc
99 BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy 87BIN = $(TOOLCHAIN_PATH_A15)/bin/$(CROSS_TOOL_PRFX)objcopy
100endif
101 88
102# INCLUDE Directories 89# INCLUDE Directories
103CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl 90CSL_DIR = $(PDK_INSTALL_PATH)/ti/csl
@@ -109,45 +96,9 @@ else
109SBL_SRCDIR = $(PDK_INSTALL_PATH)/ti/boot/sbl 96SBL_SRCDIR = $(PDK_INSTALL_PATH)/ti/boot/sbl
110endif 97endif
111 98
112ifeq ($(SOC), AM65XX)
113INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc/k3;$(FLASH_SRC_DIR)/qspi;$(PDK_INSTALL_PATH)/ti/drv/uart;$(PDK_INSTALL_PATH)/ti/csl/src/ip/qspi/V1;$(FLASH_SRC_DIR)/spi;$(FLASH_SRC_DIR)/ospi;$(FLASH_SRC_DIR)/emmc;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/board/$(BOARD)/include;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/include;$(PDK_INSTALL_PATH)/ti/board/diag/common/$(SOC);$(CODEGEN_INCLUDE)
114else
115INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc/$(SOC_NAME);$(FLASH_SRC_DIR)/qspi;$(PDK_INSTALL_PATH)/ti/board/src/idkAM572x/device;$(PDK_INSTALL_PATH)/ti/drv/uart;$(PDK_INSTALL_PATH)/ti/csl/src/ip/qspi/V1;$(FLASH_SRC_DIR)/spi;$(FLASH_SRC_DIR)/ospi;$(FLASH_SRC_DIR)/emmc;$(PDK_INSTALL_PATH)/ti/starterware/bootloader/src/am335x;$(PDK_INSTALL_PATH)/ti/starterware/include;$(PDK_INSTALL_PATH)/ti/starterware/include/hw;$(PDK_INSTALL_PATH)/ti/starterware/include/am335x;$(PDK_INSTALL_PATH)/ti/starterware/include/utils;$(PDK_INSTALL_PATH)/ti/starterware/bootloader/include;$(PDK_INSTALL_PATH)/ti/starterware/board;$(STARTERWARE_DIR);$(PDK_INSTALL_PATH)/ti/starterware/dal;$(PDK_INSTALL_PATH)/ti/starterware/utils;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/board/$(BOARD)/include;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/include;$(PDK_INSTALL_PATH)/ti/board/diag/common/$(SOC) 99INCDIR := $(CSL_DIR);$(PDK_INSTALL_PATH);$(BOARD_DIR);$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc/$(SOC_NAME);$(FLASH_SRC_DIR)/qspi;$(PDK_INSTALL_PATH)/ti/board/src/idkAM572x/device;$(PDK_INSTALL_PATH)/ti/drv/uart;$(PDK_INSTALL_PATH)/ti/csl/src/ip/qspi/V1;$(FLASH_SRC_DIR)/spi;$(FLASH_SRC_DIR)/ospi;$(FLASH_SRC_DIR)/emmc;$(PDK_INSTALL_PATH)/ti/starterware/bootloader/src/am335x;$(PDK_INSTALL_PATH)/ti/starterware/include;$(PDK_INSTALL_PATH)/ti/starterware/include/hw;$(PDK_INSTALL_PATH)/ti/starterware/include/am335x;$(PDK_INSTALL_PATH)/ti/starterware/include/utils;$(PDK_INSTALL_PATH)/ti/starterware/bootloader/include;$(PDK_INSTALL_PATH)/ti/starterware/board;$(STARTERWARE_DIR);$(PDK_INSTALL_PATH)/ti/starterware/dal;$(PDK_INSTALL_PATH)/ti/starterware/utils;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/board/$(BOARD)/include;$(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/include;$(PDK_INSTALL_PATH)/ti/board/diag/common/$(SOC)
116endif
117 100
118# Libraries 101# Libraries
119ifeq ($(SOC), AM65XX)
120 WRTR_SOC = $(SOC_NAME)
121 WRTR_SOC_DIR = $(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc/k3
122 WRTR_LINKER = linker.cmd
123 CSL_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/$(SOC_NAME)/r5f/release/ti.csl.aer5f"
124 CSL_INIT_LIB = "$(PDK_INSTALL_PATH)/ti/csl/lib/$(SOC_NAME)/r5f/release/ti.csl.init.aer5f"
125 SCI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/sciclient/lib/$(SOC_NAME)/mcu1_0/release/sciclient.aer5f"
126 OSAL_LIB = "$(PDK_INSTALL_PATH)/ti/osal/lib/nonos/$(SOC_NAME)/r5f/release/ti.osal.aer5f"
127 OSPI_LIB = "$(PDK_INSTALL_PATH)/ti/drv/spi/lib/$(SOC_NAME)/r5f/release/ti.drv.spi.dma.aer5f"
128 MMCSD_LIB = "$(PDK_INSTALL_PATH)/ti/drv/mmcsd/lib/$(SOC_NAME)/r5f/release/ti.drv.mmcsd.aer5f"
129 GPIO_LIB = "$(PDK_INSTALL_PATH)/ti/drv/gpio/lib/$(SOC_NAME)/r5f/release/ti.drv.gpio.aer5f"
130 BOARD_LIB = "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/r5f/release/ti.board.aer5f"
131 I2C_LIB = "$(PDK_INSTALL_PATH)/ti/drv/i2c/lib/$(SOC_NAME)/r5f/release/ti.drv.i2c.aer5f"
132 UART_LIB = "$(PDK_INSTALL_PATH)/ti/drv/uart/lib/$(SOC_NAME)/r5f/release/ti.drv.uart.aer5f"
133 UDMA_LIB = "$(PDK_INSTALL_PATH)/ti/drv/udma/lib/$(SOC_NAME)/mcu1_0/release/udma.aer5f"
134 PERIPHERAL_LIB = $(UART_LIB) $(I2C_LIB) $(UDMA_LIB) $(OSPI_LIB) $(CSL_LIB) $(CSL_INIT_LIB) $(OSAL_LIB) $(SCI_LIB) $(BOARD_LIB) $(MMCSD_LIB)
135
136 RTSLIB_PATH = "$(TOOLCHAIN_PATH_R5)/lib/libc.a"
137 LNK_LIBS = -l$(PERIPHERAL_LIB) -l$(BOARD_LIB) -l$(OSAL_LIB) $(RTSLIB_PATH)
138
139NUM_PROCS = 1
140
141ifeq ($(OS),Windows_NT)
142 NUM_PROCS = $(NUMBER_OF_PROCESSORS)
143else
144 NUM_PROCS = $(shell grep -c ^processor /proc/cpuinfo)
145endif
146
147BUILD_LIB_ONCE = $(TOOLCHAIN_PATH_R5)/lib/$(RTSLIB_NAME)
148RTSLIB_NAME = rtsv7R4_T_le_v3D16_eabi.lib
149endif
150
151ifeq ($(SOC), K2G) 102ifeq ($(SOC), K2G)
152 WRTR_SOC = k2g 103 WRTR_SOC = k2g
153 WRTR_SOC_DIR = $(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc/$(SOC_NAME) 104 WRTR_SOC_DIR = $(PDK_INSTALL_PATH)/ti/board/utils/uniflash/target/soc/$(SOC_NAME)
@@ -207,17 +158,6 @@ endif
207 158
208LIBDIR := 159LIBDIR :=
209 160
210ifeq ($(SOC), AM65XX)
211INTERNALDEFS = -g -ms -DMAKEFILE_BUILD -c -qq -pdsw225 $(DEBUG_FLAG) -D$(BOARD) -DSOC_$(SOC) --endian=little -mv7R5 --abi=eabi -eo.oer5f --code_state=16 -ea.ser5f --symdebug:dwarf --embed_inline_assembly --float_support=vfpv3d16 -ms -oe -O2 -op0 -os --optimize_with_debug --inline_recursion_limit=20 -DBUILD_MCU1_0 -DBUILD_MCU -DBARE_METAL
212ifneq ($(BUILD_HS), yes)
213INTERNALDEFS += -DSPI_DMA_ENABLE
214endif
215# Linker options
216INTERNALLINKDEFS = --emit_warnings_as_errors -w -q -u _resetvectors -i "$(PDK_INSTALL_PATH)/ti/board/lib/$(BOARD)/r5f/release" -i "$(PDK_INSTALL_PATH)/ti/csl/lib/$(SOC_NAME)/r5f/release" $(WRTR_SOC_DIR)/$(WRTR_LINKER) -c -mv7R5 --diag_suppress=10063 --opt='--float_support=vfpv3d16 --endian=little -mv7R5 --abi=eabi -qq -pdsw225 -g -ms -DMAKEFILE_BUILD -oe --symdebug:dwarf -ms -op2 -O3 -os --optimize_with_debug --inline_recursion_limit=20 --diag_suppress=23000' --strict_compatibility=on -x --zero_init=on $(LNK_LIBS)
217
218OBJEXT = oer5f
219ASMOBJEXT = oer5f
220else
221# Compiler options 161# Compiler options
222INTERNALDEFS += -g -gdwarf-3 -gstrict-dwarf -Wall $(DEBUG_FLAG) -D__ARMv7 -DSOC_$(SOC) -D$(BOARD) -mtune=cortex-a15 -march=armv7-a -marm -mfloat-abi=hard -mfpu=neon 162INTERNALDEFS += -g -gdwarf-3 -gstrict-dwarf -Wall $(DEBUG_FLAG) -D__ARMv7 -DSOC_$(SOC) -D$(BOARD) -mtune=cortex-a15 -march=armv7-a -marm -mfloat-abi=hard -mfpu=neon
223# Linker options 163# Linker options
@@ -225,7 +165,6 @@ INTERNALLINKDEFS = -mfloat-abi=hard -Wl,--undefined,__aeabi_uidiv -Wl,--undefine
225 165
226OBJEXT = o 166OBJEXT = o
227ASMOBJEXT = ao 167ASMOBJEXT = ao
228endif
229 168
230# Executable using device independent library and device object file 169# Executable using device independent library and device object file
231EXE=uart_$(BOARD)_flash_programmer.out 170EXE=uart_$(BOARD)_flash_programmer.out
@@ -246,7 +185,7 @@ VPATH=$(SRCDIR):$(PDK_INSTALL_PATH)/ti/drv/uart/soc/$(WRTR_SOC):$(PDK_INSTALL_PA
246#List the Source Files 185#List the Source Files
247SRC_C = \ 186SRC_C = \
248 xmodem.c \ 187 xmodem.c \
249 uart_main.c 188 uart_main.c
250 189
251ifeq ($(SOC), K2G) 190ifeq ($(SOC), K2G)
252SRC_DRV = a15.c 191SRC_DRV = a15.c
@@ -260,14 +199,6 @@ ifeq ($(BOARD), $(filter $(BOARD), evmAM335x iceAMIC110 icev2AM335x))
260SRC_DRV += spi.c 199SRC_DRV += spi.c
261endif 200endif
262 201
263ifeq ($(BOARD), $(filter $(BOARD), am65xx_evm am65xx_idk))
264SRC_DRV += ospi.c
265endif
266
267ifeq ($(BOARD), $(filter $(BOARD), am65xx_evm am65xx_idk))
268SRC_DRV += emmc.c
269endif
270
271SRC_DRV += \ 202SRC_DRV += \
272 soc.c 203 soc.c
273 204
@@ -293,39 +224,24 @@ ENTRY_SRC = init.S
293endif 224endif
294 225
295# FLAGS for the SourceFiles 226# FLAGS for the SourceFiles
296ifeq ($(SOC), AM65XX)
297CFLAGS += -O2
298SRC_CFLAGS = -I. $(CFLAGS) -g -eo.$(OBJEXT) -ea.$(ASMOBJEXT)
299else
300CFLAGS += -Wall -O2 227CFLAGS += -Wall -O2
301SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall 228SRC_CFLAGS = -I. $(CFLAGS) -g -gdwarf-3 -gstrict-dwarf -Wall
302endif
303 229
304# Make Rule for the SRC Files 230# Make Rule for the SRC Files
305SRC_OBJS = $(patsubst %.c, $(FLASH_PGM_OBJDIR)/%.$(OBJEXT), $(SRC_C)) 231SRC_OBJS = $(patsubst %.c, $(FLASH_PGM_OBJDIR)/%.$(OBJEXT), $(SRC_C))
306ifeq ($(SOC), AM65XX)
307ENTRY_OBJ = $(patsubst %.asm, $(FLASH_PGM_OBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
308else
309ENTRY_OBJ = $(patsubst %.S, $(FLASH_PGM_OBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC)) 232ENTRY_OBJ = $(patsubst %.S, $(FLASH_PGM_OBJDIR)/%.$(ASMOBJEXT), $(ENTRY_SRC))
310endif
311 233
312SRC_DRV_OBJS = $(patsubst %.c, $(FLASH_PGM_OBJDIR)/%.$(OBJEXT), $(SRC_DRV)) 234SRC_DRV_OBJS = $(patsubst %.c, $(FLASH_PGM_OBJDIR)/%.$(OBJEXT), $(SRC_DRV))
313 235
314ifeq ($(SOC), $(filter $(SOC), AM335x AM65XX)) 236ifeq ($(SOC), $(filter $(SOC), AM335x))
315uart_$(BOARD)_flash_programmer:$(FLASH_PGM_BINDIR)/$(BIN_NAME) 237uart_$(BOARD)_flash_programmer:$(FLASH_PGM_BINDIR)/$(BIN_NAME)
316else 238else
317uart_$(BOARD)_flash_programmer:$(FLASH_PGM_BINDIR)/$(EXE) 239uart_$(BOARD)_flash_programmer:$(FLASH_PGM_BINDIR)/$(EXE)
318endif 240endif
319 241
320ifeq ($(SOC), AM65XX)
321$(FLASH_PGM_BINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(FLASH_PGM_BINDIR)/.created $(FLASH_PGM_OBJDIR)/.created $(BUILD_LIB_ONCE)
322 @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
323 @$(LNK) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -m"$(FLASH_PGM_BINDIR)/uart_$(BOARD)_flash_programmer.map" -o $@
324else
325$(FLASH_PGM_BINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(FLASH_PGM_BINDIR)/.created $(FLASH_PGM_OBJDIR)/.created 242$(FLASH_PGM_BINDIR)/$(EXE): $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(FLASH_PGM_BINDIR)/.created $(FLASH_PGM_OBJDIR)/.created
326 @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ... 243 @echo linking $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) into $@ ...
327 @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(FLASH_PGM_BINDIR)/uart_$(BOARD)_flash_programmer.map -o $@ 244 @$(CC) $(SRC_OBJS) $(SRC_DRV_OBJS) $(ENTRY_OBJ) $(INTERNALLINKDEFS) -Wl,-Map=$(FLASH_PGM_BINDIR)/uart_$(BOARD)_flash_programmer.map -o $@
328endif
329 245
330ifeq ($(SOC), AM335x) 246ifeq ($(SOC), AM335x)
331$(FLASH_PGM_BINDIR)/$(BIN_NAME) : $(FLASH_PGM_BINDIR)/$(EXE) 247$(FLASH_PGM_BINDIR)/$(BIN_NAME) : $(FLASH_PGM_BINDIR)/$(EXE)
@@ -339,26 +255,14 @@ endif
339 $(BIN) --gap-fill=0xff -O binary $(FLASH_PGM_BINDIR)/$(EXE) $(FLASH_PGM_BINDIR)/$(BIN_NAME) 255 $(BIN) --gap-fill=0xff -O binary $(FLASH_PGM_BINDIR)/$(EXE) $(FLASH_PGM_BINDIR)/$(BIN_NAME)
340 $(BIN_CERT_GEN) -b $(FLASH_PGM_BINDIR)/$(BIN_NAME) -o $(FLASH_PGM_BINDIR)/uart_$(BOARD)_flash_programmer.tiimage -c R5 -l 0x41c00100 -k $(BIN_CERT_KEY) -d DEBUG -j DBG_FULL_ENABLE 256 $(BIN_CERT_GEN) -b $(FLASH_PGM_BINDIR)/$(BIN_NAME) -o $(FLASH_PGM_BINDIR)/uart_$(BOARD)_flash_programmer.tiimage -c R5 -l 0x41c00100 -k $(BIN_CERT_KEY) -d DEBUG -j DBG_FULL_ENABLE
341endif 257endif
342 258
343$(FLASH_PGM_OBJDIR)/%.$(OBJEXT): %.c $(FLASH_PGM_OBJDIR)/.created 259$(FLASH_PGM_OBJDIR)/%.$(OBJEXT): %.c $(FLASH_PGM_OBJDIR)/.created
344 @echo compiling $< ... 260 @echo compiling $< ...
345ifeq ($(SOC), AM65XX)
346 @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) -fr=$(FLASH_PGM_OBJDIR) -fs=$(FLASH_PGM_OBJDIR) -fc $<
347else
348 @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) $< -o $@ 261 @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) $< -o $@
349endif
350
351 262
352ifeq ($(SOC), AM65XX)
353$(FLASH_PGM_OBJDIR)/%.$(ASMOBJEXT): %.asm $(FLASH_PGM_OBJDIR)/.created
354 @echo compiling $< ...
355 @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) -fr=$(FLASH_PGM_OBJDIR) -fs=$(FLASH_PGM_OBJDIR) -fa $<
356else
357$(FLASH_PGM_OBJDIR)/%.$(ASMOBJEXT): %.S $(FLASH_PGM_OBJDIR)/.created 263$(FLASH_PGM_OBJDIR)/%.$(ASMOBJEXT): %.S $(FLASH_PGM_OBJDIR)/.created
358 @echo compiling $< ... 264 @echo compiling $< ...
359 @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) $< -o $@ 265 @$(CC) -c $(SRC_CFLAGS) $(INTERNALDEFS) $(INCS) $< -o $@
360endif
361
362 266
363$(FLASH_PGM_OBJDIR)/.created: 267$(FLASH_PGM_OBJDIR)/.created:
364 @mkdir -p $(FLASH_PGM_OBJDIR) 268 @mkdir -p $(FLASH_PGM_OBJDIR)
@@ -367,16 +271,10 @@ $(FLASH_PGM_OBJDIR)/.created:
367$(FLASH_PGM_BINDIR)/.created: 271$(FLASH_PGM_BINDIR)/.created:
368 @mkdir -p $(FLASH_PGM_BINDIR) 272 @mkdir -p $(FLASH_PGM_BINDIR)
369 @touch $(FLASH_PGM_BINDIR)/.created 273 @touch $(FLASH_PGM_BINDIR)/.created
370 274
371$(STARTERWARE_DIR)/tools/ti_image/$(TIIMAGE): 275$(STARTERWARE_DIR)/tools/ti_image/$(TIIMAGE):
372 gcc -o $(STARTERWARE_DIR)/tools/ti_image/$(TIIMAGE) $(STARTERWARE_DIR)/tools/ti_image/tiimage.c 276 gcc -o $(STARTERWARE_DIR)/tools/ti_image/$(TIIMAGE) $(STARTERWARE_DIR)/tools/ti_image/tiimage.c
373 277
374$(BUILD_LIB_ONCE):
375ifeq ($(SOC), AM65XX)
376 @echo \# $@ not found, building $@ ...
377 @$(TOOLCHAIN_PATH_R5)/lib/mklib --pattern=$(RTSLIB_NAME) --parallel=$(NUM_PROCS) --compiler_bin_dir=$(TOOLCHAIN_PATH_R5)/bin
378endif
379
380clean: uart_$(BOARD)_flash_programmer_clean 278clean: uart_$(BOARD)_flash_programmer_clean
381 279
382uart_$(BOARD)_flash_programmer_clean: 280uart_$(BOARD)_flash_programmer_clean:
diff --git a/packages/ti/board/utils/uniflash/target/soc/k3/soc.c b/packages/ti/board/utils/uniflash/target/soc/k3/soc.c
index 571115519..42921635b 100755
--- a/packages/ti/board/utils/uniflash/target/soc/k3/soc.c
+++ b/packages/ti/board/utils/uniflash/target/soc/k3/soc.c
@@ -1,418 +1,413 @@
1/* 1/*
2 * Copyright (C) 2019-2020 Texas Instruments Incorporated - http://www.ti.com/ 2 * Copyright (C) 2019-2020 Texas Instruments Incorporated - http://www.ti.com/
3 * 3 *
4 * Redistribution and use in source and binary forms, with or without 4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions 5 * modification, are permitted provided that the following conditions
6 * are met: 6 * are met:
7 * 7 *
8 * Redistributions of source code must retain the above copyright 8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer. 9 * notice, this list of conditions and the following disclaimer.
10 * 10 *
11 * Redistributions in binary form must reproduce the above copyright 11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the 13 * documentation and/or other materials provided with the
14 * distribution. 14 * distribution.
15 * 15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of 16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived 17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission. 18 * from this software without specific prior written permission.
19 * 19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * 31 *
32 */ 32 */
33 33
34/* ========================================================================== */ 34/* ========================================================================== */
35/* Include Files */ 35/* Include Files */
36/* ========================================================================== */ 36/* ========================================================================== */
37 37
38#include "soc_k3.h" 38#include "soc_k3.h"
39#include "flash_programmer.h" 39#include "flash_programmer.h"
40 40
41/* ========================================================================== */ 41/* ========================================================================== */
42/* Global Variables */ 42/* Global Variables */
43/* ========================================================================== */ 43/* ========================================================================== */
44 44
45uint32_t uart_baseAddr = CSL_MCU_UART0_BASE; 45uint32_t uart_baseAddr = CSL_MCU_UART0_BASE;
46uint8_t uart_inst = BOARD_UART_INSTANCE; 46uint8_t uart_inst = BOARD_UART_INSTANCE;
47 47
48/* ========================================================================== */ 48/* ========================================================================== */
49/* Function Definitions */ 49/* Function Definitions */
50/* ========================================================================== */ 50/* ========================================================================== */
51 51
52void _resetvectors (void); 52void _resetvectors (void);
53int8_t UFP_openUartHandle(void); 53int8_t UFP_openUartHandle(void);
54 54
55static int32_t UFP_isNoBootEnabled(void) 55static int32_t UFP_isNoBootEnabled(void)
56{ 56{
57 uint32_t mainDevStat; 57 uint32_t mainDevStat;
58 uint32_t wkupDevStat; 58 uint32_t wkupDevStat;
59 59
60 mainDevStat = HW_RD_REG32(UFP_MAIN_DEVSTAT_ADDR); 60 mainDevStat = HW_RD_REG32(UFP_MAIN_DEVSTAT_ADDR);
61 wkupDevStat = HW_RD_REG32(UFP_WKUP_DEVSTAT_ADDR); 61 wkupDevStat = HW_RD_REG32(UFP_WKUP_DEVSTAT_ADDR);
62 62
63 if(((mainDevStat & UFP_MAIN_DEVSTAT_NOBOOT_MASK) == UFP_MAIN_DEVSTAT_NOBOOT_CFG) && 63 if(((mainDevStat & UFP_MAIN_DEVSTAT_NOBOOT_MASK) == UFP_MAIN_DEVSTAT_NOBOOT_CFG) &&
64 ((wkupDevStat & UFP_WKUP_DEVSTAT_NOBOOT_MASK) == UFP_WKUP_DEVSTAT_NOBOOT_CFG)) 64 ((wkupDevStat & UFP_WKUP_DEVSTAT_NOBOOT_MASK) == UFP_WKUP_DEVSTAT_NOBOOT_CFG))
65 { 65 {
66 return (TRUE); 66 return (TRUE);
67 } 67 }
68 68
69 return (FALSE); 69 return (FALSE);
70} 70}
71 71
72static void UFP_asmAtcmEn(void) 72static void UFP_asmAtcmEn(void)
73{ 73{
74 asm volatile (" MRC p15, #0, r0, c9, c1, #1"); 74 asm volatile (" MRC p15, #0, r0, c9, c1, #1");
75 asm volatile (" ORR r0, r0, #0x1"); 75 asm volatile (" ORR r0, r0, #0x1");
76 asm volatile (" MCR p15, #0, r0, c9, c1, #1"); 76 asm volatile (" MCR p15, #0, r0, c9, c1, #1");
77} 77}
78 78
79static void UFP_enableATCM(void) 79static void UFP_enableATCM(void)
80{ 80{
81 UFP_asmAtcmEn(); 81 UFP_asmAtcmEn();
82 82
83 /* Initialize the ATCM */ 83 /* Initialize the ATCM */
84 memset((void *)UFP_MCU_ARMSS_ATCM_BASE, 0xFF, 0x8000); 84 memset((void *)UFP_MCU_ARMSS_ATCM_BASE, 0xFF, 0x8000);
85 85
86 /* Relocate CSL Vectors to ATCM*/ 86 /* Relocate CSL Vectors to ATCM*/
87 memcpy((void *)UFP_MCU_ARMSS_ATCM_BASE, (void *)_resetvectors, 0x100); 87 memcpy((void *)UFP_MCU_ARMSS_ATCM_BASE, (void *)_resetvectors, 0x100);
88} 88}
89 89
90static void UFP_initUARTPwrClk(void) 90static void UFP_initUARTPwrClk(void)
91{ 91{
92#if defined(SOC_J721E) 92#if defined(SOC_J721E)
93 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_KICK0_OFFSET, UFP_UART_PLL_KICK0_UNLOCK_VAL); 93 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_KICK0_OFFSET, UFP_UART_PLL_KICK0_UNLOCK_VAL);
94 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_KICK1_OFFSET, UFP_UART_PLL_KICK1_UNLOCK_VAL); 94 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_KICK1_OFFSET, UFP_UART_PLL_KICK1_UNLOCK_VAL);
95 95
96 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_DIV_OFFSET, UFP_UART_PLL_DIV_VAL); 96 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_DIV_OFFSET, UFP_UART_PLL_DIV_VAL);
97 97
98 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_KICK0_OFFSET, UFP_UART_PLL_KICK_LOCK_VAL); 98 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_KICK0_OFFSET, UFP_UART_PLL_KICK_LOCK_VAL);
99 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_KICK1_OFFSET, UFP_UART_PLL_KICK_LOCK_VAL); 99 HW_WR_REG32(UFP_UART_PLL_BASE + UFP_UART_PLL_KICK1_OFFSET, UFP_UART_PLL_KICK_LOCK_VAL);
100#endif 100#endif
101} 101}
102 102
103static uint32_t UFP_GetCertLen(uint8_t *x509_cert_ptr) 103static uint32_t UFP_GetCertLen(uint8_t *x509_cert_ptr)
104{ 104{
105 uint32_t cert_len = 0; 105 uint32_t cert_len = 0;
106 uint8_t *cert_len_ptr = (uint8_t *)&cert_len; 106 uint8_t *cert_len_ptr = (uint8_t *)&cert_len;
107 107
108 if ( *x509_cert_ptr != 0x30) 108 if ( *x509_cert_ptr != 0x30)
109 { 109 {
110 return 0; 110 return 0;
111 } 111 }
112 112
113 cert_len = *(x509_cert_ptr + 1); 113 cert_len = *(x509_cert_ptr + 1);
114 114
115 /* If you need more than 2 bytes to store the cert length */ 115 /* If you need more than 2 bytes to store the cert length */
116 /* it means that the cert length is greater than 64 Kbytes */ 116 /* it means that the cert length is greater than 64 Kbytes */
117 /* and we do not support it */ 117 /* and we do not support it */
118 if ((cert_len > 0x80) && 118 if ((cert_len > 0x80) &&
119 (cert_len != 0x82)) 119 (cert_len != 0x82))
120 { 120 {
121 return 0; 121 return 0;
122 } 122 }
123 123
124 if ( cert_len == 0x82) 124 if ( cert_len == 0x82)
125 { 125 {
126 *cert_len_ptr = *(x509_cert_ptr + 3); 126 *cert_len_ptr = *(x509_cert_ptr + 3);
127 *(cert_len_ptr + 1) = *(x509_cert_ptr + 2); 127 *(cert_len_ptr + 1) = *(x509_cert_ptr + 2);
128 128
129 /* add current offset from start of x509 cert */ 129 /* add current offset from start of x509 cert */
130 cert_len += 3; 130 cert_len += 3;
131 } 131 }
132 else 132 else
133 { 133 {
134 /* add current offset from start of x509 cert */ 134 /* add current offset from start of x509 cert */
135 /* if cert len was obtained from 2nd byte i.e. */ 135 /* if cert len was obtained from 2nd byte i.e. */
136 /* cert size is 127 bytes or less */ 136 /* cert size is 127 bytes or less */
137 cert_len += 1; 137 cert_len += 1;
138 } 138 }
139 139
140 return cert_len + 1; 140 return cert_len + 1;
141} 141}
142 142
143static uint8_t *UFP_findSeq(uint8_t *x509_cert_ptr, uint32_t x509_cert_size, uint8_t *seq_oid, uint8_t seq_len) 143static uint8_t *UFP_findSeq(uint8_t *x509_cert_ptr, uint32_t x509_cert_size, uint8_t *seq_oid, uint8_t seq_len)
144{ 144{
145 uint8_t *x509_cert_end = x509_cert_ptr + x509_cert_size - seq_len; 145 uint8_t *x509_cert_end = x509_cert_ptr + x509_cert_size - seq_len;
146 146
147 /* searching for the following byte seq in the cert */ 147 /* searching for the following byte seq in the cert */
148 /* seq_id(0x30) seq_len(< 0x80) 0x06 0x09 0x2B... */ 148 /* seq_id(0x30) seq_len(< 0x80) 0x06 0x09 0x2B... */
149 while (x509_cert_ptr < x509_cert_end) 149 while (x509_cert_ptr < x509_cert_end)
150 { 150 {
151 if ((*x509_cert_ptr == seq_oid[0]) && 151 if ((*x509_cert_ptr == seq_oid[0]) &&
152 (*(x509_cert_ptr + 2) == seq_oid[2]) && 152 (*(x509_cert_ptr + 2) == seq_oid[2]) &&
153 (*(x509_cert_ptr - 2) == 0x30)) 153 (*(x509_cert_ptr - 2) == 0x30))
154 { 154 {
155 if ((bcmp((const void *)x509_cert_ptr, (const void *)seq_oid, seq_len)) == 0) 155 if ((bcmp((const void *)x509_cert_ptr, (const void *)seq_oid, seq_len)) == 0)
156 { 156 {
157 /* return start boot_seq */ 157 /* return start boot_seq */
158 return (x509_cert_ptr - 2); 158 return (x509_cert_ptr - 2);
159 } 159 }
160 } 160 }
161 x509_cert_ptr++; 161 x509_cert_ptr++;
162 } 162 }
163 163
164 return NULL; 164 return NULL;
165} 165}
166 166
167static uint32_t UFP_isSysfwEnc(uint8_t *x509_cert_ptr) 167static uint32_t UFP_isSysfwEnc(uint8_t *x509_cert_ptr)
168{ 168{
169 static uint32_t retVal = UFP_SYSFW_NOT_PROCESSED; 169 static uint32_t retVal = UFP_SYSFW_NOT_PROCESSED;
170 uint8_t *encSeqPtr = NULL; 170 uint8_t *encSeqPtr = NULL;
171 uint32_t outer_cert_len = 0; 171 uint32_t outer_cert_len = 0;
172 uint8_t *innerCertStart = NULL; 172 uint8_t *innerCertStart = NULL;
173 uint32_t inner_cert_len = 0; 173 uint32_t inner_cert_len = 0;
174 /* oid encoding of encryption seq extension for RBL - 1.3.6.1.4.1.294.1.4 */ 174 /* oid encoding of encryption seq extension for RBL - 1.3.6.1.4.1.294.1.4 */
175 uint8_t enc_seq_oid[] = {0x06, 0x09, 0x2B, 0x06, 0x01, 0x04, 0x01, 0x82, 0x26, 0x01, 0x04}; 175 uint8_t enc_seq_oid[] = {0x06, 0x09, 0x2B, 0x06, 0x01, 0x04, 0x01, 0x82, 0x26, 0x01, 0x04};
176 176
177 if (x509_cert_ptr) 177 if (x509_cert_ptr)
178 { 178 {
179 uint32_t UFP_GetCertLen(uint8_t *x509_cert_ptr); 179 uint32_t UFP_GetCertLen(uint8_t *x509_cert_ptr);
180 180
181 outer_cert_len = UFP_GetCertLen(x509_cert_ptr); 181 outer_cert_len = UFP_GetCertLen(x509_cert_ptr);
182 innerCertStart = x509_cert_ptr + outer_cert_len; 182 innerCertStart = x509_cert_ptr + outer_cert_len;
183 inner_cert_len = UFP_GetCertLen(innerCertStart); 183 inner_cert_len = UFP_GetCertLen(innerCertStart);
184 } 184 }
185 185
186 if (inner_cert_len) 186 if (inner_cert_len)
187 { 187 {
188 uint8_t *UFP_findSeq(uint8_t *x509_cert_ptr, uint32_t x509_cert_size, uint8_t *seq_oid, uint8_t seq_len); 188 uint8_t *UFP_findSeq(uint8_t *x509_cert_ptr, uint32_t x509_cert_size, uint8_t *seq_oid, uint8_t seq_len);
189 189
190 encSeqPtr = UFP_findSeq(innerCertStart, inner_cert_len, enc_seq_oid, sizeof(enc_seq_oid)); 190 encSeqPtr = UFP_findSeq(innerCertStart, inner_cert_len, enc_seq_oid, sizeof(enc_seq_oid));
191 if (encSeqPtr) 191 if (encSeqPtr)
192 { 192 {
193 /* SYSFW is double signed and encrypted */ 193 /* SYSFW is double signed and encrypted */
194 retVal = UFP_SYSFW_ENCRYPTED; 194 retVal = UFP_SYSFW_ENCRYPTED;
195 } 195 }
196 } 196 }
197 else if ((x509_cert_ptr) && (retVal == UFP_SYSFW_NOT_PROCESSED)) 197 else if ((x509_cert_ptr) && (retVal == UFP_SYSFW_NOT_PROCESSED))
198 { 198 {
199 /* SYSFW is single signed */ 199 /* SYSFW is single signed */
200 retVal = UFP_SYSFW_CLEAR_TEXT; 200 retVal = UFP_SYSFW_CLEAR_TEXT;
201 } 201 }
202 202
203 return retVal; 203 return retVal;
204} 204}
205 205
206/** 206/**
207 * @brief Function to initialize the sciclient module 207 * @brief Function to initialize the sciclient module
208 * 208 *
209 * \param sysfw [IN] System firmware pointer 209 * \param sysfw [IN] System firmware pointer
210 * 210 *
211 * @return - int8_t 211 * @return - int8_t
212 * 0 - sciclient module initialization successful 212 * 0 - sciclient module initialization successful
213 * -1 - sciclient module initialization failed 213 * -1 - sciclient module initialization failed
214 * 214 *
215 */ 215 */
216int8_t UFP_sciclientInit(void *sysfw) 216int8_t UFP_sciclientInit(void *sysfw)
217{ 217{
218 int32_t status = CSL_EFAIL; 218 int32_t status = CSL_EFAIL;
219 219
220 Sciclient_ConfigPrms_t config = 220 Sciclient_ConfigPrms_t config =
221 { 221 {
222 SCICLIENT_SERVICE_OPERATION_MODE_POLLED, 222 SCICLIENT_SERVICE_OPERATION_MODE_POLLED,
223 }; 223 };
224 224 /* SYSFW board configurations */
225 /* SYSFW board configurations */ 225 Sciclient_DefaultBoardCfgInfo_t boardCfgInfo;
226 Sciclient_BoardCfgPrms_t sblBoardCfgPrms = 226 Sciclient_BoardCfgPrms_t sblBoardCfgPrms;
227 { 227 Sciclient_BoardCfgPrms_t sblBoardCfgPmPrms;
228 .boardConfigLow = (uint32_t)gSciclient_boardCfgLow, 228 Sciclient_BoardCfgPrms_t sblBoardCfgRmPrms;
229 .boardConfigHigh = 0, 229 Sciclient_BoardCfgPrms_t sblBoardCfgSecPrms;
230 .boardConfigSize = SCICLIENT_BOARDCFG_SIZE_IN_BYTES, 230
231 .devGrp = DEVGRP_ALL 231 UFP_isSysfwEnc((uint8_t *) sysfw);
232 }; 232
233 233 status = Sciclient_loadFirmware((const uint32_t *)sysfw);
234 Sciclient_BoardCfgPrms_t sblBoardCfgPmPrms = 234 if (status != CSL_PASS)
235 { 235 {
236 .boardConfigLow = (uint32_t)gSciclient_boardCfgLow_pm, 236 return (-1);
237 .boardConfigHigh = 0, 237 }
238 .boardConfigSize = SCICLIENT_BOARDCFG_PM_SIZE_IN_BYTES, 238
239 .devGrp = DEVGRP_ALL 239 status = Sciclient_init(&config);
240 }; 240 if (status != CSL_PASS)
241 241 {
242 Sciclient_BoardCfgPrms_t sblBoardCfgRmPrms = 242 return (-1);
243 { 243 }
244 .boardConfigLow = (uint32_t)gSciclient_boardCfgLow_rm, 244
245 .boardConfigHigh = 0, 245 status = Sciclient_getDefaultBoardCfgInfo(&boardCfgInfo);
246 .boardConfigSize = SCICLIENT_BOARDCFG_RM_SIZE_IN_BYTES, 246 if (status != CSL_PASS)
247 .devGrp = DEVGRP_ALL 247 {
248 }; 248 return (-1);
249 249 }
250 Sciclient_BoardCfgPrms_t sblBoardCfgSecPrms = 250
251 { 251 sblBoardCfgPrms.boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLow;
252 .boardConfigLow = (uint32_t)gSciclient_boardCfgLow_sec, 252 sblBoardCfgPrms.boardConfigHigh = 0;
253 .boardConfigHigh = 0, 253 sblBoardCfgPrms.boardConfigSize = boardCfgInfo.boardCfgLowSize;
254 .boardConfigSize = SCICLIENT_BOARDCFG_SECURITY_SIZE_IN_BYTES, 254 sblBoardCfgPrms.devGrp = DEVGRP_ALL;
255 .devGrp = DEVGRP_ALL 255 status = Sciclient_boardCfg(&sblBoardCfgPrms);
256 }; 256 if (status != CSL_PASS)
257 257 {
258 UFP_isSysfwEnc((uint8_t *) sysfw); 258 return (-1);
259 259 }
260 status = Sciclient_loadFirmware((const uint32_t *)sysfw); 260
261 if (status != CSL_PASS) 261 sblBoardCfgPmPrms.boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLowPm;
262 { 262 sblBoardCfgPmPrms.boardConfigHigh = 0;
263 return (-1); 263 sblBoardCfgPmPrms.boardConfigSize = boardCfgInfo.boardCfgLowPmSize;
264 } 264 sblBoardCfgPmPrms.devGrp = DEVGRP_ALL;
265 265 status = Sciclient_boardCfgPm(&sblBoardCfgPmPrms);
266 status = Sciclient_init(&config); 266 if (status != CSL_PASS)
267 if (status != CSL_PASS) 267 {
268 { 268 return (-1);
269 return (-1); 269 }
270 } 270
271 271 sblBoardCfgRmPrms.boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLowRm;
272 status = Sciclient_boardCfg(&sblBoardCfgPrms); 272 sblBoardCfgRmPrms.boardConfigHigh = 0;
273 if (status != CSL_PASS) 273 sblBoardCfgRmPrms.boardConfigSize = boardCfgInfo.boardCfgLowRmSize;
274 { 274 sblBoardCfgRmPrms.devGrp = DEVGRP_ALL;
275 return (-1); 275 status = Sciclient_boardCfgRm(&sblBoardCfgRmPrms);
276 } 276 if (status != CSL_PASS)
277 277 {
278 status = Sciclient_boardCfgPm(&sblBoardCfgPmPrms); 278 return (-1);
279 if (status != CSL_PASS) 279 }
280 { 280
281 return (-1); 281 sblBoardCfgSecPrms.boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLowSec;
282 } 282 sblBoardCfgSecPrms.boardConfigHigh = 0;
283 283 sblBoardCfgSecPrms.boardConfigSize = boardCfgInfo.boardCfgLowSecSize;
284 status = Sciclient_boardCfgRm(&sblBoardCfgRmPrms); 284 sblBoardCfgSecPrms.devGrp = DEVGRP_ALL;
285 if (status != CSL_PASS) 285 status = Sciclient_boardCfgSec(&sblBoardCfgSecPrms);
286 { 286 if (status != CSL_PASS)
287 return (-1); 287 {
288 } 288 return (-1);
289 289 }
290 status = Sciclient_boardCfgSec(&sblBoardCfgSecPrms); 290
291 if (status != CSL_PASS) 291 /* RTI seems to be turned on by ROM. Turning it off so that Power domain can transition */
292 { 292 Sciclient_pmSetModuleState(TISCI_DEV_MCU_RTI0,
293 return (-1); 293 TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
294 } 294 TISCI_MSG_FLAG_AOP,
295 295 SCICLIENT_SERVICE_WAIT_FOREVER);
296 /* RTI seems to be turned on by ROM. Turning it off so that Power domain can transition */ 296 Sciclient_pmSetModuleState(TISCI_DEV_MCU_RTI1,
297 Sciclient_pmSetModuleState(TISCI_DEV_MCU_RTI0, 297 TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF,
298 TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF, 298 TISCI_MSG_FLAG_AOP,
299 TISCI_MSG_FLAG_AOP, 299 SCICLIENT_SERVICE_WAIT_FOREVER);
300 SCICLIENT_SERVICE_WAIT_FOREVER); 300
301 Sciclient_pmSetModuleState(TISCI_DEV_MCU_RTI1, 301 return 0;
302 TISCI_MSG_VALUE_DEVICE_SW_STATE_AUTO_OFF, 302}
303 TISCI_MSG_FLAG_AOP, 303
304 SCICLIENT_SERVICE_WAIT_FOREVER); 304/**
305 305 * @brief This function initializes settings based on soc.
306 return 0; 306 *
307} 307 * \param cfg [IN] Board initializing value
308 308 *
309/** 309 * @return int8_t
310 * @brief This function initializes settings based on soc. 310 * 0 - Init completed successfully
311 * 311 * -1 - Error occurred
312 * \param cfg [IN] Board initializing value 312 *
313 * 313 */
314 * @return int8_t 314int8_t UFP_socInit(Board_initCfg *cfg)
315 * 0 - Init completed successfully 315{
316 * -1 - Error occurred 316 Board_initCfg boardCfg;
317 * 317 UART_HwAttrs uart_cfg;
318 */ 318 int32_t noBootCfg;
319int8_t UFP_socInit(Board_initCfg *cfg) 319
320{ 320#ifdef UFP_DISABLE_JTAG_LOAD
321 Board_initCfg boardCfg; 321 noBootCfg = FALSE;
322 UART_HwAttrs uart_cfg; 322#else
323 int32_t noBootCfg; 323 noBootCfg = UFP_isNoBootEnabled();
324 324#endif
325#ifdef UFP_DISABLE_JTAG_LOAD 325
326 noBootCfg = FALSE; 326 if (cfg == NULL)
327#else 327 {
328 noBootCfg = UFP_isNoBootEnabled(); 328 boardCfg = BOARD_INIT_PINMUX_CONFIG;
329#endif 329
330 330 /* System firmware should be already loaded for no boot mode.
331 if (cfg == NULL) 331 Enable PLL and PSC config in board.
332 { 332 */
333 boardCfg = BOARD_INIT_PINMUX_CONFIG; 333 if(noBootCfg == TRUE)
334 334 {
335 /* System firmware should be already loaded for no boot mode. 335 boardCfg |= (BOARD_INIT_PLL |
336 Enable PLL and PSC config in board. 336 BOARD_INIT_MODULE_CLOCK);
337 */ 337 }
338 if(noBootCfg == TRUE) 338 }
339 { 339 else
340 boardCfg |= (BOARD_INIT_PLL | 340 {
341 BOARD_INIT_MODULE_CLOCK); 341 boardCfg = *cfg;
342 } 342 }
343 } 343
344 else 344 /* Board Library Init. */
345 { 345 if (Board_init(boardCfg))
346 boardCfg = *cfg; 346 {
347 } 347 return -1;
348 348 }
349 /* Board Library Init. */ 349
350 if (Board_init(boardCfg)) 350 if(noBootCfg == TRUE)
351 { 351 {
352 return -1; 352 /* No need of changing the UART input clock when
353 } 353 PLL init is done by board
354 354 */
355 if(noBootCfg == TRUE) 355 UFP_uartConfig(UFP_BAUDRATE_115200);
356 { 356 }
357 /* No need of changing the UART input clock when 357 else
358 PLL init is done by board 358 {
359 */ 359 UFP_initUARTPwrClk();
360 UFP_uartConfig(UFP_BAUDRATE_115200); 360
361 } 361 UART_socGetInitCfg(BOARD_UART_INSTANCE, &uart_cfg);
362 else 362 /* Use UART fclk freq setup by ROM */
363 { 363 uart_cfg.frequency = UFP_ROM_UART_MODULE_INPUT_CLK;
364 UFP_initUARTPwrClk(); 364 /* Disable the UART interrupt */
365 365 uart_cfg.enableInterrupt = FALSE;
366 UART_socGetInitCfg(BOARD_UART_INSTANCE, &uart_cfg); 366 UART_socSetInitCfg(BOARD_UART_INSTANCE, &uart_cfg);
367 /* Use UART fclk freq setup by ROM */ 367
368 uart_cfg.frequency = UFP_ROM_UART_MODULE_INPUT_CLK; 368 UFP_uartConfig(UFP_BAUDRATE_115200);
369 /* Disable the UART interrupt */ 369
370 uart_cfg.enableInterrupt = FALSE; 370 UFP_enableATCM();
371 UART_socSetInitCfg(BOARD_UART_INSTANCE, &uart_cfg); 371 }
372 372
373 UFP_uartConfig(UFP_BAUDRATE_115200); 373 return 0;
374 374}
375 UFP_enableATCM(); 375
376 } 376/**
377 377 * @brief Function to load the system firmware
378 return 0; 378 *
379} 379 * \param sysFW [IN] System firmware pointer
380 380 *
381/** 381 * @return - int8_t
382 * @brief Function to load the system firmware 382 * 0 - Firmware load successful
383 * 383 * -1 - Firmware load failed
384 * \param sysFW [IN] System firmware pointer 384 *
385 * 385 */
386 * @return - int8_t 386int8_t UFP_loadSysFW(void *sysFW)
387 * 0 - Firmware load successful 387{
388 * -1 - Firmware load failed 388 Board_initCfg boardCfg;
389 * 389 UART_HwAttrs uart_cfg;
390 */ 390
391int8_t UFP_loadSysFW(void *sysFW) 391 UFP_sciclientInit(sysFW);
392{ 392
393 Board_initCfg boardCfg; 393 /* Board Library Init. */
394 UART_HwAttrs uart_cfg; 394 boardCfg = (BOARD_INIT_PLL |
395 395 BOARD_INIT_MODULE_CLOCK);
396 UFP_sciclientInit(sysFW); 396 if (Board_init(boardCfg))
397 397 {
398 /* Board Library Init. */ 398 return -1;
399 boardCfg = (BOARD_INIT_PLL | 399 }
400 BOARD_INIT_MODULE_CLOCK); 400
401 if (Board_init(boardCfg)) 401 /* Reconfigure the UART */
402 { 402 UART_socGetInitCfg(BOARD_UART_INSTANCE, &uart_cfg);
403 return -1; 403 /* Use UART fclk freq setup by SYSFW */
404 } 404 uart_cfg.frequency = UFP_SYSFW_UART_MODULE_INPUT_CLK;
405 405 /* Disable the UART interrupt */
406 /* Reconfigure the UART */ 406 uart_cfg.enableInterrupt = FALSE;
407 UART_socGetInitCfg(BOARD_UART_INSTANCE, &uart_cfg); 407 UART_socSetInitCfg(BOARD_UART_INSTANCE, &uart_cfg);
408 /* Use UART fclk freq setup by SYSFW */ 408
409 uart_cfg.frequency = UFP_SYSFW_UART_MODULE_INPUT_CLK; 409 UFP_uartClose();
410 /* Disable the UART interrupt */ 410 UFP_uartConfig(UFP_BAUDRATE_115200);
411 uart_cfg.enableInterrupt = FALSE; 411
412 UART_socSetInitCfg(BOARD_UART_INSTANCE, &uart_cfg); 412 return 0;
413 413}
414 UFP_uartClose();
415 UFP_uartConfig(UFP_BAUDRATE_115200);
416
417 return 0;
418}
diff --git a/packages/ti/board/utils/uniflash/target/soc/k3/soc_k3.h b/packages/ti/board/utils/uniflash/target/soc/k3/soc_k3.h
index aabb7f774..4ce538161 100755
--- a/packages/ti/board/utils/uniflash/target/soc/k3/soc_k3.h
+++ b/packages/ti/board/utils/uniflash/target/soc/k3/soc_k3.h
@@ -1,107 +1,106 @@
1/* 1/*
2 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 2 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/
3 * 3 *
4 * Redistribution and use in source and binary forms, with or without 4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions 5 * modification, are permitted provided that the following conditions
6 * are met: 6 * are met:
7 * 7 *
8 * Redistributions of source code must retain the above copyright 8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer. 9 * notice, this list of conditions and the following disclaimer.
10 * 10 *
11 * Redistributions in binary form must reproduce the above copyright 11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the 13 * documentation and/or other materials provided with the
14 * distribution. 14 * distribution.
15 * 15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of 16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived 17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission. 18 * from this software without specific prior written permission.
19 * 19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * 31 *
32 */ 32 */
33 33
34/* ========================================================================== */ 34/* ========================================================================== */
35/* Include Files */ 35/* Include Files */
36/* ========================================================================== */ 36/* ========================================================================== */
37 37
38#ifndef _SOC_K3_H_ 38#ifndef _SOC_K3_H_
39#define _SOC_K3_H_ 39#define _SOC_K3_H_
40 40
41#ifdef __cplusplus 41#ifdef __cplusplus
42extern "C" { 42extern "C" {
43#endif 43#endif
44 44
45#include <stdio.h> 45#include <stdio.h>
46#include <string.h> 46#include <string.h>
47#include <strings.h> 47#include <strings.h>
48 48
49#include <ti/board/board.h> 49#include <ti/board/board.h>
50#include <ti/csl/soc.h> 50#include <ti/csl/soc.h>
51#include <diag_common_cfg.h> 51#include <diag_common_cfg.h>
52 52
53#include <ti/csl/arch/csl_arch.h> 53#include <ti/csl/arch/csl_arch.h>
54#include <ti/csl/src/ip/rat/V0/csl_rat.h> 54#include <ti/csl/src/ip/rat/V0/csl_rat.h>
55 55
56#include <ti/drv/sciclient/sciclient.h> 56#include <ti/drv/sciclient/sciclient.h>
57#include <ti/drv/sciclient/src/sciclient_priv.h> 57#include <ti/drv/uart/UART.h>
58#include <ti/drv/uart/UART.h> 58#include <ti/drv/uart/src/UART_osal.h>
59#include <ti/drv/uart/src/UART_osal.h> 59#include <ti/drv/uart/UART_stdio.h>
60#include <ti/drv/uart/UART_stdio.h> 60#include <ti/drv/uart/soc/UART_soc.h>
61#include <ti/drv/uart/soc/UART_soc.h> 61
62 62#if defined(SOC_J721E)
63#if defined(SOC_J721E) 63#include <ti/csl/soc/j721e/src/cslr_wkup_ctrl_mmr.h>
64#include <ti/csl/soc/j721e/src/cslr_wkup_ctrl_mmr.h> 64#include <ti/csl/soc/j721e/src/cslr_mcu_pll_mmr.h>
65#include <ti/csl/soc/j721e/src/cslr_mcu_pll_mmr.h> 65
66 66#define UFP_UART_PLL_BASE (CSL_MCU_PLL0_CFG_BASE)
67#define UFP_UART_PLL_BASE (CSL_MCU_PLL0_CFG_BASE) 67#define UFP_UART_PLL_KICK0_OFFSET (CSL_MCU_PLL_MMR_CFG_PLL1_LOCKKEY0)
68#define UFP_UART_PLL_KICK0_OFFSET (CSL_MCU_PLL_MMR_CFG_PLL1_LOCKKEY0) 68#define UFP_UART_PLL_KICK1_OFFSET (CSL_MCU_PLL_MMR_CFG_PLL1_LOCKKEY1)
69#define UFP_UART_PLL_KICK1_OFFSET (CSL_MCU_PLL_MMR_CFG_PLL1_LOCKKEY1) 69#define UFP_UART_PLL_DIV_OFFSET (CSL_MCU_PLL_MMR_CFG_PLL1_HSDIV_CTRL3)
70#define UFP_UART_PLL_DIV_OFFSET (CSL_MCU_PLL_MMR_CFG_PLL1_HSDIV_CTRL3) 70#define UFP_UART_PLL_DIV_VAL (0x00008031)
71#define UFP_UART_PLL_DIV_VAL (0x00008031) 71#define UFP_UART_PLL_KICK0_UNLOCK_VAL (0x68EF3490)
72#define UFP_UART_PLL_KICK0_UNLOCK_VAL (0x68EF3490) 72#define UFP_UART_PLL_KICK1_UNLOCK_VAL (0xD172BC5A)
73#define UFP_UART_PLL_KICK1_UNLOCK_VAL (0xD172BC5A) 73#define UFP_UART_PLL_KICK_LOCK_VAL (0x0)
74#define UFP_UART_PLL_KICK_LOCK_VAL (0x0) 74#define UFP_MCU_ARMSS_ATCM_BASE (CSL_MCU_ARMSS_ATCM_BASE)
75#define UFP_MCU_ARMSS_ATCM_BASE (CSL_MCU_ARMSS_ATCM_BASE) 75#elif defined(SOC_AM65XX)
76#elif defined(SOC_AM65XX) 76#define UFP_MCU_ARMSS_ATCM_BASE (CSL_MCU_ATCM_BASE)
77#define UFP_MCU_ARMSS_ATCM_BASE (CSL_MCU_ATCM_BASE) 77#endif
78#endif 78
79 79#define UFP_ROM_UART_MODULE_INPUT_CLK (48000000U)
80#define UFP_ROM_UART_MODULE_INPUT_CLK (48000000U) 80#define UFP_SYSFW_UART_MODULE_INPUT_CLK (96000000U)
81#define UFP_SYSFW_UART_MODULE_INPUT_CLK (96000000U) 81
82 82#define UFP_SYSFW_NOT_PROCESSED (0x0U)
83#define UFP_SYSFW_NOT_PROCESSED (0x0U) 83#define UFP_SYSFW_CLEAR_TEXT (0x55555555u)
84#define UFP_SYSFW_CLEAR_TEXT (0x55555555u) 84#define UFP_SYSFW_ENCRYPTED (0xAAAAAAAAu)
85#define UFP_SYSFW_ENCRYPTED (0xAAAAAAAAu) 85#define UFP_SYSFW_MAX_SIZE (0x41000U)
86#define UFP_SYSFW_MAX_SIZE (0x41000U) 86
87 87#define UFP_MAIN_DEVSTAT_ADDR (CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_MAIN_DEVSTAT)
88#define UFP_MAIN_DEVSTAT_ADDR (CSL_CTRL_MMR0_CFG0_BASE + CSL_MAIN_CTRL_MMR_CFG0_MAIN_DEVSTAT) 88#define UFP_WKUP_DEVSTAT_ADDR (CSL_WKUP_CTRL_MMR0_CFG0_BASE + CSL_WKUP_CTRL_MMR_CFG0_WKUP_DEVSTAT)
89#define UFP_WKUP_DEVSTAT_ADDR (CSL_WKUP_CTRL_MMR0_CFG0_BASE + CSL_WKUP_CTRL_MMR_CFG0_WKUP_DEVSTAT) 89
90 90#if defined(SOC_J721E)
91#if defined(SOC_J721E) 91#define UFP_MAIN_DEVSTAT_NOBOOT_CFG (0x1U)
92#define UFP_MAIN_DEVSTAT_NOBOOT_CFG (0x1U) 92#define UFP_WKUP_DEVSTAT_NOBOOT_CFG (0x38U)
93#define UFP_WKUP_DEVSTAT_NOBOOT_CFG (0x38U) 93#define UFP_MAIN_DEVSTAT_NOBOOT_MASK (0xEFU)
94#define UFP_MAIN_DEVSTAT_NOBOOT_MASK (0xEFU) 94#define UFP_WKUP_DEVSTAT_NOBOOT_MASK (0xF8U)
95#define UFP_WKUP_DEVSTAT_NOBOOT_MASK (0xF8U) 95#else
96#else 96#define UFP_MAIN_DEVSTAT_NOBOOT_CFG (0)
97#define UFP_MAIN_DEVSTAT_NOBOOT_CFG (0) 97#define UFP_WKUP_DEVSTAT_NOBOOT_CFG (0)
98#define UFP_WKUP_DEVSTAT_NOBOOT_CFG (0) 98#define UFP_MAIN_DEVSTAT_NOBOOT_MASK (0xFFU)
99#define UFP_MAIN_DEVSTAT_NOBOOT_MASK (0xFFU) 99#define UFP_WKUP_DEVSTAT_NOBOOT_MASK (0)
100#define UFP_WKUP_DEVSTAT_NOBOOT_MASK (0) 100#endif
101#endif 101
102 102#ifdef __cplusplus
103#ifdef __cplusplus 103}
104} 104#endif
105#endif 105
106 106#endif /* _SOC_K3_H_ */
107#endif /* _SOC_K3_H_ */
diff --git a/packages/ti/boot/sbl/build/sbl_img.mk b/packages/ti/boot/sbl/build/sbl_img.mk
index 045b63b70..00842acea 100755
--- a/packages/ti/boot/sbl/build/sbl_img.mk
+++ b/packages/ti/boot/sbl/build/sbl_img.mk
@@ -35,9 +35,6 @@ INCLUDE_EXTERNAL_INTERFACES = pdk
35 35
36# List all the components required by the application 36# List all the components required by the application
37COMP_LIST_COMMON += board uart osal_nonos csl csl_init i2c sciclient$(HS_SUFFIX) 37COMP_LIST_COMMON += board uart osal_nonos csl csl_init i2c sciclient$(HS_SUFFIX)
38ifeq ($(BUILD_HS),yes)
39 SBL_CFLAGS += -DBUILD_HS
40endif
41 38
42CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(SBL_CFLAGS) 39CFLAGS_LOCAL_COMMON = $(PDK_CFLAGS) $(SBL_CFLAGS)
43 40
diff --git a/packages/ti/boot/sbl/example/k3MulticoreApp/sbl_boot_perf_benchmark.h b/packages/ti/boot/sbl/example/k3MulticoreApp/sbl_boot_perf_benchmark.h
index 2b3c41634..e09cc1615 100644
--- a/packages/ti/boot/sbl/example/k3MulticoreApp/sbl_boot_perf_benchmark.h
+++ b/packages/ti/boot/sbl/example/k3MulticoreApp/sbl_boot_perf_benchmark.h
@@ -30,7 +30,6 @@
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */ 31 */
32 32
33#include <ti/drv/sciclient/src/sciclient_priv.h>
34#include <stdio.h> 33#include <stdio.h>
35#include "sbl_profile.h" 34#include "sbl_profile.h"
36#include "sbl_soc_cfg.h" 35#include "sbl_soc_cfg.h"
diff --git a/packages/ti/boot/sbl/example/k3MulticoreApp/sbl_mcu_0_boot_perf_benchmark.c b/packages/ti/boot/sbl/example/k3MulticoreApp/sbl_mcu_0_boot_perf_benchmark.c
index 3535ecc98..3c8db4f4d 100644
--- a/packages/ti/boot/sbl/example/k3MulticoreApp/sbl_mcu_0_boot_perf_benchmark.c
+++ b/packages/ti/boot/sbl/example/k3MulticoreApp/sbl_mcu_0_boot_perf_benchmark.c
@@ -161,6 +161,7 @@ static int32_t BOOT_PERF_TEST_sysfwInit(void)
161 int32_t status = CSL_PASS; 161 int32_t status = CSL_PASS;
162 uint32_t dev_id = HW_RD_REG32((CSL_WKUP_CTRL_MMR0_CFG0_BASE 162 uint32_t dev_id = HW_RD_REG32((CSL_WKUP_CTRL_MMR0_CFG0_BASE
163 + CSL_WKUP_CTRL_MMR_CFG0_JTAGID)); 163 + CSL_WKUP_CTRL_MMR_CFG0_JTAGID));
164 Sciclient_DefaultBoardCfgInfo_t boardCfgInfo;
164 165
165#if defined(SBL_SKIP_SYSFW_INIT) 166#if defined(SBL_SKIP_SYSFW_INIT)
166 void *sysfw_ptr = (void *)&syfw_image; 167 void *sysfw_ptr = (void *)&syfw_image;
@@ -172,46 +173,16 @@ static int32_t BOOT_PERF_TEST_sysfwInit(void)
172#endif 173#endif
173 174
174#if defined(SBL_SKIP_SYSFW_INIT) || defined(SBL_SKIP_BRD_CFG_BOARD) || defined(SBL_ENABLE_DEV_GRP_MCU) 175#if defined(SBL_SKIP_SYSFW_INIT) || defined(SBL_SKIP_BRD_CFG_BOARD) || defined(SBL_ENABLE_DEV_GRP_MCU)
175 Sciclient_BoardCfgPrms_t sblPerfTestBoardCfgPrms = 176 Sciclient_BoardCfgPrms_t sblPerfTestBoardCfgPrms;
176 {
177 .boardConfigLow = (uint32_t)&sblPerfTestBoardCfg,
178 .boardConfigHigh = 0,
179 .boardConfigSize = SCICLIENT_BOARDCFG_SIZE_IN_BYTES,
180 .devGrp = SBL_PERF_TEST_DEVGRP
181 };
182
183 Sciclient_BoardCfgPrms_t sblPerfTestBoardCfgPmPrms = 177 Sciclient_BoardCfgPrms_t sblPerfTestBoardCfgPmPrms =
184 { 178 {
185 .boardConfigLow = (uint32_t)NULL, 179 .boardConfigLow = (uint32_t)NULL,
186 .boardConfigHigh = 0, 180 .boardConfigHigh = 0,
187 .boardConfigSize = 0, 181 .boardConfigSize = 0,
188 .devGrp = SBL_PERF_TEST_DEVGRP 182 .devGrp = SBL_PERF_TEST_DEVGRP
189 };
190
191 Sciclient_BoardCfgPrms_t sblPerfTestBoardCfgRmPrms =
192 {
193 .boardConfigLow = (uint32_t)&sblPerfTestBoardCfg_rm,
194 .boardConfigHigh = 0,
195 .boardConfigSize = SCICLIENT_BOARDCFG_RM_SIZE_IN_BYTES,
196 .devGrp = SBL_PERF_TEST_DEVGRP
197 };
198
199#if defined(SOC_AM65XX)
200 /* Overwrite the cfg size for AM65xx SR2 */
201 if (dev_id == 0x1BB5A02F)
202 {
203 sblPerfTestBoardCfgRmPrms.boardConfigSize =
204 SCICLIENT_BOARDCFG_RM_SR2_SIZE_IN_BYTES;
205 }
206#endif
207
208 Sciclient_BoardCfgPrms_t sblPerfTestBoardCfgSecPrms =
209 {
210 .boardConfigLow = (uint32_t)&sblPerfTestBoardCfg_sec,
211 .boardConfigHigh = 0,
212 .boardConfigSize = SCICLIENT_BOARDCFG_SECURITY_SIZE_IN_BYTES,
213 .devGrp = SBL_PERF_TEST_DEVGRP
214 }; 183 };
184 Sciclient_BoardCfgPrms_t sblPerfTestBoardCfgRmPrms;
185 Sciclient_BoardCfgPrms_t sblPerfTestBoardCfgSecPrms;
215#endif 186#endif
216 187
217 BOOT_PERF_TEST_CacheCleanInvalidateDcacheSetWay(); 188 BOOT_PERF_TEST_CacheCleanInvalidateDcacheSetWay();
@@ -234,11 +205,21 @@ static int32_t BOOT_PERF_TEST_sysfwInit(void)
234 } 205 }
235#endif 206#endif
236 207
208 status = Sciclient_getDefaultBoardCfgInfo(&boardCfgInfo);
209 if (status != CSL_PASS)
210 {
211 return CSL_EFAIL;
212 }
213
237#if defined(SBL_SKIP_SYSFW_INIT) || defined(SBL_SKIP_BRD_CFG_BOARD) || defined(SBL_ENABLE_DEV_GRP_MCU) 214#if defined(SBL_SKIP_SYSFW_INIT) || defined(SBL_SKIP_BRD_CFG_BOARD) || defined(SBL_ENABLE_DEV_GRP_MCU)
238 215
216 sblPerfTestBoardCfgPrms.boardConfigLow = (uint32_t)&sblPerfTestBoardCfg;
217 sblPerfTestBoardCfgPrms.boardConfigHigh = 0;
218 sblPerfTestBoardCfgPrms.boardConfigSize = boardCfgInfo.boardCfgLowSize;
219 sblPerfTestBoardCfgPrms.devGrp = SBL_PERF_TEST_DEVGRP;
239 memcpy((void *)&sblPerfTestBoardCfg, 220 memcpy((void *)&sblPerfTestBoardCfg,
240 (void *)gSciclient_boardCfgLow, 221 (const void *)boardCfgInfo.boardCfgLow,
241 sblPerfTestBoardCfgPrms.boardConfigSize); 222 sblPerfTestBoardCfgPrms.boardConfigSize);
242 223
243 /* Redirect DMSC logs to UART 0 */ 224 /* Redirect DMSC logs to UART 0 */
244 sblPerfTestBoardCfg.debug_cfg.trace_dst_enables = TISCI_BOARDCFG_TRACE_DST_UART0; 225 sblPerfTestBoardCfg.debug_cfg.trace_dst_enables = TISCI_BOARDCFG_TRACE_DST_UART0;
@@ -275,13 +256,17 @@ static int32_t BOOT_PERF_TEST_sysfwInit(void)
275#endif 256#endif
276 257
277#if defined(SBL_SKIP_SYSFW_INIT) || defined(SBL_SKIP_BRD_CFG_RM) || defined(SBL_ENABLE_DEV_GRP_MCU) 258#if defined(SBL_SKIP_SYSFW_INIT) || defined(SBL_SKIP_BRD_CFG_RM) || defined(SBL_ENABLE_DEV_GRP_MCU)
259
260 sblPerfTestBoardCfgRmPrms.boardConfigLow = (uint32_t)&sblPerfTestBoardCfg_rm;
261 sblPerfTestBoardCfgRmPrms.boardConfigHigh = 0;
262 sblPerfTestBoardCfgRmPrms.boardConfigSize = boardCfgInfo.boardCfgLowRmSize;
263 sblPerfTestBoardCfgRmPrms.devGrp = SBL_PERF_TEST_DEVGRP;
278 memcpy((void *)&sblPerfTestBoardCfg_rm, 264 memcpy((void *)&sblPerfTestBoardCfg_rm,
279 (void *)gSciclient_boardCfgLow_rm, 265 (const void *)boardCfgInfo.boardCfgLowRm,
280 sblPerfTestBoardCfgRmPrms.boardConfigSize); 266 sblPerfTestBoardCfgRmPrms.boardConfigSize);
281 267
282 BOOT_PERF_TEST_CacheCleanInvalidateDcacheSetWay(); 268 BOOT_PERF_TEST_CacheCleanInvalidateDcacheSetWay();
283 status = Sciclient_boardCfgRm(&sblPerfTestBoardCfgRmPrms); 269 status = Sciclient_boardCfgRm(&sblPerfTestBoardCfgRmPrms);
284
285 if (status != CSL_PASS) 270 if (status != CSL_PASS)
286 { 271 {
287 return CSL_EFAIL; 272 return CSL_EFAIL;
@@ -294,13 +279,16 @@ static int32_t BOOT_PERF_TEST_sysfwInit(void)
294 } 279 }
295 280
296#if defined(SBL_SKIP_SYSFW_INIT) || defined(SBL_SKIP_BRD_CFG_SEC) || defined(SBL_ENABLE_DEV_GRP_MCU) 281#if defined(SBL_SKIP_SYSFW_INIT) || defined(SBL_SKIP_BRD_CFG_SEC) || defined(SBL_ENABLE_DEV_GRP_MCU)
282 sblPerfTestBoardCfgSecPrms.boardConfigLow = (uint32_t)&sblPerfTestBoardCfg_sec;
283 sblPerfTestBoardCfgSecPrms.boardConfigHigh = 0;
284 sblPerfTestBoardCfgSecPrms.boardConfigSize = boardCfgInfo.boardCfgLowSecSize;
285 sblPerfTestBoardCfgSecPrms.devGrp = SBL_PERF_TEST_DEVGRP;
297 memcpy((void *)&sblPerfTestBoardCfg_sec, 286 memcpy((void *)&sblPerfTestBoardCfg_sec,
298 (void *)gSciclient_boardCfgLow_sec, 287 (const void *)boardCfgInfo.boardCfgLowSec,
299 sblPerfTestBoardCfgSecPrms.boardConfigSize); 288 sblPerfTestBoardCfgSecPrms.boardConfigSize);
300 289
301 BOOT_PERF_TEST_CacheCleanInvalidateDcacheSetWay(); 290 BOOT_PERF_TEST_CacheCleanInvalidateDcacheSetWay();
302 status = Sciclient_boardCfgSec(&sblPerfTestBoardCfgSecPrms); 291 status = Sciclient_boardCfgSec(&sblPerfTestBoardCfgSecPrms);
303
304 if (status != CSL_PASS) 292 if (status != CSL_PASS)
305 { 293 {
306 return CSL_EFAIL; 294 return CSL_EFAIL;
diff --git a/packages/ti/boot/sbl/sbl_component.mk b/packages/ti/boot/sbl/sbl_component.mk
index 598cc889d..3cb86d193 100755
--- a/packages/ti/boot/sbl/sbl_component.mk
+++ b/packages/ti/boot/sbl/sbl_component.mk
@@ -362,7 +362,6 @@ export sbl_hyperflash_img_hs_SBL_IMAGEGEN = yes
362sbl_uart_img_COMP_LIST = sbl_uart_img 362sbl_uart_img_COMP_LIST = sbl_uart_img
363sbl_uart_img_RELPATH = ti/boot/sbl/board/k3 363sbl_uart_img_RELPATH = ti/boot/sbl/board/k3
364sbl_uart_img_CUSTOM_BINPATH = $(PDK_SBL_COMP_PATH)/binary/$(BOARD)/uart/bin 364sbl_uart_img_CUSTOM_BINPATH = $(PDK_SBL_COMP_PATH)/binary/$(BOARD)/uart/bin
365sbl_uart_img_OBJPATH = $(DEST_ROOT)/sbl_uart_img/obj
366sbl_uart_img_PATH = $(PDK_SBL_COMP_PATH)/board/k3 365sbl_uart_img_PATH = $(PDK_SBL_COMP_PATH)/board/k3
367sbl_uart_img_MAKEFILE = -f$(PDK_SBL_COMP_PATH)/build/sbl_img.mk BOOTMODE=uart SBL_USE_DMA=yes BUILD_HS=no 366sbl_uart_img_MAKEFILE = -f$(PDK_SBL_COMP_PATH)/build/sbl_img.mk BOOTMODE=uart SBL_USE_DMA=yes BUILD_HS=no
368export sbl_uart_img_MAKEFILE 367export sbl_uart_img_MAKEFILE
@@ -383,7 +382,7 @@ export sbl_uart_img_$(SOC)_CORELIST
383sbl_uart_img_SBL_IMAGEGEN = yes 382sbl_uart_img_SBL_IMAGEGEN = yes
384export sbl_uart_img_SBL_IMAGEGEN 383export sbl_uart_img_SBL_IMAGEGEN
385 384
386# SBL HYPERFLASH Image - For HS build 385# SBL UART Image - For HS build
387export sbl_uart_img_hs_COMP_LIST = sbl_uart_img_hs 386export sbl_uart_img_hs_COMP_LIST = sbl_uart_img_hs
388sbl_uart_img_hs_RELPATH = ti/boot/sbl/board/k3 387sbl_uart_img_hs_RELPATH = ti/boot/sbl/board/k3
389sbl_uart_img_hs_CUSTOM_BINPATH = $(PDK_SBL_COMP_PATH)/binary/$(BOARD)_hs/uart/bin 388sbl_uart_img_hs_CUSTOM_BINPATH = $(PDK_SBL_COMP_PATH)/binary/$(BOARD)_hs/uart/bin
@@ -688,7 +687,7 @@ endif
688# SBL Custom LIB 687# SBL Custom LIB
689sbl_lib_cust_COMP_LIST = sbl_lib_cust 688sbl_lib_cust_COMP_LIST = sbl_lib_cust
690sbl_lib_cust_RELPATH = ti/boot/sbl 689sbl_lib_cust_RELPATH = ti/boot/sbl
691export sbl_lib_cust_OBJPATH = $(DEST_ROOT)/sbl_lib_cust/obj 690export sbl_lib_cust_OBJPATH = ti/boot/sbl/cust
692sbl_lib_cust_LIBNAME = sbl_lib_cust 691sbl_lib_cust_LIBNAME = sbl_lib_cust
693sbl_lib_cust_PATH = $(PDK_SBL_COMP_PATH) 692sbl_lib_cust_PATH = $(PDK_SBL_COMP_PATH)
694sbl_lib_cust_LIBNAME = sbl_lib_cust 693sbl_lib_cust_LIBNAME = sbl_lib_cust
diff --git a/packages/ti/boot/sbl/soc/k3/sbl_sci_client.c b/packages/ti/boot/sbl/soc/k3/sbl_sci_client.c
index 579a564b8..5681fad59 100755
--- a/packages/ti/boot/sbl/soc/k3/sbl_sci_client.c
+++ b/packages/ti/boot/sbl/soc/k3/sbl_sci_client.c
@@ -67,7 +67,7 @@ uint32_t SBL_IsAuthReq(void)
67 67
68 /* No auth possible, if valid SMPK/BMPK is not present */ 68 /* No auth possible, if valid SMPK/BMPK is not present */
69 if ((dev_subtype == SBL_SYS_STATUS_DEV_SUBTYPE_FS) || 69 if ((dev_subtype == SBL_SYS_STATUS_DEV_SUBTYPE_FS) ||
70 (dev_type == SBL_SYS_STATUS_DEV_TYPE_GP) || 70 (dev_type == SBL_SYS_STATUS_DEV_TYPE_GP) ||
71 (dev_type == SBL_SYS_STATUS_DEV_TYPE_TEST)) 71 (dev_type == SBL_SYS_STATUS_DEV_TYPE_TEST))
72 { 72 {
73 retVal = SBL_NEVER_AUTH_APP; 73 retVal = SBL_NEVER_AUTH_APP;
@@ -85,40 +85,13 @@ void SBL_SciClientInit(void)
85 85
86#ifndef SBL_SKIP_SYSFW_INIT 86#ifndef SBL_SKIP_SYSFW_INIT
87 /* SYSFW board configurations */ 87 /* SYSFW board configurations */
88 Sciclient_BoardCfgPrms_t sblBoardCfgPrms = 88 Sciclient_DefaultBoardCfgInfo_t boardCfgInfo;
89 { 89 Sciclient_BoardCfgPrms_t sblBoardCfgPrms;
90 .boardConfigLow = (uint32_t)gSciclient_boardCfgLow, 90 Sciclient_BoardCfgPrms_t sblBoardCfgPmPrms;
91 .boardConfigHigh = 0, 91 Sciclient_BoardCfgPrms_t sblBoardCfgRmPrms;
92 .boardConfigSize = SCICLIENT_BOARDCFG_SIZE_IN_BYTES,
93 .devGrp = SBL_DEVGRP
94 };
95
96 Sciclient_BoardCfgPrms_t sblBoardCfgPmPrms =
97 {
98 .boardConfigLow = (uint32_t)gSciclient_boardCfgLow_pm,
99 .boardConfigHigh = 0,
100 .boardConfigSize = SCICLIENT_BOARDCFG_PM_SIZE_IN_BYTES,
101 .devGrp = SBL_DEVGRP
102 };
103
104 Sciclient_BoardCfgPrms_t sblBoardCfgRmPrms =
105 {
106 .boardConfigLow = (uint32_t)gSciclient_boardCfgLow_rm,
107 .boardConfigHigh = 0,
108 .boardConfigSize = SCICLIENT_BOARDCFG_RM_SIZE_IN_BYTES,
109 .devGrp = SBL_DEVGRP
110 };
111
112#ifndef SBL_SKIP_BRD_CFG_SEC 92#ifndef SBL_SKIP_BRD_CFG_SEC
113 Sciclient_BoardCfgPrms_t sblBoardCfgSecPrms = 93 Sciclient_BoardCfgPrms_t sblBoardCfgSecPrms;
114 {
115 .boardConfigLow = (uint32_t)gSciclient_boardCfgLow_sec,
116 .boardConfigHigh = 0,
117 .boardConfigSize = SCICLIENT_BOARDCFG_SECURITY_SIZE_IN_BYTES,
118 .devGrp = SBL_DEVGRP
119 };
120#endif 94#endif
121
122 Sciclient_ConfigPrms_t config = 95 Sciclient_ConfigPrms_t config =
123 { 96 {
124 SCICLIENT_SERVICE_OPERATION_MODE_POLLED, 97 SCICLIENT_SERVICE_OPERATION_MODE_POLLED,
@@ -135,8 +108,15 @@ void SBL_SciClientInit(void)
135 } 108 }
136 109
137#ifndef SBL_SKIP_SYSFW_INIT 110#ifndef SBL_SKIP_SYSFW_INIT
138
139 SBL_ADD_PROFILE_POINT; 111 SBL_ADD_PROFILE_POINT;
112
113 status = Sciclient_getDefaultBoardCfgInfo(&boardCfgInfo);
114 if (status != CSL_PASS)
115 {
116 SBL_log(SBL_LOG_ERR,"SYSFW get default board config...FAILED \n");
117 SblErrLoop(__FILE__, __LINE__);
118 }
119
140 status = Sciclient_loadFirmware((const uint32_t *) sysfw_ptr); 120 status = Sciclient_loadFirmware((const uint32_t *) sysfw_ptr);
141 if (status != CSL_PASS) 121 if (status != CSL_PASS)
142 { 122 {
@@ -154,6 +134,10 @@ void SBL_SciClientInit(void)
154 134
155#ifndef SBL_SKIP_BRD_CFG_BOARD 135#ifndef SBL_SKIP_BRD_CFG_BOARD
156 SBL_ADD_PROFILE_POINT; 136 SBL_ADD_PROFILE_POINT;
137 sblBoardCfgPrms.boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLow;
138 sblBoardCfgPrms.boardConfigHigh = 0;
139 sblBoardCfgPrms.boardConfigSize = boardCfgInfo.boardCfgLowSize;
140 sblBoardCfgPrms.devGrp = SBL_DEVGRP;
157 status = Sciclient_boardCfg(&sblBoardCfgPrms); 141 status = Sciclient_boardCfg(&sblBoardCfgPrms);
158 if (status != CSL_PASS) 142 if (status != CSL_PASS)
159 { 143 {
@@ -169,13 +153,17 @@ void SBL_SciClientInit(void)
169 UART_stdioDeInit(); 153 UART_stdioDeInit();
170 } 154 }
171 SBL_ADD_PROFILE_POINT; 155 SBL_ADD_PROFILE_POINT;
156 sblBoardCfgPmPrms.boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLowPm;
157 sblBoardCfgPmPrms.boardConfigHigh = 0;
158 sblBoardCfgPmPrms.boardConfigSize = boardCfgInfo.boardCfgLowPmSize;
159 sblBoardCfgPmPrms.devGrp = SBL_DEVGRP;
172 status = Sciclient_boardCfgPm(&sblBoardCfgPmPrms); 160 status = Sciclient_boardCfgPm(&sblBoardCfgPmPrms);
173 if (status != CSL_PASS) 161 if (status != CSL_PASS)
174 { 162 {
175 SBL_log(SBL_LOG_ERR,"SYSFW board config pm...FAILED \n") 163 SBL_log(SBL_LOG_ERR,"SYSFW board config pm...FAILED \n")
176 SblErrLoop(__FILE__, __LINE__); 164 SblErrLoop(__FILE__, __LINE__);
177 } 165 }
178 166
179 if (SBL_LOG_LEVEL > SBL_LOG_NONE) 167 if (SBL_LOG_LEVEL > SBL_LOG_NONE)
180 { 168 {
181 /* Re-init UART for logging */ 169 /* Re-init UART for logging */
@@ -191,6 +179,10 @@ void SBL_SciClientInit(void)
191 179
192#ifndef SBL_SKIP_BRD_CFG_RM 180#ifndef SBL_SKIP_BRD_CFG_RM
193 SBL_ADD_PROFILE_POINT; 181 SBL_ADD_PROFILE_POINT;
182 sblBoardCfgRmPrms.boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLowRm;
183 sblBoardCfgRmPrms.boardConfigHigh = 0;
184 sblBoardCfgRmPrms.boardConfigSize = boardCfgInfo.boardCfgLowRmSize;
185 sblBoardCfgRmPrms.devGrp = SBL_DEVGRP;
194 status = Sciclient_boardCfgRm(&sblBoardCfgRmPrms); 186 status = Sciclient_boardCfgRm(&sblBoardCfgRmPrms);
195 if (status != CSL_PASS) 187 if (status != CSL_PASS)
196 { 188 {
@@ -201,6 +193,10 @@ void SBL_SciClientInit(void)
201 193
202#ifndef SBL_SKIP_BRD_CFG_SEC 194#ifndef SBL_SKIP_BRD_CFG_SEC
203 SBL_ADD_PROFILE_POINT; 195 SBL_ADD_PROFILE_POINT;
196 sblBoardCfgSecPrms.boardConfigLow = (uint32_t)boardCfgInfo.boardCfgLowSec;
197 sblBoardCfgSecPrms.boardConfigHigh = 0;
198 sblBoardCfgSecPrms.boardConfigSize = boardCfgInfo.boardCfgLowSecSize;
199 sblBoardCfgSecPrms.devGrp = SBL_DEVGRP;
204 status = Sciclient_boardCfgSec(&sblBoardCfgSecPrms); 200 status = Sciclient_boardCfgSec(&sblBoardCfgSecPrms);
205 if (status != CSL_PASS) 201 if (status != CSL_PASS)
206 { 202 {
@@ -261,8 +257,8 @@ void SBL_SciClientInit(void)
261#endif 257#endif
262#endif 258#endif
263 259
264 260
265#endif 261#endif
266 262
267 SBL_ADD_PROFILE_POINT; 263 SBL_ADD_PROFILE_POINT;
268} 264}
diff --git a/packages/ti/boot/sbl/soc/k3/sbl_sci_client.h b/packages/ti/boot/sbl/soc/k3/sbl_sci_client.h
index 682b10ba3..f8f682b47 100755
--- a/packages/ti/boot/sbl/soc/k3/sbl_sci_client.h
+++ b/packages/ti/boot/sbl/soc/k3/sbl_sci_client.h
@@ -38,7 +38,6 @@
38#include "sbl_profile.h" 38#include "sbl_profile.h"
39#include <ti/board/board.h> 39#include <ti/board/board.h>
40#include <ti/drv/sciclient/sciclient.h> 40#include <ti/drv/sciclient/sciclient.h>
41#include <ti/drv/sciclient/src/sciclient_priv.h>
42 41
43#ifdef __cplusplus 42#ifdef __cplusplus
44extern "C" { 43extern "C" {
@@ -96,7 +95,7 @@ int32_t SBL_ReadSysfwImage(void **pBuffer, uint32_t num_bytes);
96uint32_t SBL_IsAuthReq(void); 95uint32_t SBL_IsAuthReq(void);
97 96
98extern const struct tisci_boardcfg_pm gBoardConfigLow_pm; 97extern const struct tisci_boardcfg_pm gBoardConfigLow_pm;
99 98
100#ifdef __cplusplus 99#ifdef __cplusplus
101} 100}
102#endif /* __cplusplus */ 101#endif /* __cplusplus */
diff --git a/packages/ti/drv/sciclient/include/sciclient_boardcfg.h b/packages/ti/drv/sciclient/include/sciclient_boardcfg.h
index d6d0a3eea..4ee719df9 100755
--- a/packages/ti/drv/sciclient/include/sciclient_boardcfg.h
+++ b/packages/ti/drv/sciclient/include/sciclient_boardcfg.h
@@ -1,149 +1,149 @@
1/* 1/*
2 * Copyright (C) 2017-2018 Texas Instruments Incorporated 2 * Copyright (C) 2017-2018 Texas Instruments Incorporated
3 * 3 *
4 * Redistribution and use in source and binary forms, with or without 4 * Redistribution and use in source and binary forms, with or without
5 * modification, are permitted provided that the following conditions 5 * modification, are permitted provided that the following conditions
6 * are met: 6 * are met:
7 * 7 *
8 * Redistributions of source code must retain the above copyright 8 * Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer. 9 * notice, this list of conditions and the following disclaimer.
10 * 10 *
11 * Redistributions in binary form must reproduce the above copyright 11 * Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the 12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the 13 * documentation and/or other materials provided with the
14 * distribution. 14 * distribution.
15 * 15 *
16 * Neither the name of Texas Instruments Incorporated nor the names of 16 * Neither the name of Texas Instruments Incorporated nor the names of
17 * its contributors may be used to endorse or promote products derived 17 * its contributors may be used to endorse or promote products derived
18 * from this software without specific prior written permission. 18 * from this software without specific prior written permission.
19 * 19 *
20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 21 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 22 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 23 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 24 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * 31 *
32 */ 32 */
33 33
34/** 34/**
35 * \file sciclient_boardcfg.h 35 * \file sciclient_boardcfg.h
36 * 36 *
37 * \brief Wrapper function to send the board configuration message to DMSC. 37 * \brief Wrapper function to send the board configuration message to DMSC.
38 */ 38 */
39#ifndef SCICLIENT_BOARDCFG_H_ 39#ifndef SCICLIENT_BOARDCFG_H_
40#define SCICLIENT_BOARDCFG_H_ 40#define SCICLIENT_BOARDCFG_H_
41 41
42/* ========================================================================== */ 42/* ========================================================================== */
43/* Include Files */ 43/* Include Files */
44/* ========================================================================== */ 44/* ========================================================================== */
45#include <stdint.h> 45#include <stdint.h>
46 46
47#ifdef __cplusplus 47#ifdef __cplusplus
48extern "C" { 48extern "C" {
49#endif 49#endif
50 50
51/* ========================================================================== */ 51/* ========================================================================== */
52/* Structure Declarations */ 52/* Structure Declarations */
53/* ========================================================================== */ 53/* ========================================================================== */
54/** 54/**
55 * \brief Parameters for #Sciclient_boardCfg 55 * \brief Parameters for #Sciclient_boardCfg
56 * Pointer to this is passed to #Sciclient_boardCfg. 56 * Pointer to this is passed to #Sciclient_boardCfg.
57 */ 57 */
58typedef struct 58typedef struct
59{ 59{
60 const uint32_t boardConfigLow; 60 uint32_t boardConfigLow;
61 /**< Low 32-bits of physical pointer to \#tisci_boardConfig / 61 /**< Low 32-bits of physical pointer to \#tisci_boardConfig /
62 \#tisci_boardcfg_pm / \#local_rm_boardcfg / \#tisci_boardcfg_sec . 62 \#tisci_boardcfg_pm / \#local_rm_boardcfg / \#tisci_boardcfg_sec .
63 struct. 63 struct.
64 */ 64 */
65 const uint32_t boardConfigHigh; 65 uint32_t boardConfigHigh;
66 /**< High 32-bits of physical pointer to \#tisci_boardConfig / 66 /**< High 32-bits of physical pointer to \#tisci_boardConfig /
67 \#tisci_boardcfg_pm / \#local_rm_boardcfg / \#tisci_boardcfg_sec . 67 \#tisci_boardcfg_pm / \#local_rm_boardcfg / \#tisci_boardcfg_sec .
68 struct. 68 struct.
69 */ 69 */
70 const uint16_t boardConfigSize; 70 uint16_t boardConfigSize;
71 /**< (uint16_t) sizeof(<board configuration structure>) */ 71 /**< (uint16_t) sizeof(<board configuration structure>) */
72 const uint8_t devGrp; 72 uint8_t devGrp;
73 /**< SoC defined SYSFW devgrp. Example: #DEVGRP_ALL 73 /**< SoC defined SYSFW devgrp. Example: #DEVGRP_ALL
74 */ 74 */
75} Sciclient_BoardCfgPrms_t; 75} Sciclient_BoardCfgPrms_t;
76 76
77/* ========================================================================== */ 77/* ========================================================================== */
78/* Function Declarations */ 78/* Function Declarations */
79/* ========================================================================== */ 79/* ========================================================================== */
80/** 80/**
81 * \brief One time board configuration to be done from R5. 81 * \brief One time board configuration to be done from R5.
82 * 82 *
83 * User needs to define a section ".boardcfg_data" in the 83 * User needs to define a section ".boardcfg_data" in the
84 * linker file for the default configuration, which needs to be present 84 * linker file for the default configuration, which needs to be present
85 * in OCMRAM . If user provides custom board_cfg, then the data must 85 * in OCMRAM . If user provides custom board_cfg, then the data must
86 * be present on OCMRAM. 86 * be present on OCMRAM.
87 * 87 *
88 * \param pInPrms [IN] Pointer to #Sciclient_BoardCfgPrms_t . NULL 88 * \param pInPrms [IN] Pointer to #Sciclient_BoardCfgPrms_t . NULL
89 * results in default config. 89 * results in default config.
90 * 90 *
91 * \return CSL_PASS on success, else failure . 91 * \return CSL_PASS on success, else failure .
92 * 92 *
93 * 93 *
94 */ 94 */
95int32_t Sciclient_boardCfg(const Sciclient_BoardCfgPrms_t * pInPrms); 95int32_t Sciclient_boardCfg(const Sciclient_BoardCfgPrms_t * pInPrms);
96 96
97/** 97/**
98 * \brief One time board configuration to be done from R5 for PM. 98 * \brief One time board configuration to be done from R5 for PM.
99 * User needs to define a section ".boardcfg_data" in the 99 * User needs to define a section ".boardcfg_data" in the
100 * linker file for the default configuration, which needs to be present 100 * linker file for the default configuration, which needs to be present
101 * in OCMRAM . If user provides custom board_cfg, then the data must 101 * in OCMRAM . If user provides custom board_cfg, then the data must
102 * be present on OCMRAM. 102 * be present on OCMRAM.
103 * 103 *
104 * \param pInPrms [IN] Pointer to \#Sciclient_BoardCfgPrms_t . NULL 104 * \param pInPrms [IN] Pointer to \#Sciclient_BoardCfgPrms_t . NULL
105 * results in default config. 105 * results in default config.
106 * 106 *
107 * \return CSL_PASS on success, else failure . 107 * \return CSL_PASS on success, else failure .
108 * 108 *
109 * 109 *
110 */ 110 */
111int32_t Sciclient_boardCfgPm(const Sciclient_BoardCfgPrms_t * pInPrms); 111int32_t Sciclient_boardCfgPm(const Sciclient_BoardCfgPrms_t * pInPrms);
112 112
113/** 113/**
114 * \brief One time board configuration to be done from R5 for RM . 114 * \brief One time board configuration to be done from R5 for RM .
115 * User needs to define a section ".boardcfg_data" in the 115 * User needs to define a section ".boardcfg_data" in the
116 * linker file for the default configuration, which needs to be present 116 * linker file for the default configuration, which needs to be present
117 * in OCMRAM . If user provides custom board_cfg, then the data must 117 * in OCMRAM . If user provides custom board_cfg, then the data must
118 * be present on OCMRAM. 118 * be present on OCMRAM.
119 * 119 *
120 * \param pInPrms [IN] Pointer to \#Sciclient_BoardCfgPrms_t . NULL 120 * \param pInPrms [IN] Pointer to \#Sciclient_BoardCfgPrms_t . NULL
121 * results in default config. 121 * results in default config.
122 * 122 *
123 * \return CSL_PASS on success, else failure . 123 * \return CSL_PASS on success, else failure .
124 * 124 *
125 * 125 *
126 */ 126 */
127int32_t Sciclient_boardCfgRm(const Sciclient_BoardCfgPrms_t * pInPrms); 127int32_t Sciclient_boardCfgRm(const Sciclient_BoardCfgPrms_t * pInPrms);
128 128
129/** 129/**
130 * \brief One time board configuration to be done from R5 for SECURITY 130 * \brief One time board configuration to be done from R5 for SECURITY
131 * User needs to define a section ".boardcfg_data" in the 131 * User needs to define a section ".boardcfg_data" in the
132 * linker file for the default configuration, which needs to be present 132 * linker file for the default configuration, which needs to be present
133 * in OCMRAM . If user provides custom board_cfg, then the data must 133 * in OCMRAM . If user provides custom board_cfg, then the data must
134 * be present on OCMRAM. 134 * be present on OCMRAM.
135 * 135 *
136 * \param pInPrms [IN] Pointer to \#Sciclient_BoardCfgPrms_t . NULL 136 * \param pInPrms [IN] Pointer to \#Sciclient_BoardCfgPrms_t . NULL
137 * results in default config. 137 * results in default config.
138 * 138 *
139 * \return CSL_PASS on success, else failure . 139 * \return CSL_PASS on success, else failure .
140 * 140 *
141 * 141 *
142 */ 142 */
143int32_t Sciclient_boardCfgSec(const Sciclient_BoardCfgPrms_t * pInPrms); 143int32_t Sciclient_boardCfgSec(const Sciclient_BoardCfgPrms_t * pInPrms);
144 144
145#ifdef __cplusplus 145#ifdef __cplusplus
146} 146}
147#endif 147#endif
148 148
149#endif /* SCICLIENT_BOARDCFG_H_ */ 149#endif /* SCICLIENT_BOARDCFG_H_ */
diff --git a/packages/ti/drv/sciclient/sciclient.h b/packages/ti/drv/sciclient/sciclient.h
index 92d602826..de92aa079 100755
--- a/packages/ti/drv/sciclient/sciclient.h
+++ b/packages/ti/drv/sciclient/sciclient.h
@@ -421,6 +421,29 @@ typedef struct
421 /**< [IN] Size of the response payload(in bytes) */ 421 /**< [IN] Size of the response payload(in bytes) */
422} Sciclient_RespPrm_t; 422} Sciclient_RespPrm_t;
423 423
424/**
425 * \brief Input parameters for #Sciclient_service function.
426 */
427typedef struct
428{
429 const uint32_t *boardCfgLow;
430 /**< [OUT] Pointer to default board config */
431 const uint32_t *boardCfgLowRm;
432 /**< [OUT] Pointer to default board config for RM */
433 const uint32_t *boardCfgLowSec;
434 /**< [OUT] Pointer to default board config for Security */
435 const uint32_t *boardCfgLowPm;
436 /**< [OUT] Pointer to default board config for PM */
437 uint32_t boardCfgLowSize;
438 /**< [OUT] Size in bytes for default board config */
439 uint32_t boardCfgLowRmSize;
440 /**< [OUT] Size in bytes for default board config for RM */
441 uint32_t boardCfgLowSecSize;
442 /**< [OUT] Size in bytes for default board config for Security */
443 uint32_t boardCfgLowPmSize;
444 /**< [OUT] Size in bytes for default board config for PM */
445} Sciclient_DefaultBoardCfgInfo_t;
446
424/* ========================================================================== */ 447/* ========================================================================== */
425/* Function Declarations */ 448/* Function Declarations */
426/* ========================================================================== */ 449/* ========================================================================== */
@@ -514,6 +537,13 @@ int32_t Sciclient_deinit(void);
514 */ 537 */
515int32_t Sciclient_abiCheck(void); 538int32_t Sciclient_abiCheck(void);
516 539
540/**
541 * \brief API to get the default board config info.
542 *
543 * \return CSL_PASS on success, else failure
544 */
545int32_t Sciclient_getDefaultBoardCfgInfo(Sciclient_DefaultBoardCfgInfo_t *pBoardCfgInfo);
546
517/* 547/*
518 * Structure Init functions 548 * Structure Init functions
519 * 549 *
@@ -555,28 +585,28 @@ static inline void Sciclient_configPrmsInit(Sciclient_ConfigPrms_t *pCfgPrms)
555 * \defgroup TISCI Texas Instruments System Controller Interface 585 * \defgroup TISCI Texas Instruments System Controller Interface
556 * 586 *
557 * @{ 587 * @{
558 * 588 *
559 * ##Power and Clock Management Features 589 * ##Power and Clock Management Features
560 * Public APIs are provided to: 590 * Public APIs are provided to:
561 * 591 *
562 * - Enable and release a module, such as a UART or a core 592 * - Enable and release a module, such as a UART or a core
563 * - This configures both power and clock details for the module and keeps track of its usage. 593 * - This configures both power and clock details for the module and keeps track of its usage.
564 * - Configure the lowest/deepest low-power (sleep) mode allowed as well as EMIF details to enable self-refresh 594 * - Configure the lowest/deepest low-power (sleep) mode allowed as well as EMIF details to enable self-refresh
565 * - Query thermal sensors 595 * - Query thermal sensors
566 * 596 *
567 * ##Resource Management Features 597 * ##Resource Management Features
568 * Public APIs are provided to: 598 * Public APIs are provided to:
569 * 599 *
570 * - Manage DMA/Navigator Resources 600 * - Manage DMA/Navigator Resources
571 * - UDMAP 601 * - UDMAP
572 * - Ring Accelerator 602 * - Ring Accelerator
573 * - PSI-L 603 * - PSI-L
574 * - Proxy 604 * - Proxy
575 * - Program interrupts (interrupt aggregators and routers) both at SoC and subsystem (DMA/Navigator) level 605 * - Program interrupts (interrupt aggregators and routers) both at SoC and subsystem (DMA/Navigator) level
576 * 606 *
577 * ##Security Features 607 * ##Security Features
578 * Public APIs are provided to directly configure these features following polices and root of trust: 608 * Public APIs are provided to directly configure these features following polices and root of trust:
579 * 609 *
580 * - ISC 610 * - ISC
581 * - Present at originator/master interfaces to control credentials from master 611 * - Present at originator/master interfaces to control credentials from master
582 * - Firewall 612 * - Firewall
diff --git a/packages/ti/drv/sciclient/src/sciclient_boardcfg.c b/packages/ti/drv/sciclient/src/sciclient_boardcfg.c
index d8a97bb6a..9f7a9dd69 100755
--- a/packages/ti/drv/sciclient/src/sciclient_boardcfg.c
+++ b/packages/ti/drv/sciclient/src/sciclient_boardcfg.c
@@ -157,7 +157,7 @@ int32_t Sciclient_boardCfgRm(const Sciclient_BoardCfgPrms_t * pInPrms)
157 .tisci_boardcfg_rm_size = (uint16_t) SCICLIENT_BOARDCFG_RM_SIZE_IN_BYTES, 157 .tisci_boardcfg_rm_size = (uint16_t) SCICLIENT_BOARDCFG_RM_SIZE_IN_BYTES,
158 .tisci_boardcfg_rm_devgrp = (uint8_t) DEVGRP_ALL 158 .tisci_boardcfg_rm_devgrp = (uint8_t) DEVGRP_ALL
159 }; 159 };
160 160
161 /* NULL pInPrms will retain default values */ 161 /* NULL pInPrms will retain default values */
162 if (pInPrms != NULL) 162 if (pInPrms != NULL)
163 { 163 {
@@ -210,7 +210,7 @@ int32_t Sciclient_boardCfgSec(const Sciclient_BoardCfgPrms_t * pInPrms)
210 210
211 Sciclient_ReqPrm_t reqParam = { 211 Sciclient_ReqPrm_t reqParam = {
212 .messageType = (uint16_t) TISCI_MSG_BOARD_CONFIG_SECURITY, 212 .messageType = (uint16_t) TISCI_MSG_BOARD_CONFIG_SECURITY,
213 .flags = (uint32_t) TISCI_MSG_FLAG_AOP, 213 .flags = (uint32_t) TISCI_MSG_FLAG_AOP,
214 .pReqPayload = (const uint8_t *) &request, 214 .pReqPayload = (const uint8_t *) &request,
215 .reqPayloadSize = (uint32_t) sizeof (request), 215 .reqPayloadSize = (uint32_t) sizeof (request),
216 .timeout = (uint32_t) SCICLIENT_SERVICE_WAIT_FOREVER 216 .timeout = (uint32_t) SCICLIENT_SERVICE_WAIT_FOREVER
@@ -230,5 +230,28 @@ int32_t Sciclient_boardCfgSec(const Sciclient_BoardCfgPrms_t * pInPrms)
230 return retVal; 230 return retVal;
231} 231}
232 232
233int32_t Sciclient_getDefaultBoardCfgInfo(Sciclient_DefaultBoardCfgInfo_t *pBoardCfgInfo)
234{
235 int32_t retVal = CSL_PASS;
236
237 if(NULL == pBoardCfgInfo)
238 {
239 retVal = CSL_EFAIL;
240 }
241
242 if(CSL_PASS == retVal)
243 {
244 pBoardCfgInfo->boardCfgLow = &gSciclient_boardCfgLow[0U];
245 pBoardCfgInfo->boardCfgLowRm = &gSciclient_boardCfgLow_rm[0U];
246 pBoardCfgInfo->boardCfgLowSec = &gSciclient_boardCfgLow_sec[0U];
247 pBoardCfgInfo->boardCfgLowPm = &gSciclient_boardCfgLow_pm[0U];
248 pBoardCfgInfo->boardCfgLowSize = SCICLIENT_BOARDCFG_SIZE_IN_BYTES;
249 pBoardCfgInfo->boardCfgLowRmSize = SCICLIENT_BOARDCFG_RM_SIZE_IN_BYTES;
250 pBoardCfgInfo->boardCfgLowSecSize = SCICLIENT_BOARDCFG_SECURITY_SIZE_IN_BYTES;
251 pBoardCfgInfo->boardCfgLowPmSize = SCICLIENT_BOARDCFG_PM_SIZE_IN_BYTES;
252 }
253
254 return retVal;
255}
233#endif 256#endif
234 257
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