aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorMahesh Radhakrishnan2018-12-07 10:31:28 -0600
committerMahesh Radhakrishnan2018-12-07 10:31:28 -0600
commit488ba19954abf41bf967fec7ccff989ad6de1d19 (patch)
tree78e2518a5b153f98579f92c6aab07e8f74b4533c
parent87c6657fbd0153e63690972bb5bfa208902fd71c (diff)
downloadrtos-template-app-488ba19954abf41bf967fec7ccff989ad6de1d19.tar.gz
rtos-template-app-488ba19954abf41bf967fec7ccff989ad6de1d19.tar.xz
rtos-template-app-488ba19954abf41bf967fec7ccff989ad6de1d19.zip
PRSDK-5093: Using board APIs to read headers,interrupt router updates for gpio
-rw-r--r--am65xx/evmAM65xx/A53/template_app/app.c92
-rw-r--r--am65xx/evmAM65xx/A53/template_app/main.c173
-rw-r--r--am65xx/evmAM65xx/A53/template_app/main.cfg8
3 files changed, 92 insertions, 181 deletions
diff --git a/am65xx/evmAM65xx/A53/template_app/app.c b/am65xx/evmAM65xx/A53/template_app/app.c
index 146e587..209b026 100644
--- a/am65xx/evmAM65xx/A53/template_app/app.c
+++ b/am65xx/evmAM65xx/A53/template_app/app.c
@@ -232,76 +232,34 @@ void spi_test_task(UArg arg0, UArg arg1)
232 */ 232 */
233void i2c_eeprom_read_and_display_task(UArg arg0, UArg arg1) 233void i2c_eeprom_read_and_display_task(UArg arg0, UArg arg1)
234{ 234{
235 I2C_Params i2cParams; 235
236 I2C_Handle handle = NULL; 236 Board_IDInfo_v2 info = {0};
237 I2C_Transaction i2cTransaction; 237 Board_STATUS status;
238 bool status; 238
239 char txBuf[2] = {0x00, 0x00}; 239 status = Board_getIDInfo_v2(&info, BOARD_I2C_EEPROM_ADDR);
240 char boardName[20]; 240
241 char boardVersion[20]; 241 if(status != BOARD_SOK)
242 unsigned int *uintPtr, i; 242 {
243 243
244 appPrint("\n i2c_eeprom_read_and_display task started"); 244 if(status==BOARD_INVALID_PARAM)
245 245 {
246 /* Initialize parameters */ 246 appPrint("\n Board info is not supported!");
247 I2C_Params_init(&i2cParams); 247 goto i2c_eeprom_read_and_display_task_exit;
248 248 }
249 /* BitRate : 400 Kbps */ 249 else
250 i2cParams.bitRate = I2C_400kHz; 250 {
251 251 appPrint("\n Board info read failed!!");
252 /* Open I2C instance */ 252 goto i2c_eeprom_read_and_display_task_exit;
253 handle = I2C_open(BOARD_I2C_EEPROM_INSTANCE, &i2cParams); 253 }
254 254 }
255 /* Configure common parameters with I2C transaction */ 255
256 i2cTransaction.slaveAddress = BOARD_I2C_EEPROM_ADDR; 256
257 i2cTransaction.writeBuf = (uint8_t *)&txBuf[0]; 257 appPrint("\n Board Name read: %s\n",info.boardInfo.boardName);
258 i2cTransaction.writeCount = 2;
259
260 /* Get board name */
261 txBuf[0] = (char)(((uint32_t) 0xFF00 & BOARD_EEPROM_BOARD_NAME_ADDR)>>8);
262 txBuf[1] = (char)((uint32_t) 0xFF & BOARD_EEPROM_BOARD_NAME_ADDR);
263 i2cTransaction.readBuf = boardName;
264 i2cTransaction.readCount = BOARD_EEPROM_BOARD_NAME_LENGTH;
265 status = I2C_transfer(handle, &i2cTransaction);
266 if (status == false)
267 {
268 I2C_close(handle);
269 appPrint("\n ERROR: I2C_transfer failed");
270 goto I2C_TEST_EXIT;
271 }
272 ///boardName[BOARD_EEPROM_BOARD_NAME_LENGTH] = '\0';
273 ///appPrint("\n Board Name read: %s", boardName);
274 appPrint("\n Board Name read:");
275 for (i=0; i<BOARD_EEPROM_BOARD_NAME_LENGTH/4; i++)
276 {
277 uintPtr = (unsigned int *)&boardName[i*4];
278 appPrint("\n Hex: 0x%x", *uintPtr);
279 }
280 /* Get board version */ 258 /* Get board version */
281 txBuf[0] = (char)(((uint32_t) 0xFF00 & BOARD_EEPROM_VERSION_ADDR)>>8); 259 appPrint("\n Board version read: %s\n",info.boardInfo.designRev);
282 txBuf[1] = (char)((uint32_t) 0xFF & BOARD_EEPROM_VERSION_ADDR);
283 i2cTransaction.readBuf = boardVersion;
284 i2cTransaction.readCount = BOARD_EEPROM_VERSION_LENGTH;
285 status = I2C_transfer(handle, &i2cTransaction);
286 if (status == false)
287 {
288 I2C_close(handle);
289 appPrint("\n ERROR: I2C_transfer failed");
290 goto I2C_TEST_EXIT;
291 }
292 ///boardVersion[BOARD_EEPROM_VERSION_LENGTH] = '\0';
293 ///appPrint("\n Board version read: %s", boardVersion);
294 appPrint("\n Board version read:");
295 for (i=0; i<BOARD_EEPROM_VERSION_LENGTH/4; i++)
296 {
297 uintPtr = (unsigned int *)&boardVersion[i*4];
298 appPrint("\n Hex: 0x%x", *uintPtr);
299 }
300 260
301 Task_sleep(10); 261 Task_sleep(10);
302 262i2c_eeprom_read_and_display_task_exit:
303I2C_TEST_EXIT:
304 appPrint("\n i2c_eeprom_read_and_display task ended");
305 Task_exit(); 263 Task_exit();
306} 264}
307 265
diff --git a/am65xx/evmAM65xx/A53/template_app/main.c b/am65xx/evmAM65xx/A53/template_app/main.c
index d253696..d8225ea 100644
--- a/am65xx/evmAM65xx/A53/template_app/main.c
+++ b/am65xx/evmAM65xx/A53/template_app/main.c
@@ -148,10 +148,6 @@ void peripheralInit(void) {
148 ///UART_init(); 148 ///UART_init();
149 ///appPrint("\n Uart Init complete"); 149 ///appPrint("\n Uart Init complete");
150 150
151 /* I2C initialization */
152 I2C_init();
153 appPrint("\n I2C Init complete");
154
155 /* GPIO initialization */ 151 /* GPIO initialization */
156 GPIO_init(); 152 GPIO_init();
157 appPrint("\n Gpio Init complete"); 153 appPrint("\n Gpio Init complete");
@@ -173,116 +169,58 @@ void peripheralInit(void) {
173#define CSL_MAIN2MCU_INTRTR_PLS_GPIOMUX_INT31_DFLT_PLS (0x0000001F) 169#define CSL_MAIN2MCU_INTRTR_PLS_GPIOMUX_INT31_DFLT_PLS (0x0000001F)
174void GPIO_configIntRouter(uint32_t portNum, uint32_t pinNum, uint32_t gpioIntRtrOutIntNum, GPIO_v0_HwAttrs *cfg) 170void GPIO_configIntRouter(uint32_t portNum, uint32_t pinNum, uint32_t gpioIntRtrOutIntNum, GPIO_v0_HwAttrs *cfg)
175{ 171{
176 GPIO_IntCfg *intCfg; 172 GPIO_IntCfg *intCfg;
177 CSL_IntrRouterCfg intrRouterCfg; 173 uint32_t bankNum;
178 uint32_t gpioIntRtrInIntNum; 174
179 uint32_t bankNum; 175 intCfg = cfg->intCfg;
180 uint32_t i; 176
181 intCfg = cfg->intCfg; 177 #if defined (am65xx_evm) || defined (am65xx_idk)
182 178
183#if defined (am65xx_evm) 179 /* no main domain GPIO pins directly connected to LEDs on GP EVM,
184 /* no main domain GPIO pins directly connected to LEDs on GP EVM, 180 use WKUP domain GPIO pins which connected to LEDs on base board */
185 use WKUP domain GPIO pins which connected to LEDs on base board */ 181 cfg->baseAddr = CSL_WKUP_GPIO0_BASE;
186 cfg->baseAddr = CSL_WKUP_GPIO0_BASE; 182
187 183 bankNum = pinNum/16; /* Each GPIO bank has 16 pins */
188 /* Initialize WKUP GPIO Interrupt Router conifg structure */ 184
189 intrRouterCfg.pIntrRouterRegs = (CSL_intr_router_cfgRegs *)(uintptr_t)(CSL_WKUP_GPIOMUX_INTRTR0_CFG_BASE); 185 /* WKUP GPIO int router input interrupt is the GPIO bank interrupt */
190 intrRouterCfg.pIntdRegs = (CSL_intr_router_intd_cfgRegs *)(uintptr_t)NULL; 186 #if defined (__aarch64__)
191 intrRouterCfg.numInputIntrs = 64; 187 intCfg[pinNum].intNum = CSL_GIC0_INTR_WKUP_GPIOMUX_INTRTR0_BUS_OUTP_0 + bankNum;
192 intrRouterCfg.numOutputIntrs = 16; 188 #else
193 for (i = 0; i < intrRouterCfg.numOutputIntrs; i++) 189 intCfg[pinNum].intNum = CSL_MCU0_INTR_GPIOMUX_INTR0_OUTP_0 + bankNum;
194 CSL_intrRouterCfgMux(&intrRouterCfg, intrRouterCfg.numInputIntrs - 1, i); 190 #endif
195 191 intCfg[pinNum].eventId = 0;
196 bankNum = pinNum/16; /* Each GPIO bank has 16 pins */ 192 intCfg[pinNum].intcMuxNum = INVALID_INTC_MUX_NUM;
197 193 intCfg[pinNum].intcMuxInEvent = 0;
198 /* WKUP GPIO int router input interrupt is the GPIO bank interrupt */ 194 intCfg[pinNum].intcMuxOutEvent = 0;
199 gpioIntRtrInIntNum = WKUP_GPIO_INTRTR_GPIO0_BANK0_INT + bankNum; 195
200#if defined (__aarch64__) 196 /* Setup interrupt router configuration for gpio port/pin */
201 intCfg[pinNum].intNum = CSL_GIC0_INTR_WKUP_GPIOMUX_INTRTR0_BUS_OUTP_0 + bankNum; 197 #else /* defined (am65xx_evm) */
202#else 198 /* Use main domain GPIO pins directly connected to IDK EVM */
203 intCfg[pinNum].intNum = CSL_MCU0_INTR_GPIOMUX_INTR0_OUTP_0 + bankNum; 199
204#endif 200 bankNum = pinNum/16; /* Each GPIO bank has 16 pins */
205 intCfg[pinNum].eventId = 0; 201 if (portNum == 0)
206 intCfg[pinNum].intcMuxNum = INVALID_INTC_MUX_NUM; 202 {
207 intCfg[pinNum].intcMuxInEvent = 0; 203 /* MAIN GPIO int router input interrupt is the GPIO bank interrupt */
208 intCfg[pinNum].intcMuxOutEvent = 0; 204 #if defined (__aarch64__)
209 205 intCfg[pinNum].intNum = CSL_GIC0_INTR_MAIN_GPIOMUX_INTROUTER_MAIN_GPIOMUX_INTROUTER_MAIN_0_BUS_OUTP_0 + bankNum;
210 /* Setup interrupt router configuration for gpio port/pin */ 206 #else
211#if defined (__aarch64__) 207 intCfg[pinNum].intNum = CSL_MCU0_INTR_MAIN2MCU_PULSE_INTR0_OUTP_0 + bankNum;
212 gpioIntRtrOutIntNum = intCfg[pinNum].intNum - CSL_GIC0_INTR_WKUP_GPIOMUX_INTRTR0_BUS_OUTP_0; 208 #endif
213 209 }
214 /* Route WKUP GPIO pin interrupt to main GIC */ 210 else
215 CSL_intrRouterCfgMux(&intrRouterCfg, gpioIntRtrInIntNum, gpioIntRtrOutIntNum); 211 {
216#else 212 #if defined (__aarch64__)
217 gpioIntRtrOutIntNum = intCfg[pinNum].intNum - CSL_MCU0_INTR_GPIOMUX_INTR0_OUTP_0; 213 intCfg[pinNum].intNum = CSL_GIC0_INTR_MAIN_GPIOMUX_INTROUTER_MAIN_GPIOMUX_INTROUTER_MAIN_0_BUS_OUTP_6 + bankNum;
218 214 #else
219 /* Route WKUP GPIO pin interrupt to mcu VIM */ 215 intCfg[pinNum].intNum = CSL_MCU0_INTR_MAIN2MCU_PULSE_INTR0_OUTP_6 + bankNum;
220 CSL_intrRouterCfgMux(&intrRouterCfg, gpioIntRtrInIntNum, gpioIntRtrOutIntNum); 216 #endif
221#endif 217 }
222 218 intCfg[pinNum].eventId = 0;
223#else /* defined (am65xx_evm) */ 219 intCfg[pinNum].intcMuxNum = INVALID_INTC_MUX_NUM;
224 /* Use main domain GPIO pins directly connected to IDK EVM */ 220 intCfg[pinNum].intcMuxInEvent = 0;
225 221 intCfg[pinNum].intcMuxOutEvent = 0;
226 /* Initialize Main GPIO Interrupt Router conifg structure */ 222
227 intrRouterCfg.pIntrRouterRegs = (CSL_intr_router_cfgRegs *)(uintptr_t)(CSL_GPIOMUX_INTRTR0_INTR_ROUTER_CFG_BASE); 223 #endif /* defined (am65xx_evm) */
228 intrRouterCfg.pIntdRegs = (CSL_intr_router_intd_cfgRegs *)(uintptr_t)NULL;
229 intrRouterCfg.numInputIntrs = 208;
230 intrRouterCfg.numOutputIntrs = 32;
231 for (i = 0; i < intrRouterCfg.numOutputIntrs; i++)
232 CSL_intrRouterCfgMux(&intrRouterCfg, intrRouterCfg.numInputIntrs - 1, i);
233
234 bankNum = pinNum/16; /* Each GPIO bank has 16 pins */
235 if (portNum == 0)
236 {
237 /* MAIN GPIO int router input interrupt is the GPIO bank interrupt */
238 gpioIntRtrInIntNum = MAIN_GPIO_INTRTR_GPIO0_BANK0_INT + bankNum;
239#if defined (__aarch64__)
240 intCfg[pinNum].intNum = CSL_GIC0_INTR_MAIN_GPIOMUX_INTROUTER_MAIN_GPIOMUX_INTROUTER_MAIN_0_BUS_OUTP_0 + bankNum;
241#else
242 intCfg[pinNum].intNum = CSL_MCU0_INTR_MAIN2MCU_PULSE_INTR0_OUTP_0 + bankNum;
243#endif
244 }
245 else
246 {
247 gpioIntRtrInIntNum = MAIN_GPIO_INTRTR_GPIO1_BANK0_INT + bankNum;
248#if defined (__aarch64__)
249 intCfg[pinNum].intNum = CSL_GIC0_INTR_MAIN_GPIOMUX_INTROUTER_MAIN_GPIOMUX_INTROUTER_MAIN_0_BUS_OUTP_6 + bankNum;
250#else
251 intCfg[pinNum].intNum = CSL_MCU0_INTR_MAIN2MCU_PULSE_INTR0_OUTP_6 + bankNum;
252#endif
253 }
254 intCfg[pinNum].eventId = 0;
255 intCfg[pinNum].intcMuxNum = INVALID_INTC_MUX_NUM;
256 intCfg[pinNum].intcMuxInEvent = 0;
257 intCfg[pinNum].intcMuxOutEvent = 0;
258
259 /* Setup interrupt router configuration for gpio port/pin */
260#if defined (__aarch64__)
261 /* gpioIntRtrOutIntNum parameter (main gpio int router output int number) is not used in A53 code,
262 * it is derived from the GIC500 interrupt number configured in HwAttr in GPIO_soc.c */
263 gpioIntRtrOutIntNum = intCfg[pinNum].intNum - CSL_GIC0_INTR_MAIN_GPIOMUX_INTROUTER_MAIN_GPIOMUX_INTROUTER_MAIN_0_BUS_OUTP_0;
264
265 /* Route GPIO pin interrupt to main GIC */
266 CSL_intrRouterCfgMux(&intrRouterCfg, gpioIntRtrInIntNum, gpioIntRtrOutIntNum);
267#else
268 /* Route GPIO pin interrupt to MAIN2MCU_INTRTR */
269 CSL_intrRouterCfgMux(&intrRouterCfg, gpioIntRtrInIntNum, gpioIntRtrOutIntNum);
270
271 /* Initialize Main to MCU Interrupt Router conifg structure */
272 intrRouterCfg.pIntrRouterRegs = (CSL_intr_router_cfgRegs *)(uintptr_t)(CSL_MAIN2MCU_PLS_INTRTR0_CFG_BASE);
273 intrRouterCfg.pIntdRegs = (CSL_intr_router_intd_cfgRegs *)(uintptr_t)NULL;
274 intrRouterCfg.numInputIntrs = 32;
275 intrRouterCfg.numOutputIntrs = 48;
276 for (i = 0; i < intrRouterCfg.numOutputIntrs; i++)
277 CSL_intrRouterCfgMux(&intrRouterCfg, intrRouterCfg.numInputIntrs - 1, i);
278
279 /* Route GPIO int router output to MAIN2MCU int router output, MAIN2MCU int router output int number
280 * is derived from the MCU GIC interrupt number configured in HwAttr in GPIO_soc.*/
281 gpioIntRtrInIntNum = gpioIntRtrOutIntNum;
282 gpioIntRtrOutIntNum = intCfg[pinNum].intNum - CSL_MCU0_INTR_MAIN2MCU_PULSE_INTR0_OUTP_0;
283 CSL_intrRouterCfgMux(&intrRouterCfg, gpioIntRtrInIntNum, gpioIntRtrOutIntNum);
284#endif
285#endif /* defined (am65xx_evm) */
286} 224}
287 225
288void Board_initGPIO(void) 226void Board_initGPIO(void)
@@ -379,6 +317,13 @@ Void InitMmu()
379 } 317 }
380 318
381 mapIdx++; 319 mapIdx++;
320 retVal = Mmu_map(0x030000000, 0x030000000, 0x10000000, &attrs); /* NAVSS used by sciclient */
321 if(retVal == FALSE)
322 {
323 goto mmu_exit;
324 }
325
326 mapIdx++;
382 retVal = Mmu_map(0x00600000, 0x00600000, 0x00002000, &attrs); /* GPIO */ 327 retVal = Mmu_map(0x00600000, 0x00600000, 0x00002000, &attrs); /* GPIO */
383 if(retVal == FALSE) 328 if(retVal == FALSE)
384 { 329 {
diff --git a/am65xx/evmAM65xx/A53/template_app/main.cfg b/am65xx/evmAM65xx/A53/template_app/main.cfg
index d946707..29eb16e 100644
--- a/am65xx/evmAM65xx/A53/template_app/main.cfg
+++ b/am65xx/evmAM65xx/A53/template_app/main.cfg
@@ -174,6 +174,14 @@ I2c.Settings.socType = socType;
174var Uart = xdc.loadPackage('ti.drv.uart'); 174var Uart = xdc.loadPackage('ti.drv.uart');
175Uart.Settings.socType = socType; 175Uart.Settings.socType = socType;
176 176
177
178var Sciclient = xdc.loadPackage('ti.drv.sciclient');
179Sciclient.Settings.socType = socType;
180
181var Board = xdc.loadPackage('ti.board');
182Board.Settings.boardName = "am65xx_evm";
183
184
177/* Load the gpio package */ 185/* Load the gpio package */
178var Gpio = xdc.loadPackage('ti.drv.gpio'); 186var Gpio = xdc.loadPackage('ti.drv.gpio');
179Gpio.Settings.socType = socType; 187Gpio.Settings.socType = socType;