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author | Jason Reeder | 2015-06-17 17:54:44 -0500 |
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committer | Jason Reeder | 2015-06-17 17:54:44 -0500 |
commit | 98f81ddd9a6650cfe88090fca3385b739bc01ead (patch) | |
tree | d6ca9ebe7c93e1061b27414c8aecf1c982f28bd3 /include | |
parent | 9107429410e43305372fdb66e434658e9b0f9947 (diff) | |
download | pru-software-support-package-98f81ddd9a6650cfe88090fca3385b739bc01ead.tar.gz pru-software-support-package-98f81ddd9a6650cfe88090fca3385b739bc01ead.tar.xz pru-software-support-package-98f81ddd9a6650cfe88090fca3385b739bc01ead.zip |
Added the system Mailbox and system DMTimer constant header struct definitions
Signed-off-by: Jason Reeder <jreeder@ti.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/sys_dmtimer.h | 212 | ||||
-rw-r--r-- | include/sys_mailbox.h | 171 |
2 files changed, 383 insertions, 0 deletions
diff --git a/include/sys_dmtimer.h b/include/sys_dmtimer.h new file mode 100644 index 0000000..97972c1 --- /dev/null +++ b/include/sys_dmtimer.h | |||
@@ -0,0 +1,212 @@ | |||
1 | #ifndef _SYS_DMTIMER_H_ | ||
2 | #define _SYS_DMTIMER_H_ | ||
3 | /* SYS_DMTIMER register set */ | ||
4 | typedef struct{ | ||
5 | |||
6 | /* SYS_DMTIMER_TIDR register bit field */ | ||
7 | union { | ||
8 | volatile uint32_t TIDR; | ||
9 | |||
10 | volatile struct { | ||
11 | unsigned Y_MINOR : 6; //5:0 | ||
12 | unsigned CUSTOM : 2; //7:6 | ||
13 | unsigned X_MAJOR : 3; //10:8 | ||
14 | unsigned R_RTL : 5; //15:11 | ||
15 | unsigned FUNC : 12; //27:16 | ||
16 | unsigned rsvd28 : 2; //29:28 | ||
17 | unsigned SCHEME : 2; //31:30 | ||
18 | } TIDR_bit; | ||
19 | } ; // 0x0 | ||
20 | |||
21 | uint32_t rsvd4[3]; // 0x4 - 0xC | ||
22 | |||
23 | /* SYS_DMTIMER_TIOCP_CFG register bit field */ | ||
24 | union { | ||
25 | volatile uint32_t TIOCP_CFG; | ||
26 | |||
27 | volatile struct { | ||
28 | unsigned SOFTRESET : 1; //0 | ||
29 | unsigned EMUFREE : 1; //1 | ||
30 | unsigned IDLEMODE : 2; //3:2 | ||
31 | unsigned rsvd4 : 28; //31:4 | ||
32 | } TIOCP_CFG_bit; | ||
33 | } ; // 0x10 | ||
34 | |||
35 | uint32_t rsvd14[3]; // 0x14 - 0x1C | ||
36 | |||
37 | /* SYS_DMTIMER_IRQ_EOI register bit field */ | ||
38 | union { | ||
39 | volatile uint32_t IRQ_EOI; | ||
40 | |||
41 | volatile struct { | ||
42 | //TODO: AM335x:DMAEVENT_ACK AM437x:LINE_NUMBER | ||
43 | unsigned DMAEVENT_ACK : 1; //0 | ||
44 | unsigned rsvd1 : 31; //31:1 | ||
45 | } IRQ_EOI_bit; | ||
46 | } ; // 0x20 | ||
47 | |||
48 | /* SYS_DMTIMER_IRQSTATUS_RAW register bit field */ | ||
49 | union { | ||
50 | volatile uint32_t IRQSTATUS_RAW; | ||
51 | |||
52 | volatile struct { | ||
53 | unsigned MAT_IT_FLAG : 1; //0 | ||
54 | unsigned OVF_IT_FLAG : 1; //1 | ||
55 | unsigned TCAR_IT_FLAG : 1; //2 | ||
56 | unsigned rsvd3 : 29; //31:3 | ||
57 | } IRQSTATUS_RAW_bit; | ||
58 | } ; // 0x24 | ||
59 | |||
60 | /* SYS_DMTIMER_IRQSTATUS register bit field */ | ||
61 | union { | ||
62 | volatile uint32_t IRQSTATUS; | ||
63 | |||
64 | volatile struct { | ||
65 | unsigned MAT_IT_FLAG : 1; //0 | ||
66 | unsigned OVF_IT_FLAG : 1; //1 | ||
67 | unsigned TCAR_IT_FLAG : 1; //2 | ||
68 | unsigned rsvd3 : 29; //31:3 | ||
69 | } IRQSTATUS_bit; | ||
70 | } ; // 0x28 | ||
71 | |||
72 | /* SYS_DMTIMER_IRQENABLE_SET register bit field */ | ||
73 | union { | ||
74 | volatile uint32_t IRQENABLE_SET; | ||
75 | |||
76 | volatile struct { | ||
77 | unsigned MAT_EN_FLAG : 1; //0 | ||
78 | unsigned OVF_EN_FLAG : 1; //1 | ||
79 | unsigned TCAR_EN_FLAG : 1; //2 | ||
80 | unsigned rsvd3 : 29; //31:3 | ||
81 | } IRQENABLE_SET_bit; | ||
82 | } ; // 0x2C | ||
83 | |||
84 | /* SYS_DMTIMER_IRQENABLE_CLR register bit field */ | ||
85 | union { | ||
86 | volatile uint32_t IRQENABLE_CLR; | ||
87 | |||
88 | volatile struct { | ||
89 | unsigned MAT_EN_FLAG : 1; //0 | ||
90 | unsigned OVF_EN_FLAG : 1; //1 | ||
91 | unsigned TCAR_EN_FLAG : 1; //2 | ||
92 | unsigned rsvd3 : 29; //31:3 | ||
93 | } IRQENABLE_CLR_bit; | ||
94 | } ; // 0x30 | ||
95 | |||
96 | /* SYS_DMTIMER_IRQWAKEEN register bit field */ | ||
97 | union { | ||
98 | volatile uint32_t IRQWAKEEN; | ||
99 | |||
100 | volatile struct { | ||
101 | unsigned MAT_WUP_ENA : 1; //0 | ||
102 | unsigned OVF_WUP_ENA : 1; //1 | ||
103 | unsigned TCAR_WUP_ENA : 1; //2 | ||
104 | unsigned rsvd3 : 29; //31:3 | ||
105 | } IRQWAKEEN_bit; | ||
106 | } ; // 0x34 | ||
107 | |||
108 | /* SYS_DMTIMER_TCLR register bit field */ | ||
109 | union { | ||
110 | volatile uint32_t TCLR; | ||
111 | |||
112 | volatile struct { | ||
113 | unsigned ST : 1; //0 | ||
114 | unsigned AR : 1; //1 | ||
115 | unsigned PTV : 3; //4:2 | ||
116 | unsigned PRE : 1; //5 | ||
117 | unsigned CE : 1; //6 | ||
118 | unsigned SCPWM : 1; //7 | ||
119 | unsigned TCM : 2; //9:8 | ||
120 | unsigned TRG : 2; //11:10 | ||
121 | unsigned PT : 1; //12 | ||
122 | unsigned CAPT_MODE : 1; //13 | ||
123 | unsigned GPO_CFG : 1; //14 | ||
124 | unsigned rsvd15 : 17; //31:15 | ||
125 | } TCLR_bit; | ||
126 | } ; // 0x38 | ||
127 | |||
128 | /* SYS_DMTIMER_TCRR register bit field */ | ||
129 | union { | ||
130 | volatile uint32_t TCRR; | ||
131 | |||
132 | volatile struct { | ||
133 | unsigned TIMER_COUNTER : 32; //31:0 | ||
134 | } TCRR_bit; | ||
135 | } ; // 0x3C | ||
136 | |||
137 | /* SYS_DMTIMER_TLDR register bit field */ | ||
138 | union { | ||
139 | volatile uint32_t TLDR; | ||
140 | |||
141 | volatile struct { | ||
142 | unsigned LOAD_VALUE : 32; //31:0 | ||
143 | } TLDR_bit; | ||
144 | } ; // 0x40 | ||
145 | |||
146 | /* SYS_DMTIMER_TTGR register bit field */ | ||
147 | union { | ||
148 | volatile uint32_t TTGR; | ||
149 | |||
150 | volatile struct { | ||
151 | unsigned TTGR_VALUE : 32; //31:0 | ||
152 | } TTGR_bit; | ||
153 | } ; // 0x44 | ||
154 | |||
155 | /* SYS_DMTIMER_TWPS register bit field */ | ||
156 | union { | ||
157 | volatile uint32_t TWPS; | ||
158 | |||
159 | volatile struct { | ||
160 | unsigned W_PEND_TCLR : 1; //0 | ||
161 | unsigned W_PEND_TCRR : 1; //1 | ||
162 | unsigned W_PEND_TLDR : 1; //2 | ||
163 | unsigned W_PEND_TTGR : 1; //3 | ||
164 | unsigned W_PEND_TMAR : 1; //4 | ||
165 | unsigned rsvd5 : 27; //31:5 | ||
166 | } TWPS_bit; | ||
167 | } ; // 0x48 | ||
168 | |||
169 | /* SYS_DMTIMER_TMAR register bit field */ | ||
170 | union { | ||
171 | volatile uint32_t TMAR; | ||
172 | |||
173 | volatile struct { | ||
174 | unsigned COMPARE_VALUE : 32; //31:0 | ||
175 | } TMAR_bit; | ||
176 | } ; // 0x4C | ||
177 | |||
178 | /* SYS_DMTIMER_TCAR1 register bit field */ | ||
179 | union { | ||
180 | volatile uint32_t TCAR1; | ||
181 | |||
182 | volatile struct { | ||
183 | unsigned CAPTURED_VALUE : 32; //31:0 | ||
184 | } TCAR1_bit; | ||
185 | } ; // 0x50 | ||
186 | |||
187 | /* SYS_DMTIMER_TSICR register bit field */ | ||
188 | union { | ||
189 | volatile uint32_t TSICR; | ||
190 | |||
191 | volatile struct { | ||
192 | unsigned rsvd0 : 1; //0 | ||
193 | unsigned SFT : 1; //1 | ||
194 | unsigned POSTED : 1; //2 | ||
195 | unsigned rsvd3 : 29; //31:3 | ||
196 | } TSICR_bit; | ||
197 | } ; // 0x54 | ||
198 | |||
199 | /* SYS_DMTIMER_TCAR2 register bit field */ | ||
200 | union { | ||
201 | volatile uint32_t TCAR2; | ||
202 | |||
203 | volatile struct { | ||
204 | unsigned CAPTURED_VALUE : 32; //31:0 | ||
205 | } TCAR2_bit; | ||
206 | } ; // 0x58 | ||
207 | |||
208 | } sysDmtimer; | ||
209 | |||
210 | __far volatile sysDmtimer CT_DMTIMER2 __attribute__((cregister("DMTIMER2", far), peripheral)); | ||
211 | |||
212 | #endif /* _SYS_DMTIMER_H_ */ | ||
diff --git a/include/sys_mailbox.h b/include/sys_mailbox.h new file mode 100644 index 0000000..df4d141 --- /dev/null +++ b/include/sys_mailbox.h | |||
@@ -0,0 +1,171 @@ | |||
1 | #ifndef _SYS_MAILBOX_H_ | ||
2 | #define _SYS_MAILBOX_H_ | ||
3 | /* SYS_MAILBOX register set */ | ||
4 | typedef struct{ | ||
5 | |||
6 | /* SYS_MAILBOX_REVISION register bit field */ | ||
7 | union { | ||
8 | volatile uint32_t REVISION; | ||
9 | |||
10 | volatile struct { | ||
11 | unsigned MINOR : 6; //5:0 | ||
12 | unsigned CUSTOM : 2; //7:6 | ||
13 | unsigned MAJOR : 3; //10:8 | ||
14 | unsigned RTL : 5; //15:11 | ||
15 | unsigned FUNC : 12; //27:16 | ||
16 | unsigned rsvd28 : 2; //29:28 | ||
17 | unsigned SCHEME : 2; //31:30 | ||
18 | } REVISION_bit; | ||
19 | } ; // 0x0 | ||
20 | |||
21 | uint32_t rsvd4[3]; // 0x4 - 0xC | ||
22 | |||
23 | /* SYS_MAILBOX_SYSCONFIG register bit field */ | ||
24 | union { | ||
25 | volatile uint32_t SYSCONFIG; | ||
26 | |||
27 | volatile struct { | ||
28 | unsigned SOFTRESET : 1; //0 | ||
29 | unsigned rsvd : 1; //1 | ||
30 | unsigned SLIDLEMODE : 2; //3:2 | ||
31 | unsigned rsvd1 : 28; //31:4 | ||
32 | } SYSCONFIG_bit; | ||
33 | } ; // 0x10 | ||
34 | |||
35 | uint32_t rsvd14[11]; // 0x14 - 0x3C | ||
36 | |||
37 | /* SYS_MAILBOX_MESSAGE register bit fields */ | ||
38 | union { | ||
39 | volatile uint32_t MESSAGE[8]; | ||
40 | |||
41 | volatile struct { | ||
42 | unsigned MESSAGE : 32; //31:0 | ||
43 | } MESSAGE_bit[8]; | ||
44 | } ; // 0x40-0x5C | ||
45 | |||
46 | uint32_t rsvd60[8]; // 0x60 - 0x7C | ||
47 | |||
48 | /* SYS_MAILBOX_FIFOSTATUS register bit fields */ | ||
49 | union { | ||
50 | volatile uint32_t FIFOSTATUS[8]; | ||
51 | |||
52 | volatile struct { | ||
53 | unsigned FIFOFULL : 1; //0 | ||
54 | unsigned rsvd : 31; //31:1 | ||
55 | } FIFOSTATUS_bit[8]; | ||
56 | } ; // 0x80-0x9C | ||
57 | |||
58 | uint32_t rsvdA0[8]; // 0xA0 - 0xBC | ||
59 | |||
60 | /* SYS_MAILBOX_MSGSTATUS register bit fields */ | ||
61 | union { | ||
62 | volatile uint32_t MSGSTATUS[8]; | ||
63 | |||
64 | volatile struct { | ||
65 | unsigned NBOFMSG : 3; //2:0 | ||
66 | unsigned rsvd : 29; //31:3 | ||
67 | } MSGSTATUS_bit[8]; | ||
68 | } ; // 0xC0-DC | ||
69 | |||
70 | uint32_t rsvdE0[8]; // 0xE0 - 0xFC | ||
71 | |||
72 | volatile struct { | ||
73 | union { | ||
74 | volatile uint32_t STATUS_RAW; | ||
75 | |||
76 | volatile struct { | ||
77 | unsigned NEWMSGSTATUSMB0 : 1; //0 | ||
78 | unsigned NOTFULLSTATUSMB0 : 1; //1 | ||
79 | unsigned NEWMSGSTATUSMB1 : 1; //2 | ||
80 | unsigned NOTFULLSTATUSMB1 : 1; //3 | ||
81 | unsigned NEWMSGSTATUSMB2 : 1; //4 | ||
82 | unsigned NOTFULLSTATUSMB2 : 1; //5 | ||
83 | unsigned NEWMSGSTATUSMB3 : 1; //6 | ||
84 | unsigned NOTFULLSTATUSMB3 : 1; //7 | ||
85 | unsigned NEWMSGSTATUSMB4 : 1; //8 | ||
86 | unsigned NOTFULLSTATUSMB4 : 1; //9 | ||
87 | unsigned NEWMSGSTATUSMB5 : 1; //10 | ||
88 | unsigned NOTFULLSTATUSMB5 : 1; //11 | ||
89 | unsigned NEWMSGSTATUSMB6 : 1; //12 | ||
90 | unsigned NOTFULLSTATUSMB6 : 1; //13 | ||
91 | unsigned NEWMSGSTATUSMB7 : 1; //14 | ||
92 | unsigned NOTFULLSTATUSMB7 : 1; //15 | ||
93 | unsigned rsvd : 16; //31:16 | ||
94 | } STATUS_RAW_bit; | ||
95 | }; | ||
96 | union { | ||
97 | volatile uint32_t STATUS_CLR; | ||
98 | |||
99 | volatile struct { | ||
100 | unsigned NEWMSGSTATUSMB0 : 1; //0 | ||
101 | unsigned NOTFULLSTATUSMB0 : 1; //1 | ||
102 | unsigned NEWMSGSTATUSMB1 : 1; //2 | ||
103 | unsigned NOTFULLSTATUSMB1 : 1; //3 | ||
104 | unsigned NEWMSGSTATUSMB2 : 1; //4 | ||
105 | unsigned NOTFULLSTATUSMB2 : 1; //5 | ||
106 | unsigned NEWMSGSTATUSMB3 : 1; //6 | ||
107 | unsigned NOTFULLSTATUSMB3 : 1; //7 | ||
108 | unsigned NEWMSGSTATUSMB4 : 1; //8 | ||
109 | unsigned NOTFULLSTATUSMB4 : 1; //9 | ||
110 | unsigned NEWMSGSTATUSMB5 : 1; //10 | ||
111 | unsigned NOTFULLSTATUSMB5 : 1; //11 | ||
112 | unsigned NEWMSGSTATUSMB6 : 1; //12 | ||
113 | unsigned NOTFULLSTATUSMB6 : 1; //13 | ||
114 | unsigned NEWMSGSTATUSMB7 : 1; //14 | ||
115 | unsigned NOTFULLSTATUSMB7 : 1; //15 | ||
116 | unsigned rsvd : 16; //31:16 | ||
117 | } STATUS_CLR_bit; | ||
118 | }; | ||
119 | union { | ||
120 | volatile uint32_t ENABLE_SET; | ||
121 | |||
122 | volatile struct { | ||
123 | unsigned NEWMSGSTATUSMB0 : 1; //0 | ||
124 | unsigned NOTFULLSTATUSMB0 : 1; //1 | ||
125 | unsigned NEWMSGSTATUSMB1 : 1; //2 | ||
126 | unsigned NOTFULLSTATUSMB1 : 1; //3 | ||
127 | unsigned NEWMSGSTATUSMB2 : 1; //4 | ||
128 | unsigned NOTFULLSTATUSMB2 : 1; //5 | ||
129 | unsigned NEWMSGSTATUSMB3 : 1; //6 | ||
130 | unsigned NOTFULLSTATUSMB3 : 1; //7 | ||
131 | unsigned NEWMSGSTATUSMB4 : 1; //8 | ||
132 | unsigned NOTFULLSTATUSMB4 : 1; //9 | ||
133 | unsigned NEWMSGSTATUSMB5 : 1; //10 | ||
134 | unsigned NOTFULLSTATUSMB5 : 1; //11 | ||
135 | unsigned NEWMSGSTATUSMB6 : 1; //12 | ||
136 | unsigned NOTFULLSTATUSMB6 : 1; //13 | ||
137 | unsigned NEWMSGSTATUSMB7 : 1; //14 | ||
138 | unsigned NOTFULLSTATUSMB7 : 1; //15 | ||
139 | unsigned rsvd : 16; //31:16 | ||
140 | } ENABLE_SET_bit; | ||
141 | }; | ||
142 | union { | ||
143 | volatile uint32_t ENABLE_CLR; | ||
144 | |||
145 | volatile struct { | ||
146 | unsigned NEWMSGSTATUSMB0 : 1; //0 | ||
147 | unsigned NOTFULLSTATUSMB0 : 1; //1 | ||
148 | unsigned NEWMSGSTATUSMB1 : 1; //2 | ||
149 | unsigned NOTFULLSTATUSMB1 : 1; //3 | ||
150 | unsigned NEWMSGSTATUSMB2 : 1; //4 | ||
151 | unsigned NOTFULLSTATUSMB2 : 1; //5 | ||
152 | unsigned NEWMSGSTATUSMB3 : 1; //6 | ||
153 | unsigned NOTFULLSTATUSMB3 : 1; //7 | ||
154 | unsigned NEWMSGSTATUSMB4 : 1; //8 | ||
155 | unsigned NOTFULLSTATUSMB4 : 1; //9 | ||
156 | unsigned NEWMSGSTATUSMB5 : 1; //10 | ||
157 | unsigned NOTFULLSTATUSMB5 : 1; //11 | ||
158 | unsigned NEWMSGSTATUSMB6 : 1; //12 | ||
159 | unsigned NOTFULLSTATUSMB6 : 1; //13 | ||
160 | unsigned NEWMSGSTATUSMB7 : 1; //14 | ||
161 | unsigned NOTFULLSTATUSMB7 : 1; //15 | ||
162 | unsigned rsvd : 16; //31:16 | ||
163 | } ENABLE_CLR_bit; | ||
164 | }; | ||
165 | } IRQ[4]; | ||
166 | |||
167 | } sysMailbox; | ||
168 | |||
169 | __far volatile sysMailbox CT_MBX __attribute__((cregister("MBX0", far), peripheral)); | ||
170 | |||
171 | #endif /* _SYS_MAILBOX_H_ */ | ||