aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorSuman Anna2018-02-20 21:19:50 -0600
committerSuman Anna2019-03-11 12:02:33 -0500
commit05767f3235201f66f83e3e0f2edc25ea9afed658 (patch)
tree57ac5669bc28d213ff4dda1963d58ca933b8b17c
parent8011736d9058879d6fa94834fd5acf1176a38eed (diff)
downloadremoteproc-05767f3235201f66f83e3e0f2edc25ea9afed658.tar.gz
remoteproc-05767f3235201f66f83e3e0f2edc25ea9afed658.tar.xz
remoteproc-05767f3235201f66f83e3e0f2edc25ea9afed658.zip
ARM: dts: dra7-ipu-dsp-common: Add watchdog timers to IPU and DSP nodes
The watchdog timer information has been added to all the IPU and DSP remote processor device nodes in the DRA7xx/AM57xx SoC families. The data has been added to the two common dra7-ipu-dsp-common and dra74-ipu-dsp-common dtsi files that can be included by all the desired board files. The following timers are chosen as the watchdog timers, as per the usage on the current firmware images: IPU2: GPTimers 4 & 9 (one for each Cortex-M4 core) IPU1: GPTimers 7 & 8 (one for each Cortex-M4 core) DSP1: GPTimer 10 DSP2: GPTimer 13 Each of the IPUs has two Cortex-M4 processors and so uses a timer each for providing watchdog support on that processor irrespective of whether the IPU is running in SMP-mode or non-SMP node. The chosen timers also need to be unique from the ones used by other processors (regular timers or watchdog timers) so that they can be supported simultaneously. The MPU-side drivers will use this data to initialize the watchdog timer(s), and listen for any watchdog triggers. The BIOS-side code on these processors needs to configure/refresh the corresponding timer properly to not throw a watchdog error. The watchdog timers are optional in general, but are mandatory to be added to support watchdog error recovery on a particular processor. These timers can be changed or removed as per the system integration needs, alongside appropriate equivalent changes on the firmware side. Signed-off-by: Angela Stegmaier <angelabaker@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
-rw-r--r--arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi3
-rw-r--r--arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi1
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi b/arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi
index 782ad2b6489d..90132c9d8fd1 100644
--- a/arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi
+++ b/arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi
@@ -23,14 +23,17 @@
23&ipu2 { 23&ipu2 {
24 mboxes = <&mailbox6 &mbox_ipu2_ipc3x>; 24 mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
25 timers = <&timer3>; 25 timers = <&timer3>;
26 watchdog-timers = <&timer4>, <&timer9>;
26}; 27};
27 28
28&ipu1 { 29&ipu1 {
29 mboxes = <&mailbox5 &mbox_ipu1_ipc3x>; 30 mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
30 timers = <&timer11>; 31 timers = <&timer11>;
32 watchdog-timers = <&timer7>, <&timer8>;
31}; 33};
32 34
33&dsp1 { 35&dsp1 {
34 mboxes = <&mailbox5 &mbox_dsp1_ipc3x>; 36 mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
35 timers = <&timer5>; 37 timers = <&timer5>;
38 watchdog-timers = <&timer10>;
36}; 39};
diff --git a/arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi b/arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi
index 95706b8e04bf..3a42fcd69e5f 100644
--- a/arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi
+++ b/arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi
@@ -14,4 +14,5 @@
14&dsp2 { 14&dsp2 {
15 mboxes = <&mailbox6 &mbox_dsp2_ipc3x>; 15 mboxes = <&mailbox6 &mbox_dsp2_ipc3x>;
16 timers = <&timer6>; 16 timers = <&timer6>;
17 watchdog-timers = <&timer13>;
17}; 18};