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authorSuman Anna2019-02-28 22:23:23 -0600
committerSuman Anna2019-03-04 10:02:34 -0600
commit94116fb72f58bcdacc24beccee863f8c2c1e0c11 (patch)
treef3dda49dc596ed026f9c851ac4138809bc853365 /arch/arm/boot/dts
parent0b8f53ecf1fcf96f5ef89154c386da8e3b27f0fa (diff)
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ARM: dts: omap4: Fix functional clocks for ABE DMTimer devices
The hwmod and clkctrl integration code is currently assigning the clkctrl clock associated with MODULEMODE as the main functional clock for nodes that have the ti,hwmods property. This is wrong for devices that actually use mux or gate clocks as their main clock and that are not yet converted to the ti-sysc node hierarchy. The dmtimer clocksource driver cannot use this clock to configure its parents. All the DMTimer nodes except for those present in the ABE domain have been converted to the new ti-sysc node hierarchy style and do not face this issue. The dmtimer consumers got lucky so far due to the default clock matching the requested parent clock, and a silent successful return in the omap_dm_timer_set_source() function. Fix the remaining DMTimer nodes in ABE domain by adding the actual mux clocks to the DMTimer nodes with the "fck" clock-name. These clocks are expected to remain even after the nodes have moved under a ti,sysc parent node. Signed-off-by: Suman Anna <s-anna@ti.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/omap4.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 1a96d4317c97..b3ec1e466820 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -424,6 +424,8 @@
424 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; 424 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
425 ti,hwmods = "timer5"; 425 ti,hwmods = "timer5";
426 ti,timer-dsp; 426 ti,timer-dsp;
427 clocks = <&abe_clkctrl OMAP4_TIMER5_CLKCTRL 24>;
428 clock-names = "fck";
427 }; 429 };
428 430
429 timer6: timer@4013a000 { 431 timer6: timer@4013a000 {
@@ -433,6 +435,8 @@
433 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; 435 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
434 ti,hwmods = "timer6"; 436 ti,hwmods = "timer6";
435 ti,timer-dsp; 437 ti,timer-dsp;
438 clocks = <&abe_clkctrl OMAP4_TIMER6_CLKCTRL 24>;
439 clock-names = "fck";
436 }; 440 };
437 441
438 timer7: timer@4013c000 { 442 timer7: timer@4013c000 {
@@ -442,6 +446,8 @@
442 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; 446 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
443 ti,hwmods = "timer7"; 447 ti,hwmods = "timer7";
444 ti,timer-dsp; 448 ti,timer-dsp;
449 clocks = <&abe_clkctrl OMAP4_TIMER7_CLKCTRL 24>;
450 clock-names = "fck";
445 }; 451 };
446 452
447 timer8: timer@4013e000 { 453 timer8: timer@4013e000 {
@@ -452,6 +458,8 @@
452 ti,hwmods = "timer8"; 458 ti,hwmods = "timer8";
453 ti,timer-pwm; 459 ti,timer-pwm;
454 ti,timer-dsp; 460 ti,timer-dsp;
461 clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
462 clock-names = "fck";
455 }; 463 };
456 464
457 aes1: aes@4b501000 { 465 aes1: aes@4b501000 {