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author | Brad Griffis | 2014-05-19 17:50:52 -0500 |
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committer | Brad Griffis | 2014-05-19 17:50:52 -0500 |
commit | dcbb41407863f1c2ab8e9eb1e2d060b2a5e4266b (patch) | |
tree | 5717ed43020d2e8a1472133b31d4f49ed6bae409 | |
parent | 703ff2587a6a8f10689dafaf7baaa3fdb06c4c28 (diff) | |
download | am335x-dss-files-dcbb41407863f1c2ab8e9eb1e2d060b2a5e4266b.tar.gz am335x-dss-files-dcbb41407863f1c2ab8e9eb1e2d060b2a5e4266b.tar.xz am335x-dss-files-dcbb41407863f1c2ab8e9eb1e2d060b2a5e4266b.zip |
Initial commit for am335x-boot.dss
-rw-r--r-- | .project | 11 | ||||
-rw-r--r-- | am335x-boot.dss | 373 |
2 files changed, 373 insertions, 11 deletions
diff --git a/.project b/.project deleted file mode 100644 index f531543..0000000 --- a/.project +++ /dev/null | |||
@@ -1,11 +0,0 @@ | |||
1 | <?xml version="1.0" encoding="UTF-8"?> | ||
2 | <projectDescription> | ||
3 | <name>am335x-dss-scripts</name> | ||
4 | <comment></comment> | ||
5 | <projects> | ||
6 | </projects> | ||
7 | <buildSpec> | ||
8 | </buildSpec> | ||
9 | <natures> | ||
10 | </natures> | ||
11 | </projectDescription> | ||
diff --git a/am335x-boot.dss b/am335x-boot.dss new file mode 100644 index 0000000..39b9eb4 --- /dev/null +++ b/am335x-boot.dss | |||
@@ -0,0 +1,373 @@ | |||
1 | function d2h(d) {return ("00000000" + (d).toString(16)).slice(-8);} | ||
2 | |||
3 | var newline = "\n"; | ||
4 | |||
5 | function printRegisterValue(ds, name, addr) | ||
6 | { | ||
7 | value = debugSessionDAP.memory.readWord(0,addr,false); | ||
8 | value_string = d2h(value); | ||
9 | file.write(name + " = 0x" + value_string + newline); | ||
10 | return value; // return the register value for interrogation | ||
11 | } | ||
12 | |||
13 | // Build a filename that includes date/time | ||
14 | var today = new Date(); | ||
15 | var year4digit = today.getFullYear(); | ||
16 | var month2digit = ("0" + (today.getMonth()+1)).slice(-2); | ||
17 | var day2digit = ("0" + today.getDate()).slice(-2); | ||
18 | var hour2digit = ("0" + today.getHours()).slice(-2); | ||
19 | var minutes2digit = ("0" + today.getMinutes()).slice(-2); | ||
20 | var seconds2digit = ("0" + today.getSeconds()).slice(-2); | ||
21 | var filename_date = '_' + year4digit + '-' + month2digit + '-' + day2digit + '_' + hour2digit + minutes2digit + seconds2digit; | ||
22 | var userHomeFolder = System.getProperty("user.home"); | ||
23 | var filename = userHomeFolder + '/Desktop/' + 'am335x-boot-analysis' + filename_date + '.txt'; | ||
24 | |||
25 | file = new java.io.FileWriter(filename); | ||
26 | |||
27 | debugSessionDAP = ds.openSession("*","CS_DAP_DebugSS"); | ||
28 | debugSessionDAP.target.connect(); | ||
29 | |||
30 | var reg_val; | ||
31 | |||
32 | // CONTROL: device_id | ||
33 | reg_val = printRegisterValue(debugSessionDAP, "CONTROL: device_id", 0x44E10600); | ||
34 | if ( (reg_val & 0x0FFFFFFF) == 0xb94402e ) {file.write(" * AM335x family" + newline);} | ||
35 | if ( (reg_val & 0xF0000000) == (0 << 28) ) {file.write(" * Silicon Revision 1.0" + newline);} | ||
36 | if ( (reg_val & 0xF0000000) == (1 << 28) ) {file.write(" * Silicon Revision 2.0" + newline);} | ||
37 | if ( (reg_val & 0xF0000000) == (2 << 28) ) {file.write(" * Silicon Revision 2.1" + newline);} | ||
38 | |||
39 | // ROM: PRM_RSTST | ||
40 | file.write(newline); | ||
41 | reg_val = printRegisterValue(debugSessionDAP, "PRM_DEVICE: PRM_RSTST", 0x44E00F08); | ||
42 | if (reg_val & 1<<0 ) {file.write(" * Bit 0 : GLOBAL_COLD_RST" + newline);} | ||
43 | if (reg_val & 1<<1 ) {file.write(" * Bit 1 : GLOBAL_WARM_RST" + newline);} | ||
44 | if (reg_val & 1<<4 ) {file.write(" * Bit 4 : WDT1_RST" + newline);} | ||
45 | if (reg_val & 1<<5 ) {file.write(" * Bit 5 : EXTERNAL_WARM_RST" + newline);} | ||
46 | |||
47 | // CONTROL: control_status | ||
48 | file.write(newline); | ||
49 | reg_val = printRegisterValue(debugSessionDAP, "CONTROL: control_status", 0x44E10040); | ||
50 | boot_sequence = (reg_val & 0x1F); | ||
51 | if ( (reg_val & 3<<22 ) == 0<<22 ) {file.write(" * SYSBOOT[15:14] = 00b (19.2 MHz)" + newline);} | ||
52 | if ( (reg_val & 3<<22 ) == 1<<22 ) {file.write(" * SYSBOOT[15:14] = 01b (24 MHz)" + newline);} | ||
53 | if ( (reg_val & 3<<22 ) == 2<<22 ) {file.write(" * SYSBOOT[15:14] = 10b (25 MHz)" + newline);} | ||
54 | if ( (reg_val & 3<<22 ) == 3<<22 ) {file.write(" * SYSBOOT[15:14] = 11b (26 MHz)" + newline);} | ||
55 | if ( (reg_val & 3<<20 ) != 0<<20 ) {file.write(" * SYSBOOT[13:12] have been set improperly!" + newline);} | ||
56 | if ( (reg_val & 3<<18 ) == 0<<18 ) {file.write(" * SYSBOOT[11:10] = 00b No GPMC CS0 addr/data muxing" + newline);} | ||
57 | if ( (reg_val & 3<<18 ) == 1<<18 ) {file.write(" * SYSBOOT[11:10] = 01b GPMC CS0 addr/addr/data muxing" + newline);} | ||
58 | if ( (reg_val & 3<<18 ) == 2<<18 ) {file.write(" * SYSBOOT[11:10] = 10b GPMC CS0 addr/data muxing" + newline);} | ||
59 | if ( (reg_val & 3<<18 ) == 3<<18 ) {file.write(" * SYSBOOT[11:10] = 11b ILLEGAL VALUE!" + newline);} | ||
60 | if ( (reg_val & 1<<17 ) == 1<<17 ) {file.write(" * SYSBOOT[9] = 0 GPMC CS0 Ignore WAIT input" + newline);} | ||
61 | if ( (reg_val & 1<<17 ) == 1<<17 ) {file.write(" * SYSBOOT[9] = 1 GPMC CS0 Use WAIT input" + newline);} | ||
62 | if ( (reg_val & 1<<16 ) == 1<<16 ) {file.write(" * SYSBOOT[8] = 0 GPMC CS0 8-bit data bus" + newline);} | ||
63 | if ( (reg_val & 1<<16 ) == 1<<16 ) {file.write(" * SYSBOOT[8] = 1 GPMC CS0 16-bit data bus" + newline);} | ||
64 | if ( (reg_val & 7<<8 ) == 3<<8 ) {file.write(" * Device Type = General Purpose (GP)" + newline);} | ||
65 | else {file.write(" * Device Type is NOT GP" + newline);} | ||
66 | if ( (reg_val & 0xFF ) == 0x01 ) {file.write(" * SYSBOOT[8] = 1 GPMC CS0 16-bit data bus" + newline);} | ||
67 | if ( (reg_val & 3<<6 ) == 0<<6 ) {file.write(" * SYSBOOT[7:6] = 00b MII (EMAC boot modes only)" + newline);} | ||
68 | if ( (reg_val & 3<<6 ) == 1<<6 ) {file.write(" * SYSBOOT[7:6] = 01b RMII (EMAC boot modes only)" + newline);} | ||
69 | if ( (reg_val & 3<<6 ) == 2<<6 ) {file.write(" * SYSBOOT[7:6] = 10b ILLEGAL VALUE!" + newline);} | ||
70 | if ( (reg_val & 3<<6 ) == 3<<6 ) {file.write(" * SYSBOOT[7:6] = 11b RGMII no internal delay (EMAC boot modes only)" + newline);} | ||
71 | if ( (reg_val & 1<<5 ) == 0<<5 ) {file.write(" * SYSBOOT[5] = 0 CLKOUT1 disabled" + newline);} | ||
72 | if ( (reg_val & 1<<5 ) == 1<<5 ) {file.write(" * SYSBOOT[5] = 1 CLKOUT1 enabled" + newline);} | ||
73 | if (boot_sequence == 0x00) {file.write(" * RESERVED BOOT SEQUENCE!" + newline);} | ||
74 | if (boot_sequence == 0x01) {file.write(" * Boot Sequence : UART0 -> XIP w/WAIT (MUX2) -> MMC0 -> SPI0" + newline);} | ||
75 | if (boot_sequence == 0x02) {file.write(" * Boot Sequence : UART0 -> SPI0 -> NAND -> NANDI2C" + newline);} | ||
76 | if (boot_sequence == 0x03) {file.write(" * Boot Sequence : UART0 -> SPI0 -> XIP (MUX2) -> MMC0" + newline);} | ||
77 | if (boot_sequence == 0x04) {file.write(" * Boot Sequence : UART0 -> XIP w/WAIT (MUX1) -> MMC0 -> NAND" + newline);} | ||
78 | if (boot_sequence == 0x05) {file.write(" * Boot Sequence : UART0 -> XIP (MUX1) -> SPI0 -> NANDI2C" + newline);} | ||
79 | if (boot_sequence == 0x06) {file.write(" * Boot Sequence : EMAC1 -> SPI0 -> NAND -> NANDI2C" + newline);} | ||
80 | if (boot_sequence == 0x07) {file.write(" * Boot Sequence : EMAC1 -> MMC0 -> XIP w/WAIT (MUX2) -> NAND" + newline);} | ||
81 | if (boot_sequence == 0x08) {file.write(" * Boot Sequence : EMAC1 -> MMC0 -> XIP (MUX2) -> NANDI2C" + newline);} | ||
82 | if (boot_sequence == 0x09) {file.write(" * Boot Sequence : EMAC1 -> XIP w/WAIT (MUX1) -> NAND -> MMC0" + newline);} | ||
83 | if (boot_sequence == 0x0A) {file.write(" * Boot Sequence : EMAC1 -> XIP (MUX1) -> SPI0 -> NANDI2C" + newline);} | ||
84 | if (boot_sequence == 0x0B) {file.write(" * Boot Sequence : USB0 -> NAND -> SPI0 -> MMC0" + newline);} | ||
85 | if (boot_sequence == 0x0C) {file.write(" * Boot Sequence : USB0 -> NAND -> XIP (MUX2) -> NANDI2C" + newline);} | ||
86 | if (boot_sequence == 0x0D) {file.write(" * Boot Sequence : USB0 -> NAND -> XIP (MUX1) -> SPI0" + newline);} | ||
87 | if (boot_sequence == 0x0E) {file.write(" * RESERVED BOOT SEQUENCE!" + newline);} | ||
88 | if (boot_sequence == 0x0F) {file.write(" * Boot Sequence : UART0 -> EMAC1 -> Reserved -> Reserved" + newline);} | ||
89 | if (boot_sequence == 0x10) {file.write(" * Boot Sequence : XIP (MUX1) -> UART0 -> EMAC1 -> MMC0 " + newline);} | ||
90 | if (boot_sequence == 0x11) {file.write(" * Boot Sequence : XIP w/WAIT (MUX1) -> UART0 -> EMAC1 -> MMC0" + newline);} | ||
91 | if (boot_sequence == 0x12) {file.write(" * Boot Sequence : NAND -> NANDI2C -> USB0 -> UART0" + newline);} | ||
92 | if (boot_sequence == 0x13) {file.write(" * Boot Sequence : NAND -> NANDI2C -> MMC0 -> UART0" + newline);} | ||
93 | if (boot_sequence == 0x14) {file.write(" * Boot Sequence : NAND -> NANDI2C -> SPI0 -> EMAC1" + newline);} | ||
94 | if (boot_sequence == 0x15) {file.write(" * Boot Sequence : NANDI2C -> MMC0 -> EMAC1 -> UART0" + newline);} | ||
95 | if (boot_sequence == 0x16) {file.write(" * Boot Sequence : SPI0 -> MMC0 -> UART0 -> EMAC1" + newline);} | ||
96 | if (boot_sequence == 0x17) {file.write(" * Boot Sequence : MMC0 -> SPI0 -> UART0 -> USB0" + newline);} | ||
97 | if (boot_sequence == 0x18) {file.write(" * Boot Sequence : SPI0 -> MMC0 -> USB0 -> UART0" + newline);} | ||
98 | if (boot_sequence == 0x19) {file.write(" * Boot Sequence : SPI0 -> MMC0 -> EMAC1 -> UART0" + newline);} | ||
99 | if (boot_sequence == 0x1A) {file.write(" * Boot Sequence : XIP (MUX2) -> UART0 -> SPI0 -> MMC0" + newline);} | ||
100 | if (boot_sequence == 0x1B) {file.write(" * Boot Sequence : XIP w/WAIT (MUX2) -> UART0 -> SPI0 -> MMC0" + newline);} | ||
101 | if (boot_sequence == 0x1C) {file.write(" * Boot Sequence : MMC1 -> MMC0 -> UART0 -> USB0" + newline);} | ||
102 | if (boot_sequence == 0x1D) {file.write(" * RESERVED BOOT SEQUENCE!" + newline);} | ||
103 | if (boot_sequence == 0x1E) {file.write(" * RESERVED BOOT SEQUENCE!" + newline);} | ||
104 | if (boot_sequence == 0x1F) {file.write(" * Boot Sequence : Fast External Boot -> EMAC1 -> UART0 -> Reserved" + newline);} | ||
105 | |||
106 | // ROM: Tracing Vector 1 | ||
107 | file.write(newline); | ||
108 | reg_val = printRegisterValue(debugSessionDAP, "ROM: Current tracing vector, word 1", 0x4030CE40); | ||
109 | if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [General] Passed the public reset vector" + newline);} | ||
110 | if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [General] Entered main function" + newline);} | ||
111 | if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [General] Running after the cold reset" + newline);} | ||
112 | if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Boot] Main booting routine entered" + newline);} | ||
113 | if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [Memory Boot] Memory booting started" + newline);} | ||
114 | if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [Peripheral Boot] Peripheral booting started" + newline);} | ||
115 | if (reg_val & 1<<6 ) {file.write(" * Bit 6 : [Boot] Booting loop reached last device" + newline);} | ||
116 | if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [Boot] GP header found" + newline);} | ||
117 | if (reg_val & 1<<8 ) {file.write(" * Bit 8 : [Boot] Reserved" + newline);} | ||
118 | if (reg_val & 1<<9 ) {file.write(" * Bit 9 : [Boot] Reserved" + newline);} | ||
119 | if (reg_val & 1<<10 ) {file.write(" * Bit 10 : [Peripheral Boot] Reserved" + newline);} | ||
120 | if (reg_val & 1<<11 ) {file.write(" * Bit 11 : [Peripheral Boot] Reserved" + newline);} | ||
121 | if (reg_val & 1<<12 ) {file.write(" * Bit 12 : [Peripheral Boot] Device initialized" + newline);} | ||
122 | if (reg_val & 1<<13 ) {file.write(" * Bit 13 : [Peripheral Boot] ASIC ID sent" + newline);} | ||
123 | if (reg_val & 1<<14 ) {file.write(" * Bit 14 : [Peripheral Boot] Image received" + newline);} | ||
124 | if (reg_val & 1<<15 ) {file.write(" * Bit 15 : [Peripheral Boot] Peripheral booting failed" + newline);} | ||
125 | if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Peripheral Boot] Booting Message not received (timeout)" + newline);} | ||
126 | if (reg_val & 1<<17 ) {file.write(" * Bit 17 : [Peripheral Boot] Image size not received (timeout)" + newline);} | ||
127 | if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Peripheral Boot] Image not received (timeout)" + newline);} | ||
128 | if (reg_val & 1<<19 ) {file.write(" * Bit 19 : Reserved" + newline);} | ||
129 | if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Configuration Header] CHSETTINGS found" + newline);} | ||
130 | if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Configuration Header] CHSETTINGS executed" + newline);} | ||
131 | if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Configuration Header] CHRAM executed" + newline);} | ||
132 | if (reg_val & 1<<23 ) {file.write(" * Bit 23 : [Configuration Header] CHFLASH executed" + newline);} | ||
133 | if (reg_val & 1<<24 ) {file.write(" * Bit 24 : [Configuration Header] CHMMCSD clocks executed" + newline);} | ||
134 | if (reg_val & 1<<25 ) {file.write(" * Bit 25 : [Configuration Header] CHMMCSD bus width executed" + newline);} | ||
135 | if (reg_val & 1<<26 ) {file.write(" * Bit 26 : Reserved" + newline);} | ||
136 | if (reg_val & 1<<27 ) {file.write(" * Bit 27 : Reserved" + newline);} | ||
137 | if (reg_val & 1<<28 ) {file.write(" * Bit 28 : Reserved" + newline);} | ||
138 | if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} | ||
139 | if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} | ||
140 | if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} | ||
141 | |||
142 | // ROM: Tracing Vector 2 | ||
143 | file.write(newline); | ||
144 | reg_val = printRegisterValue(debugSessionDAP, "ROM: Current tracing vector, word 1", 0x4030CE44); | ||
145 | if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [Companion chip] Reserved" + newline);} | ||
146 | if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [Companion chip] Reserved" + newline);} | ||
147 | if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [Companion chip] Reserved" + newline);} | ||
148 | if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Companion chip] Reserved" + newline);} | ||
149 | if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [USB] USB connect" + newline);} | ||
150 | if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [USB] USB configured state" + newline);} | ||
151 | if (reg_val & 1<<6 ) {file.write(" * Bit 6 : [USB] USB VBUS valid" + newline);} | ||
152 | if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [USB] USB session valid" + newline);} | ||
153 | if (reg_val & 1<<8 ) {file.write(" * Bit 8 : Reserved" + newline);} | ||
154 | if (reg_val & 1<<9 ) {file.write(" * Bit 9 : Reserved" + newline);} | ||
155 | if (reg_val & 1<<10 ) {file.write(" * Bit 10 : Reserved" + newline);} | ||
156 | if (reg_val & 1<<11 ) {file.write(" * Bit 11 : Reserved" + newline);} | ||
157 | if (reg_val & 1<<12 ) {file.write(" * Bit 12 : [Memory Boot] Memory booting trial 0" + newline);} | ||
158 | if (reg_val & 1<<13 ) {file.write(" * Bit 13 : [Memory Boot] Memory booting trial 1" + newline);} | ||
159 | if (reg_val & 1<<14 ) {file.write(" * Bit 14 : [Memory Boot] Memory booting trial 2" + newline);} | ||
160 | if (reg_val & 1<<15 ) {file.write(" * Bit 15 : [Memory Boot] Memory booting trial 3" + newline);} | ||
161 | if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Memory Boot] Execute GP image" + newline);} | ||
162 | if (reg_val & 1<<17 ) {file.write(" * Bit 17 : [Peripheral Boot] Start authentication of peripheral boot image" + newline);} | ||
163 | if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Memory & Peripheral Boot] Jumping to Initial SW" + newline);} | ||
164 | if (reg_val & 1<<19 ) {file.write(" * Bit 19 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
165 | if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Memory & Peripheral Boot] Start image authentication" + newline);} | ||
166 | if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Memory & Peripheral Boot] Image authentication failed" + newline);} | ||
167 | if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Memory & Peripheral Boot] Analyzing SpeedUp" + newline);} | ||
168 | if (reg_val & 1<<23 ) {file.write(" * Bit 23 : [Memory & Peripheral Boot] SpeedUp failed" + newline);} | ||
169 | if (reg_val & 1<<24 ) {file.write(" * Bit 24 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
170 | if (reg_val & 1<<25 ) {file.write(" * Bit 25 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
171 | if (reg_val & 1<<26 ) {file.write(" * Bit 26 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
172 | if (reg_val & 1<<27 ) {file.write(" * Bit 27 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
173 | if (reg_val & 1<<28 ) {file.write(" * Bit 28 : [Memory & Peripheral Boot] Authentication procedure failed" + newline);} | ||
174 | if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} | ||
175 | if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} | ||
176 | if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} | ||
177 | |||
178 | |||
179 | // ROM: Tracing Vector 3 | ||
180 | file.write(newline); | ||
181 | reg_val = printRegisterValue(debugSessionDAP, "ROM: Current tracing vector, word 1", 0x4030CE48); | ||
182 | if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [Memory Boot] Memory booting device NULL" + newline);} | ||
183 | if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [Memory Boot] Memory booting device XIP" + newline);} | ||
184 | if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [Memory Boot] Memory booting device XIPWAIT" + newline);} | ||
185 | if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Memory Boot] Memory booting device NAND" + newline);} | ||
186 | if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [Memory Boot] Reserved" + newline);} | ||
187 | if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [Memory Boot] Memory booting device MMCSD0" + newline);} | ||
188 | if (reg_val & 1<<6 ) {file.write(" * Bit 6 : Reserved" + newline);} | ||
189 | if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [Memory Boot] Memory booting device MMCSD1" + newline);} | ||
190 | if (reg_val & 1<<8 ) {file.write(" * Bit 8 : Reserved" + newline);} | ||
191 | if (reg_val & 1<<9 ) {file.write(" * Bit 9 : Reserved" + newline);} | ||
192 | if (reg_val & 1<<10 ) {file.write(" * Bit 10 : [Memory Boot] Reserved" + newline);} | ||
193 | if (reg_val & 1<<11 ) {file.write(" * Bit 11 : Reserved" + newline);} | ||
194 | if (reg_val & 1<<12 ) {file.write(" * Bit 12 : Memory booting device SPI" + newline);} | ||
195 | if (reg_val & 1<<13 ) {file.write(" * Bit 13 : Reserved" + newline);} | ||
196 | if (reg_val & 1<<14 ) {file.write(" * Bit 14 : Reserved" + newline);} | ||
197 | if (reg_val & 1<<15 ) {file.write(" * Bit 15 : Reserved" + newline);} | ||
198 | if (reg_val & 1<<16 ) {file.write(" * Bit 16 : Peripheral booting device UART0" + newline);} | ||
199 | if (reg_val & 1<<17 ) {file.write(" * Bit 17 : Reserved" + newline);} | ||
200 | if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Peripheral Boot] Reserved" + newline);} | ||
201 | if (reg_val & 1<<19 ) {file.write(" * Bit 19 : Reserved" + newline);} | ||
202 | if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Peripheral Boot] Peripheral booting device USB" + newline);} | ||
203 | if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Peripheral Boot] Reserved" + newline);} | ||
204 | if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Peripheral Boot] Peripheral booting device GPGMAC0" + newline);} | ||
205 | if (reg_val & 1<<23 ) {file.write(" * Bit 23 : Reserved" + newline);} | ||
206 | if (reg_val & 1<<24 ) {file.write(" * Bit 24 : Peripheral booting device NULL" + newline);} | ||
207 | if (reg_val & 1<<25 ) {file.write(" * Bit 25 : Reserved" + newline);} | ||
208 | if (reg_val & 1<<26 ) {file.write(" * Bit 26 : Reserved" + newline);} | ||
209 | if (reg_val & 1<<27 ) {file.write(" * Bit 27 : Reserved" + newline);} | ||
210 | if (reg_val & 1<<28 ) {file.write(" * Bit 28 : Reserved" + newline);} | ||
211 | if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} | ||
212 | if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} | ||
213 | if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} | ||
214 | |||
215 | // ROM: Copy of PRM_RSTST | ||
216 | file.write(newline); | ||
217 | reg_val = printRegisterValue(debugSessionDAP, "ROM: Current copy of PRM_RSTST", 0x4030CE4C); | ||
218 | if (reg_val & 1<<0 ) {file.write(" * Bit 0 : GLOBAL_COLD_RST" + newline);} | ||
219 | if (reg_val & 1<<1 ) {file.write(" * Bit 1 : GLOBAL_WARM_RST" + newline);} | ||
220 | if (reg_val & 1<<4 ) {file.write(" * Bit 4 : WDT1_RST" + newline);} | ||
221 | if (reg_val & 1<<5 ) {file.write(" * Bit 5 : EXTERNAL_WARM_RST" + newline);} | ||
222 | |||
223 | // ROM: Cold Reset Tracing Vector 1 | ||
224 | file.write(newline); | ||
225 | reg_val = printRegisterValue(debugSessionDAP, "ROM: Cold reset tracing vector, word 1", 0x4030CE50); | ||
226 | if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [General] Passed the public reset vector" + newline);} | ||
227 | if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [General] Entered main function" + newline);} | ||
228 | if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [General] Running after the cold reset" + newline);} | ||
229 | if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Boot] Main booting routine entered" + newline);} | ||
230 | if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [Memory Boot] Memory booting started" + newline);} | ||
231 | if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [Peripheral Boot] Peripheral booting started" + newline);} | ||
232 | if (reg_val & 1<<6 ) {file.write(" * Bit 6 : [Boot] Booting loop reached last device" + newline);} | ||
233 | if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [Boot] GP header found" + newline);} | ||
234 | if (reg_val & 1<<8 ) {file.write(" * Bit 8 : [Boot] Reserved" + newline);} | ||
235 | if (reg_val & 1<<9 ) {file.write(" * Bit 9 : [Boot] Reserved" + newline);} | ||
236 | if (reg_val & 1<<10 ) {file.write(" * Bit 10 : [Peripheral Boot] Reserved" + newline);} | ||
237 | if (reg_val & 1<<11 ) {file.write(" * Bit 11 : [Peripheral Boot] Reserved" + newline);} | ||
238 | if (reg_val & 1<<12 ) {file.write(" * Bit 12 : [Peripheral Boot] Device initialized" + newline);} | ||
239 | if (reg_val & 1<<13 ) {file.write(" * Bit 13 : [Peripheral Boot] ASIC ID sent" + newline);} | ||
240 | if (reg_val & 1<<14 ) {file.write(" * Bit 14 : [Peripheral Boot] Image received" + newline);} | ||
241 | if (reg_val & 1<<15 ) {file.write(" * Bit 15 : [Peripheral Boot] Peripheral booting failed" + newline);} | ||
242 | if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Peripheral Boot] Booting Message not received (timeout)" + newline);} | ||
243 | if (reg_val & 1<<17 ) {file.write(" * Bit 17 : [Peripheral Boot] Image size not received (timeout)" + newline);} | ||
244 | if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Peripheral Boot] Image not received (timeout)" + newline);} | ||
245 | if (reg_val & 1<<19 ) {file.write(" * Bit 19 : Reserved" + newline);} | ||
246 | if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Configuration Header] CHSETTINGS found" + newline);} | ||
247 | if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Configuration Header] CHSETTINGS executed" + newline);} | ||
248 | if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Configuration Header] CHRAM executed" + newline);} | ||
249 | if (reg_val & 1<<23 ) {file.write(" * Bit 23 : [Configuration Header] CHFLASH executed" + newline);} | ||
250 | if (reg_val & 1<<24 ) {file.write(" * Bit 24 : [Configuration Header] CHMMCSD clocks executed" + newline);} | ||
251 | if (reg_val & 1<<25 ) {file.write(" * Bit 25 : [Configuration Header] CHMMCSD bus width executed" + newline);} | ||
252 | if (reg_val & 1<<26 ) {file.write(" * Bit 26 : Reserved" + newline);} | ||
253 | if (reg_val & 1<<27 ) {file.write(" * Bit 27 : Reserved" + newline);} | ||
254 | if (reg_val & 1<<28 ) {file.write(" * Bit 28 : Reserved" + newline);} | ||
255 | if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} | ||
256 | if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} | ||
257 | if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} | ||
258 | |||
259 | // ROM: Cold Reset Tracing Vector 2 | ||
260 | file.write(newline); | ||
261 | reg_val = printRegisterValue(debugSessionDAP, "ROM: Cold reset tracing vector, word 1", 0x4030CE54); | ||
262 | if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [Companion chip] Reserved" + newline);} | ||
263 | if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [Companion chip] Reserved" + newline);} | ||
264 | if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [Companion chip] Reserved" + newline);} | ||
265 | if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Companion chip] Reserved" + newline);} | ||
266 | if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [USB] USB connect" + newline);} | ||
267 | if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [USB] USB configured state" + newline);} | ||
268 | if (reg_val & 1<<6 ) {file.write(" * Bit 6 : [USB] USB VBUS valid" + newline);} | ||
269 | if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [USB] USB session valid" + newline);} | ||
270 | if (reg_val & 1<<8 ) {file.write(" * Bit 8 : Reserved" + newline);} | ||
271 | if (reg_val & 1<<9 ) {file.write(" * Bit 9 : Reserved" + newline);} | ||
272 | if (reg_val & 1<<10 ) {file.write(" * Bit 10 : Reserved" + newline);} | ||
273 | if (reg_val & 1<<11 ) {file.write(" * Bit 11 : Reserved" + newline);} | ||
274 | if (reg_val & 1<<12 ) {file.write(" * Bit 12 : [Memory Boot] Memory booting trial 0" + newline);} | ||
275 | if (reg_val & 1<<13 ) {file.write(" * Bit 13 : [Memory Boot] Memory booting trial 1" + newline);} | ||
276 | if (reg_val & 1<<14 ) {file.write(" * Bit 14 : [Memory Boot] Memory booting trial 2" + newline);} | ||
277 | if (reg_val & 1<<15 ) {file.write(" * Bit 15 : [Memory Boot] Memory booting trial 3" + newline);} | ||
278 | if (reg_val & 1<<16 ) {file.write(" * Bit 16 : [Memory Boot] Execute GP image" + newline);} | ||
279 | if (reg_val & 1<<17 ) {file.write(" * Bit 17 : [Peripheral Boot] Start authentication of peripheral boot image" + newline);} | ||
280 | if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Memory & Peripheral Boot] Jumping to Initial SW" + newline);} | ||
281 | if (reg_val & 1<<19 ) {file.write(" * Bit 19 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
282 | if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Memory & Peripheral Boot] Start image authentication" + newline);} | ||
283 | if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Memory & Peripheral Boot] Image authentication failed" + newline);} | ||
284 | if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Memory & Peripheral Boot] Analyzing SpeedUp" + newline);} | ||
285 | if (reg_val & 1<<23 ) {file.write(" * Bit 23 : [Memory & Peripheral Boot] SpeedUp failed" + newline);} | ||
286 | if (reg_val & 1<<24 ) {file.write(" * Bit 24 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
287 | if (reg_val & 1<<25 ) {file.write(" * Bit 25 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
288 | if (reg_val & 1<<26 ) {file.write(" * Bit 26 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
289 | if (reg_val & 1<<27 ) {file.write(" * Bit 27 : [Memory & Peripheral Boot] Reserved" + newline);} | ||
290 | if (reg_val & 1<<28 ) {file.write(" * Bit 28 : [Memory & Peripheral Boot] Authentication procedure failed" + newline);} | ||
291 | if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} | ||
292 | if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} | ||
293 | if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} | ||
294 | |||
295 | // ROM: Cold Reset Tracing Vector 3 | ||
296 | file.write(newline); | ||
297 | reg_val = printRegisterValue(debugSessionDAP, "ROM: Cold reset tracing vector, word 1", 0x4030CE58); | ||
298 | if (reg_val & 1<<0 ) {file.write(" * Bit 0 : [Memory Boot] Memory booting device NULL" + newline);} | ||
299 | if (reg_val & 1<<1 ) {file.write(" * Bit 1 : [Memory Boot] Memory booting device XIP" + newline);} | ||
300 | if (reg_val & 1<<2 ) {file.write(" * Bit 2 : [Memory Boot] Memory booting device XIPWAIT" + newline);} | ||
301 | if (reg_val & 1<<3 ) {file.write(" * Bit 3 : [Memory Boot] Memory booting device NAND" + newline);} | ||
302 | if (reg_val & 1<<4 ) {file.write(" * Bit 4 : [Memory Boot] Reserved" + newline);} | ||
303 | if (reg_val & 1<<5 ) {file.write(" * Bit 5 : [Memory Boot] Memory booting device MMCSD0" + newline);} | ||
304 | if (reg_val & 1<<6 ) {file.write(" * Bit 6 : Reserved" + newline);} | ||
305 | if (reg_val & 1<<7 ) {file.write(" * Bit 7 : [Memory Boot] Memory booting device MMCSD1" + newline);} | ||
306 | if (reg_val & 1<<8 ) {file.write(" * Bit 8 : Reserved" + newline);} | ||
307 | if (reg_val & 1<<9 ) {file.write(" * Bit 9 : Reserved" + newline);} | ||
308 | if (reg_val & 1<<10 ) {file.write(" * Bit 10 : [Memory Boot] Reserved" + newline);} | ||
309 | if (reg_val & 1<<11 ) {file.write(" * Bit 11 : Reserved" + newline);} | ||
310 | if (reg_val & 1<<12 ) {file.write(" * Bit 12 : Memory booting device SPI" + newline);} | ||
311 | if (reg_val & 1<<13 ) {file.write(" * Bit 13 : Reserved" + newline);} | ||
312 | if (reg_val & 1<<14 ) {file.write(" * Bit 14 : Reserved" + newline);} | ||
313 | if (reg_val & 1<<15 ) {file.write(" * Bit 15 : Reserved" + newline);} | ||
314 | if (reg_val & 1<<16 ) {file.write(" * Bit 16 : Peripheral booting device UART0" + newline);} | ||
315 | if (reg_val & 1<<17 ) {file.write(" * Bit 17 : Reserved" + newline);} | ||
316 | if (reg_val & 1<<18 ) {file.write(" * Bit 18 : [Peripheral Boot] Reserved" + newline);} | ||
317 | if (reg_val & 1<<19 ) {file.write(" * Bit 19 : Reserved" + newline);} | ||
318 | if (reg_val & 1<<20 ) {file.write(" * Bit 20 : [Peripheral Boot] Peripheral booting device USB" + newline);} | ||
319 | if (reg_val & 1<<21 ) {file.write(" * Bit 21 : [Peripheral Boot] Reserved" + newline);} | ||
320 | if (reg_val & 1<<22 ) {file.write(" * Bit 22 : [Peripheral Boot] Peripheral booting device GPGMAC0" + newline);} | ||
321 | if (reg_val & 1<<23 ) {file.write(" * Bit 23 : Reserved" + newline);} | ||
322 | if (reg_val & 1<<24 ) {file.write(" * Bit 24 : Peripheral booting device NULL" + newline);} | ||
323 | if (reg_val & 1<<25 ) {file.write(" * Bit 25 : Reserved" + newline);} | ||
324 | if (reg_val & 1<<26 ) {file.write(" * Bit 26 : Reserved" + newline);} | ||
325 | if (reg_val & 1<<27 ) {file.write(" * Bit 27 : Reserved" + newline);} | ||
326 | if (reg_val & 1<<28 ) {file.write(" * Bit 28 : Reserved" + newline);} | ||
327 | if (reg_val & 1<<29 ) {file.write(" * Bit 29 : Reserved" + newline);} | ||
328 | if (reg_val & 1<<30 ) {file.write(" * Bit 30 : Reserved" + newline);} | ||
329 | if (reg_val & 1<<31 ) {file.write(" * Bit 31 : Reserved" + newline);} | ||
330 | |||
331 | |||
332 | debugSessionDAP.target.disconnect(); | ||
333 | |||
334 | |||
335 | debugSessionA8 = ds.openSession("*","CortxA8"); | ||
336 | debugSessionA8.target.connect(); | ||
337 | |||
338 | // Get value of ARM Program Counter | ||
339 | value = debugSessionA8.memory.readRegister("PC"); | ||
340 | value_string = d2h(value); | ||
341 | file.write(newline + "Cortex A8 Program Counter = 0x" + value_string + newline); | ||
342 | |||
343 | file.write(newline); | ||
344 | file.write("ROM Exception Vectors" + newline); | ||
345 | file.write(" * 0x4030CE04 Undefined" + newline); | ||
346 | file.write(" * 0x4030CE08 SWI" + newline); | ||
347 | file.write(" * 0x4030CE0C Pre-fetch abort" + newline); | ||
348 | file.write(" * 0x4030CE10 Data abort" + newline); | ||
349 | file.write(" * 0x4030CE14 Unused" + newline); | ||
350 | file.write(" * 0x4030CE18 IRQ" + newline); | ||
351 | file.write(" * 0x4030CE1C FIQ" + newline); | ||
352 | |||
353 | file.write(newline); | ||
354 | file.write("ROM Dead Loops" + newline); | ||
355 | file.write(" * 0x00020080 Undefined exception default handler" + newline); | ||
356 | file.write(" * 0x00020084 SWI exception default handler" + newline); | ||
357 | file.write(" * 0x00020088 Pre-fetch abort exception default handler" + newline); | ||
358 | file.write(" * 0x0002008C Data exception default handler" + newline); | ||
359 | file.write(" * 0x00020090 Unused exception default handler" + newline); | ||
360 | file.write(" * 0x00020094 IRQ exception default handler" + newline); | ||
361 | file.write(" * 0x00020098 FIQ exception default handler" + newline); | ||
362 | file.write(" * 0x0002009C Validation test PASS" + newline); | ||
363 | file.write(" * 0x000200A0 Validation test FAIL" + newline); | ||
364 | file.write(" * 0x000200A4 Reserved" + newline); | ||
365 | file.write(" * 0x000200A8 Image not executed or returned" + newline); | ||
366 | file.write(" * 0x000200AC Reserved" + newline); | ||
367 | file.write(" * 0x000200B0 Reserved" + newline); | ||
368 | file.write(" * 0x000200B4 Reserved" + newline); | ||
369 | file.write(" * 0x000200B8 Reserved" + newline); | ||
370 | file.write(" * 0x000200BC Reserved" + newline); | ||
371 | |||
372 | debugSessionA8.target.disconnect(); | ||
373 | file.close(); | ||