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authorBrad Griffis2018-06-15 16:48:23 -0500
committerBrad Griffis2018-06-15 16:48:23 -0500
commit9cf4306f10503ffebcce9e28de8ff6c234daf773 (patch)
tree406736b76d99d585ef026240bca15fb050a71cfa
parentdb71b24c1c3019be9b4a59a807ae8b2b493ecd56 (diff)
downloadam43xx-dss-files-9cf4306f10503ffebcce9e28de8ff6c234daf773.tar.gz
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am43xx-dss-files-9cf4306f10503ffebcce9e28de8ff6c234daf773.zip
[AM4] Fix IOCTRL parsing
-rwxr-xr-xam43xx-ddr-analysis.dss168
1 files changed, 106 insertions, 62 deletions
diff --git a/am43xx-ddr-analysis.dss b/am43xx-ddr-analysis.dss
index 1cf7756..10612ea 100755
--- a/am43xx-ddr-analysis.dss
+++ b/am43xx-ddr-analysis.dss
@@ -46,10 +46,10 @@ function getRegisterValue(ds, addr)
46 return ds.memory.readWord(0,addr,false); 46 return ds.memory.readWord(0,addr,false);
47} 47}
48 48
49function interpret_cmd_phy_macro(value, index) 49function interpret_addrctrl_phy_macro(value_wd0, value_wd1, index)
50{ 50{
51 WD1 = (value >> (21+index)) & 1; 51 WD1 = (value_wd1 >> index) & 1;
52 WD0 = (value >> (10+index)) & 1; 52 WD0 = (value_wd0 >> index) & 1;
53 WD = (WD1 << 1) | WD0; 53 WD = (WD1 << 1) | WD0;
54 if (WD == 0) return_string = "Pullup/Pulldown disabled\n"; 54 if (WD == 0) return_string = "Pullup/Pulldown disabled\n";
55 if (WD == 1) return_string = "Weak pullup enabled\n"; 55 if (WD == 1) return_string = "Weak pullup enabled\n";
@@ -270,19 +270,8 @@ if (original_CM_PER_EMIF_CLKSTCTRL & 0x7<<8) {
270 file.write(" * If you are attempting to enter DS0 this is normal.\n"); 270 file.write(" * If you are attempting to enter DS0 this is normal.\n");
271} 271}
272 272
273// CONTROL: DDR_CMD0_IOCTRL 273// CONTROL: CTRL_DDR_ADDRCTRL_IOCTRL
274reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_CMD0_IOCTRL", 0x44E11404); 274reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_ADDRCTRL_IOCTRL", 0x44E11404);
275file.write(" * ddr_ba2 " + interpret_cmd_phy_macro(reg_val, 0));
276file.write(" * ddr_wen " + interpret_cmd_phy_macro(reg_val, 1));
277file.write(" * ddr_ba0 " + interpret_cmd_phy_macro(reg_val, 2));
278file.write(" * ddr_a5 " + interpret_cmd_phy_macro(reg_val, 3));
279file.write(" * ddr_ck " + interpret_cmd_phy_macro(reg_val, 4));
280file.write(" * ddr_ckn " + interpret_cmd_phy_macro(reg_val, 5));
281file.write(" * ddr_a3 " + interpret_cmd_phy_macro(reg_val, 6));
282file.write(" * ddr_a4 " + interpret_cmd_phy_macro(reg_val, 7));
283file.write(" * ddr_a8 " + interpret_cmd_phy_macro(reg_val, 8));
284file.write(" * ddr_a9 " + interpret_cmd_phy_macro(reg_val, 9));
285file.write(" * ddr_a6 " + interpret_cmd_phy_macro(reg_val, 10));
286file.write(" * Bits 9:5 control ddr_ck and ddr_ckn\n"); 275file.write(" * Bits 9:5 control ddr_ck and ddr_ckn\n");
287file.write(" - Slew "); 276file.write(" - Slew ");
288if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");} 277if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
@@ -291,7 +280,7 @@ if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
291if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");} 280if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
292var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5; 281var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
293file.write(" - Drive Strength " + drive_strength_mA + " mA\n"); 282file.write(" - Drive Strength " + drive_strength_mA + " mA\n");
294file.write(" * Bits 4:0 control ddr_ba0, ddr_ba2, ddr_wen, ddr_a[9:8], ddr_a[6:3]\n"); 283file.write(" * Bits 4:0 control all other address/control pins\n");
295file.write(" - Slew "); 284file.write(" - Slew ");
296if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");} 285if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
297if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");} 286if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}
@@ -300,37 +289,63 @@ if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
300var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5; 289var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
301file.write(" - Drive Strength " + drive_strength_mA + " mA\n"); 290file.write(" - Drive Strength " + drive_strength_mA + " mA\n");
302 291
303// CONTROL: DDR_CMD1_IOCTRL 292// CTRL_DDR_ADDRCTRL_WD0_IOCTRL and CTRL_DDR_ADDRCTRL_WD1_IOCTRL
304reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_CMD1_IOCTRL", 0x44E11408); 293var reg_val_wd0;
305file.write(" * ddr_a15 " + interpret_cmd_phy_macro(reg_val, 1)); 294var reg_val_wd1;
306file.write(" * ddr_a2 " + interpret_cmd_phy_macro(reg_val, 2)); 295reg_val_wd0 = printRegisterValue(debugSessionDAP, "CTRL_DDR_ADDRCTRL_WD0_IOCTRL", 0x44E11408);
307file.write(" * ddr_a12 " + interpret_cmd_phy_macro(reg_val, 3)); 296reg_val_wd1 = printRegisterValue(debugSessionDAP, "CTRL_DDR_ADDRCTRL_WD1_IOCTRL", 0x44E1140C);
308file.write(" * ddr_a7 " + interpret_cmd_phy_macro(reg_val, 4)); 297file.write(" * [ddr_a0 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 0));
309file.write(" * ddr_ba1 " + interpret_cmd_phy_macro(reg_val, 5)); 298file.write(" * [ddr_a1 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 1));
310file.write(" * ddr_a10 " + interpret_cmd_phy_macro(reg_val, 6)); 299file.write(" * [ddr_a2 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 2));
311file.write(" * ddr_a0 " + interpret_cmd_phy_macro(reg_val, 7)); 300file.write(" * [ddr_a3 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 3));
312file.write(" * ddr_a11 " + interpret_cmd_phy_macro(reg_val, 8)); 301file.write(" * [ddr_a4 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 4));
313file.write(" * ddr_casn " + interpret_cmd_phy_macro(reg_val, 9)); 302file.write(" * [ddr_a5 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 5));
314file.write(" * ddr_rasn " + interpret_cmd_phy_macro(reg_val, 10)); 303file.write(" * [ddr_a6 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 6));
315file.write(" * Bits 4:0 control ddr_15, ddr_a[12:10], ddr_a7, ddr_a2, ddr_a0, ddr_ba1, ddr_casn, ddr_rasn\n"); 304file.write(" * [ddr_a7 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 7));
305file.write(" * [ddr_a8 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 8));
306file.write(" * [ddr_a9 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 9));
307file.write(" * [ddr_a10 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 10));
308file.write(" * [ddr_a11 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 11));
309file.write(" * [ddr_a12 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 12));
310file.write(" * [ddr_a13 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 13));
311file.write(" * [ddr_a14 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 14));
312file.write(" * [ddr_a15 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 15));
313file.write(" * [ddr_ba2 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 16));
314file.write(" * [ddr_ba1 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 17));
315file.write(" * [ddr_ba0 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 18));
316file.write(" * [ddr_wen ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 19));
317file.write(" * [ddr_rasn ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 20));
318file.write(" * [ddr_casn ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 21));
319file.write(" * [ddr_nck ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 22));
320file.write(" * [ddr_ck ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 23));
321file.write(" * [ddr_cke ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 24));
322file.write(" * [ddr_csn1 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 25));
323file.write(" * [ddr_csn0 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 26));
324file.write(" * [ddr_resetn] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 27));
325file.write(" * [ddr_odt1 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 28));
326file.write(" * [ddr_odt0 ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 29));
327
328// CTRL_DDR_DATA0_IOCTRL
329reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_DATA0_IOCTRL", 0x44E11440);
330file.write(" * ddr_d0 " + interpret_data_phy_macro(reg_val, 0));
331file.write(" * ddr_d1 " + interpret_data_phy_macro(reg_val, 1));
332file.write(" * ddr_d2 " + interpret_data_phy_macro(reg_val, 2));
333file.write(" * ddr_d3 " + interpret_data_phy_macro(reg_val, 3));
334file.write(" * ddr_d4 " + interpret_data_phy_macro(reg_val, 4));
335file.write(" * ddr_d5 " + interpret_data_phy_macro(reg_val, 5));
336file.write(" * ddr_d6 " + interpret_data_phy_macro(reg_val, 6));
337file.write(" * ddr_d7 " + interpret_data_phy_macro(reg_val, 7));
338file.write(" * ddr_dqm0 " + interpret_data_phy_macro(reg_val, 8));
339file.write(" * ddr_dqs0 and ddr_dqsn0 " + interpret_data_phy_macro(reg_val, 9));
340file.write(" * Bits 9:5 control ddr_dqs0, ddr_dqsn0\n");
316file.write(" - Slew "); 341file.write(" - Slew ");
317if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");} 342if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
318if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");} 343if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}
319if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");} 344if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
320if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");} 345if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
321var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5; 346var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
322file.write(" - Drive Strength " + drive_strength_mA + " mA\n"); 347file.write(" - Drive Strength " + drive_strength_mA + " mA\n");
323 348file.write(" * Bits 4:0 control ddr_d[7:0], dqm0\n");
324// CONTROL: DDR_CMD2_IOCTRL
325reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_CMD2_IOCTRL", 0x44E1140C);
326file.write(" * ddr_cke " + interpret_cmd_phy_macro(reg_val, 0));
327file.write(" * ddr_resetn " + interpret_cmd_phy_macro(reg_val, 1));
328file.write(" * ddr_odt " + interpret_cmd_phy_macro(reg_val, 2));
329file.write(" * ddr_a14 " + interpret_cmd_phy_macro(reg_val, 4));
330file.write(" * ddr_a13 " + interpret_cmd_phy_macro(reg_val, 5));
331file.write(" * ddr_csn0 " + interpret_cmd_phy_macro(reg_val, 6));
332file.write(" * ddr_a1 " + interpret_cmd_phy_macro(reg_val, 8));
333file.write(" * Bits 4:0 control ddr_cke, ddr_resetn, ddr_odt, ddr_csn0, ddr_[a14:13], ddr_a1\n");
334file.write(" - Slew "); 349file.write(" - Slew ");
335if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");} 350if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
336if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");} 351if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}
@@ -339,8 +354,8 @@ if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
339var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5; 354var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
340file.write(" - Drive Strength " + drive_strength_mA + " mA\n"); 355file.write(" - Drive Strength " + drive_strength_mA + " mA\n");
341 356
342// CONTROL: DDR_DATA0_IOCTRL 357// CTRL_DDR_DATA1_IOCTRL
343reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_DATA0_IOCTRL", 0x44E11440); 358reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_DATA1_IOCTRL", 0x44E11444);
344file.write(" * ddr_d8 " + interpret_data_phy_macro(reg_val, 0)); 359file.write(" * ddr_d8 " + interpret_data_phy_macro(reg_val, 0));
345file.write(" * ddr_d9 " + interpret_data_phy_macro(reg_val, 1)); 360file.write(" * ddr_d9 " + interpret_data_phy_macro(reg_val, 1));
346file.write(" * ddr_d10 " + interpret_data_phy_macro(reg_val, 2)); 361file.write(" * ddr_d10 " + interpret_data_phy_macro(reg_val, 2));
@@ -368,19 +383,19 @@ if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
368var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5; 383var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
369file.write(" - Drive Strength " + drive_strength_mA + " mA\n"); 384file.write(" - Drive Strength " + drive_strength_mA + " mA\n");
370 385
371// CONTROL: DDR_DATA1_IOCTRL 386// CTRL_DDR_DATA2_IOCTRL
372reg_val = printRegisterValue(debugSessionDAP, "CONTROL: DDR_DATA1_IOCTRL", 0x44E11444); 387reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_DATA2_IOCTRL", 0x44E11448);
373file.write(" * ddr_d0 " + interpret_data_phy_macro(reg_val, 0)); 388file.write(" * ddr_d16 " + interpret_data_phy_macro(reg_val, 0));
374file.write(" * ddr_d1 " + interpret_data_phy_macro(reg_val, 1)); 389file.write(" * ddr_d17 " + interpret_data_phy_macro(reg_val, 1));
375file.write(" * ddr_d2 " + interpret_data_phy_macro(reg_val, 2)); 390file.write(" * ddr_d18 " + interpret_data_phy_macro(reg_val, 2));
376file.write(" * ddr_d3 " + interpret_data_phy_macro(reg_val, 3)); 391file.write(" * ddr_d19 " + interpret_data_phy_macro(reg_val, 3));
377file.write(" * ddr_d4 " + interpret_data_phy_macro(reg_val, 4)); 392file.write(" * ddr_d20 " + interpret_data_phy_macro(reg_val, 4));
378file.write(" * ddr_d5 " + interpret_data_phy_macro(reg_val, 5)); 393file.write(" * ddr_d21 " + interpret_data_phy_macro(reg_val, 5));
379file.write(" * ddr_d6 " + interpret_data_phy_macro(reg_val, 6)); 394file.write(" * ddr_d22 " + interpret_data_phy_macro(reg_val, 6));
380file.write(" * ddr_d7 " + interpret_data_phy_macro(reg_val, 7)); 395file.write(" * ddr_d23 " + interpret_data_phy_macro(reg_val, 7));
381file.write(" * ddr_dqm0 " + interpret_data_phy_macro(reg_val, 8)); 396file.write(" * ddr_dqm2 " + interpret_data_phy_macro(reg_val, 8));
382file.write(" * ddr_dqs0 and ddr_dqsn0 " + interpret_data_phy_macro(reg_val, 9)); 397file.write(" * ddr_dqs2 and ddr_dqsn2 " + interpret_data_phy_macro(reg_val, 9));
383file.write(" * Bits 9:5 control ddr_dqs0, ddr_dqsn0\n"); 398file.write(" * Bits 9:5 control ddr_dqs2, ddr_dqsn2\n");
384file.write(" - Slew "); 399file.write(" - Slew ");
385if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");} 400if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
386if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");} 401if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}
@@ -388,7 +403,36 @@ if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
388if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");} 403if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
389var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5; 404var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
390file.write(" - Drive Strength " + drive_strength_mA + " mA\n"); 405file.write(" - Drive Strength " + drive_strength_mA + " mA\n");
391file.write(" * Bits 4:0 control ddr_d[7:0], dqm0\n"); 406file.write(" * Bits 4:0 control ddr_d[23:16], ddr_dqm2\n");
407file.write(" - Slew ");
408if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
409if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}
410if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}
411if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
412var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
413file.write(" - Drive Strength " + drive_strength_mA + " mA\n");
414
415// CTRL_DDR_DATA3_IOCTRL
416reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_DATA3_IOCTRL", 0x44E1144C);
417file.write(" * ddr_d24 " + interpret_data_phy_macro(reg_val, 0));
418file.write(" * ddr_d25 " + interpret_data_phy_macro(reg_val, 1));
419file.write(" * ddr_d26 " + interpret_data_phy_macro(reg_val, 2));
420file.write(" * ddr_d27 " + interpret_data_phy_macro(reg_val, 3));
421file.write(" * ddr_d28 " + interpret_data_phy_macro(reg_val, 4));
422file.write(" * ddr_d29 " + interpret_data_phy_macro(reg_val, 5));
423file.write(" * ddr_d30 " + interpret_data_phy_macro(reg_val, 6));
424file.write(" * ddr_d31 " + interpret_data_phy_macro(reg_val, 7));
425file.write(" * ddr_dqm3 " + interpret_data_phy_macro(reg_val, 8));
426file.write(" * ddr_dqs3 and ddr_dqsn3 " + interpret_data_phy_macro(reg_val, 9));
427file.write(" * Bits 9:5 control ddr_dqs3, ddr_dqsn3\n");
428file.write(" - Slew ");
429if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
430if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}
431if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
432if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
433var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
434file.write(" - Drive Strength " + drive_strength_mA + " mA\n");
435file.write(" * Bits 4:0 control ddr_d[31:24], ddr_dqm3\n");
392file.write(" - Slew "); 436file.write(" - Slew ");
393if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");} 437if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
394if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");} 438if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}