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/*
 * Copyright (c) 2018, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

function d2h(d) {return ("00000000" + (d).toString(16)).slice(-8);}

// helper function to create decimal numbers in ascii format
function d2d(d) {return ((+d).toString());}

function printRegisterValue(ds, name, addr)
{
	value = debugSessionDAP.memory.readWord(0,addr,false);
	value_string = d2h(value);
	file.write(name + " = 0x" + value_string + "\n");
	return value; // return the register value for interrogation
}

function getRegisterValue(ds, addr)
{
	return ds.memory.readWord(0,addr,false);
}

function interpret_addrctrl_phy_macro(value_wd0, value_wd1, index)
{
	WD1 = (value_wd1 >> index) & 1;
	WD0 = (value_wd0 >> index) & 1;
	WD = (WD1 << 1) | WD0;
	if (WD == 0) return_string = "Pullup/Pulldown disabled\n";
	if (WD == 1) return_string = "Weak pullup enabled\n";
	if (WD == 2) return_string = "Weak pulldown enabled\n";
	if (WD == 3) return_string = "Weak keeper enabled\n"; 
	return return_string;
}

function interpret_data_phy_macro(value, index)
{
	WD1 = (value >> (20+index)) & 1;
	WD0 = (value >> (10+index)) & 1;
	WD = (WD1 << 1) | WD0;
	if (WD == 0) return_string = "Pullup/Pulldown disabled\n";
	if (WD == 1) return_string = "Weak pullup enabled\n";
	if (WD == 2) return_string = "Weak pulldown enabled\n";
	if (WD == 3) return_string = "Weak keeper enabled\n"; 
	return return_string;
}

// Inputs:
//   Data - 32-bit register value
//   Upper - Highest bit to keep
//   Lower - Lowest bit to keep
//   (bit 0 refers to LSB, bit 31 to MSB)
// Return: right aligned data
function bits32(data, upper, lower)
{
	data = data >>> lower; // unsigned right-shift
	upper = upper - lower;
	bitmask =  0xFFFFFFFF >>> (31 - upper);
	return (data & bitmask);
}

// Build a filename that includes date/time
var today = new Date();
var year4digit = today.getFullYear();
var month2digit = ("0" + (today.getMonth()+1)).slice(-2);
var day2digit = ("0" + today.getDate()).slice(-2);
var hour2digit = ("0" + today.getHours()).slice(-2);
var minutes2digit = ("0" + today.getMinutes()).slice(-2);
var seconds2digit = ("0" + today.getSeconds()).slice(-2);
var filename_date = '_' + year4digit + '-' + month2digit + '-' + day2digit + '_' + hour2digit + minutes2digit + seconds2digit; 
var userHomeFolder = System.getProperty("user.home");
var filename = userHomeFolder + '/Desktop/' + 'am43xx-ddr-analysis' + filename_date + '.txt';

debugSessionDAP = ds.openSession("*","CS_DAP_DebugSS");

try {
	debugSessionDAP.target.connect();
} catch (ex) {
	print("\n ERROR: Could not connect to CS_DAP_DebugSS.\n");
}

var original_CM_WKUP_DEBUGSS_CLKCTRL = debugSessionDAP.memory.readWord(0,0x44df2820,false);
var original_CM_PER_EMIF_CLKSTCTRL = debugSessionDAP.memory.readWord(0,0x44DF8F00,false);

file = new java.io.FileWriter(filename);

var reg_val;
var newline = "\n";

// CONTROL: device_id
reg_val = printRegisterValue(debugSessionDAP, "CONTROL: device_id", 0x44E10600);
if ( bits32(reg_val, 27, 0) == 0xb98c02f ) {file.write("  * AM43xx family" + newline);}
if ( bits32(reg_val, 31, 28) == 1 ) {
	file.write("  * Silicon Revision 1.1" + newline);
	PG = 1.1;
}
if ( bits32(reg_val, 31, 28) == 2 ) {
	file.write("  * Silicon Revision 1.2" + newline);
	PG = 1.2;
}

// CONTROL: control_status
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "CONTROL: control_status", 0x44E10040);
if ( PG == 1.2) {
	if ( bits32(reg_val, 26, 26) == 1 ) {
			if ( bits32(reg_val, 5, 5) == 1 ) {
				file.write("  * Bits 26 (SYSBOOT18=1) and 5 (SYSBOOT5=1): Route 50MHz EXTCLK to CLKOUT2" + newline);
			} else {
				file.write("  * Bits 26 (SYSBOOT18=1) and 5 (SYSBOOT5=0): Route 25MHz EXTCLK to CLKOUT2" + newline);
			}
	} else {
		file.write("  * Bit 26 (SYSBOOT18=0): Do not route EXTCLK to CLKOUT2" + newline);
	}
}
SYSBOOT15_14 = bits32(reg_val, 23, 22);
file.write("  * Bits 23:22 (SYSBOOT15:14=" + d2d(SYSBOOT15_14) + "): ");
switch (SYSBOOT15_14) {
	case 0:
		file.write("19.2 MHz" + newline);
		input_clock = 19.2;
		break;
	case  1:
		file.write("24 MHz" + newline);
		input_clock = 24;
		break;
	case 2:
		file.write("25 MHz" + newline);
		input_clock = 25;
		break;
	case 3:
		file.write("26 MHz" + newline);
		input_clock = 26;
		break;
}
file.write(newline);

// CM_CLKSEL_DPLL_DDR
reg_val = printRegisterValue(debugSessionDAP, "CM_CLKSEL_DPLL_DDR", 0x44DF2DAC);
dpll_mult = bits32(reg_val, 18, 8);
file.write("  * DPLL_MULT = " + d2d(dpll_mult) + " (x" + d2d(dpll_mult) + ")" + newline);
dpll_div = bits32(reg_val, 6, 0);
file.write("  * DPLL_DIV = " + d2d(dpll_div) + " (/" + d2d(dpll_div+1) + ")" + newline);
f_dpll_ddr = input_clock*2*dpll_mult/(dpll_div+1);
file.write(newline);

// CM_DIV_M2_DPLL_DDR
reg_val = printRegisterValue(debugSessionDAP, "CM_DIV_M2_DPLL_DDR", 0x44DF2DB0);
if (reg_val & (1<<9))  // CLKST = 1
	file.write("  * CLKST = 1: M2 output clock enabled" + newline);
else
	file.write("  * CLKST = 0: M2 output clock disabled" + newline);;
div_m2 = reg_val & 0x1F;
file.write("  * DIVHS = " + d2d(div_m2) + " (/" + d2d(div_m2) + ")" + newline);
file.write(newline);

// CM_DIV_M4_DPLL_DDR
reg_val = printRegisterValue(debugSessionDAP, "CM_DIV_M4_DPLL_DDR", 0x44DF2DB8);
if (reg_val & (1<<9))  // CLKST = 1
	file.write("  * CLKST = 1: M4 output clock enabled" + newline);
else
	file.write("  * CLKST = 0: M4 output clock disabled" + newline);;
div_m4 = reg_val & 0x1F;
file.write("  * DIVHS = " + d2d(div_m4) + " (/" + d2d(div_m4) + ")" + newline);

file.write(newline + "DPLL_DDR Summary" + newline);
file.write(" -> F_input = " + d2d(input_clock) + " MHz" + newline);
ddr_pll_clkout_freq = f_dpll_ddr / 2 / div_m2;
dll_clkout_freq = f_dpll_ddr / div_m4;
file.write(" -> CLKOUT_M2 = DDR_PLL_CLKOUT = " + ddr_pll_clkout_freq + " MHz" + newline);
file.write(" -> CLKOUT_M4 = DLL_CLKOUT = " + dll_clkout_freq + " MHz" + newline);
if (ddr_pll_clkout_freq != dll_clkout_freq)
	file.write(" -> ERROR! DLL_CLKOUT should be same speed as DDR_PLL_CLKOUT" + newline);
file.write(newline);

// Only try to read EMIF registers if EMIF clock is enabled
if (original_CM_PER_EMIF_CLKSTCTRL & 0x7<<8) {

	// EMIF: SDRAM_CONFIG
	reg_val = printRegisterValue(debugSessionDAP, "EMIF: SDRAM_CONFIG", 0x4C000008);

	var is_ddr3=0;
	var is_ddr2=0;
	var is_lpddr2=0;
	if ( (reg_val & 0xE0000000) == (0 << 29) ) {file.write("  * ERROR! Unsupported memory type (DDR1)\n");}
	if ( (reg_val & 0xE0000000) == (1 << 29) ) {file.write("  * ERROR! Unsupported memory type (LPDDR)\n");}
	if ( (reg_val & 0xE0000000) == (2 << 29) ) {file.write("  * ERROR! Unsupported memory type (DDR2)\n");}
	if ( (reg_val & 0xE0000000) == (3 << 29) ) {is_ddr3=1; file.write("  * SDRAM_TYPE = DDR3\n");}
	if ( (reg_val & 0xE0000000) == (4 << 29) ) {is_lpddr2=1; file.write("  * SDRAM_TYPE = LPDDR2\n");}

	if (is_ddr3 == 1) {
		if (ddr_pll_clkout_freq > 400)
			file.write("    -> ERROR!  DDR speed exceeds the max of 400 MHz")
		file.write("  * Bits 26:24 (reg_ddr_term) set for ");
		if ( (reg_val & 0x07000000) == (0 << 24) ) {file.write("termination disabled (000b)\n");}
		if ( (reg_val & 0x07000000) == (1 << 24) ) {file.write("RZQ/4 (001b)\n");}
		if ( (reg_val & 0x07000000) == (2 << 24) ) {file.write("RZQ/2 (010b)\n");}
		if ( (reg_val & 0x07000000) == (3 << 24) ) {file.write("RZQ/6 (011b)\n");}
		if ( (reg_val & 0x07000000) == (4 << 24) ) {file.write("RZQ/12 (100b)\n");}
		if ( (reg_val & 0x07000000) == (5 << 24) ) {file.write("RZQ/8  (101b)\n");}
		if ( (reg_val & 0x07000000) == (6 << 24) ) {file.write("ERROR\n");}
		if ( (reg_val & 0x07000000) == (7 << 24) ) {file.write("ERROR\n");}
	}

	if (is_lpddr2 == 1) {
		if (ddr_pll_clkout_freq > 266)
			file.write("    -> ERROR!  DDR speed exceeds the max of 266 MHz")
		if ( (reg_val & 0x00800000) == 0 )
			file.write("  * LPDDR2_DDQS = 0, single ended DQS\n");
		else
			file.write("  * LPDDR2_DDQS = 1, differential ended DQS\n");
	}

	if (is_ddr3 == 1) {
		file.write("  * Bits 19:18 (reg_sdram_drive) set for ");
		if ( (reg_val & 0x000C0000) == (0 << 18) ) {file.write("RZQ/6 (00b)\n");}
		if ( (reg_val & 0x000C0000) == (1 << 18) ) {file.write("RZQ/7 (01b)\n");}
		if ( (reg_val & 0x000C0000) == (2 << 18) ) {file.write("ERROR (10b)\n");}
		if ( (reg_val & 0x000C0000) == (3 << 18) ) {file.write("ERROR (11b)\n");}
	}
	
	if (is_ddr3 == 1) {
		file.write("  * Bits 17:16 (cwl) set for ");
		if ( (reg_val & 0x00030000) == (0 << 16) ) {file.write("5 (00b)\n");}
		if ( (reg_val & 0x00030000) == (1 << 16) ) {file.write("6 (01b)\n");}
		if ( (reg_val & 0x00030000) == (2 << 16) ) {file.write("7 (10b)\n");}
		if ( (reg_val & 0x00030000) == (3 << 16) ) {file.write("8 (11b)\n");}
	}

	if ( (reg_val & 0x0000C000) == (0 << 14) ) {
		file.write("  * NARROW_MODE=0 (32-bit wide)\n");
		emif_width = 32;
	}
	if ( (reg_val & 0x0000C000) == (1 << 14) ) {
		file.write("  * NARROW_MODE=1 (16-bit wide)\n");
		emif_width = 16;
	}
	if ( (reg_val & 0x0000C000) == (2 << 14) ) {file.write("  * ERROR! Reserved value.\n");}
	if ( (reg_val & 0x0000C000) == (3 << 14) ) {file.write("  * ERROR! Reserved value.\n");}

	file.write("  * Bits 13:10 (CL) set for ");
	if (is_ddr3 == 1) {
		if ( (reg_val & 0x00003C00) == (0 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (1 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (2 << 10) ) {decoded_cl=5;}
		if ( (reg_val & 0x00003C00) == (3 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (4 << 10) ) {decoded_cl=6;}
		if ( (reg_val & 0x00003C00) == (5 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (6 << 10) ) {decoded_cl=7;}
		if ( (reg_val & 0x00003C00) == (7 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (8 << 10) ) {decoded_cl=8;}
		if ( (reg_val & 0x00003C00) == (9 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (10 << 10) ) {decoded_cl=9;}
		if ( (reg_val & 0x00003C00) == (11 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (12 << 10) ) {decoded_cl=10;}
		if ( (reg_val & 0x00003C00) == (13 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (14 << 10) ) {decoded_cl=11;}
		if ( (reg_val & 0x00003C00) == (15 << 10) ) {decoded_cl=0;}
	}
	if (is_lpddr2 == 1) {
		if ( (reg_val & 0x00003C00) == (0 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (1 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (2 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (3 << 10) ) {decoded_cl=3;}
		if ( (reg_val & 0x00003C00) == (4 << 10) ) {decoded_cl=4;}
		if ( (reg_val & 0x00003C00) == (5 << 10) ) {decoded_cl=5;}
		if ( (reg_val & 0x00003C00) == (6 << 10) ) {decoded_cl=6;}
		if ( (reg_val & 0x00003C00) == (7 << 10) ) {decoded_cl=7;}
		if ( (reg_val & 0x00003C00) == (8 << 10) ) {decoded_cl=8;}
		if ( (reg_val & 0x00003C00) == (9 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (10 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (11 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (12 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (13 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (14 << 10) ) {decoded_cl=0;}
		if ( (reg_val & 0x00003C00) == (15 << 10) ) {decoded_cl=0;}
	}
	if (decoded_cl == 0) {
		file.write("Illegal value!!!\n")
	} else {
		file.write(d2d(decoded_cl) + "\n");
	}

	file.write("  * Bits 9:7 (ROWSIZE) set for ");
	if ( (reg_val & 0x00000380) == (0 << 7) ) {file.write("9 row bits\n");}
	if ( (reg_val & 0x00000380) == (1 << 7) ) {file.write("10 row bits\n");}
	if ( (reg_val & 0x00000380) == (2 << 7) ) {file.write("11 row bits\n");}
	if ( (reg_val & 0x00000380) == (3 << 7) ) {file.write("12 row bits\n");}
	if ( (reg_val & 0x00000380) == (4 << 7) ) {file.write("13 row bits\n");}
	if ( (reg_val & 0x00000380) == (5 << 7) ) {file.write("14 row bits\n");}
	if ( (reg_val & 0x00000380) == (6 << 7) ) {file.write("15 row bits\n");}
	if ( (reg_val & 0x00000380) == (7 << 7) ) {file.write("16 row bits\n");}

	file.write("  * Bits 6:4 (IBANK) set for ");
	if ( (reg_val & 0x00000070) == (0 << 4) ) {file.write("1 banks\n");}
	if ( (reg_val & 0x00000070) == (1 << 4) ) {file.write("2 banks\n");}
	if ( (reg_val & 0x00000070) == (2 << 4) ) {file.write("4 banks\n");}
	if ( (reg_val & 0x00000070) == (3 << 4) ) {file.write("8 banks\n");}

	file.write("  * Bit 3 (EBANK) set for ");
	if ( (reg_val & 0x00000008) == (0 << 3) ) {file.write("1 chip select (CS0)\n");}
	if ( (reg_val & 0x00000008) == (1 << 3) ) {file.write("2 chip selects (CS0/1)\n");}

	file.write("  * Bits 3:0 (PAGESIZE) set for ");
	if ( (reg_val & 0x00000007) == (0 << 0) ) {file.write("8 column bits\n");}
	if ( (reg_val & 0x00000007) == (1 << 0) ) {file.write("9 column bits\n");}
	if ( (reg_val & 0x00000007) == (2 << 0) ) {file.write("10 column bits\n");}
	if ( (reg_val & 0x00000007) == (3 << 0) ) {file.write("11 column bits\n");}
	if ( (reg_val & 0x00000007) == (4 << 0) ) {file.write("Reserved value.\n");}
	if ( (reg_val & 0x00000007) == (5 << 0) ) {file.write("Reserved value.\n");}
	if ( (reg_val & 0x00000007) == (6 << 0) ) {file.write("Reserved value.\n");}
	if ( (reg_val & 0x00000007) == (7 << 0) ) {file.write("Reserved value.\n");}
	file.write(newline);

	// EMIF: PWR_MGMT_CTRL
	reg_val = printRegisterValue(debugSessionDAP, "EMIF: PWR_MGMT_CTRL", 0x4C000038);
	if ( (reg_val & 0xF0) < 0x90 ) {
		file.write(" * ERROR: Bits 7:4 (reg_sr_tim) are in violation of Maximum Self-Refresh Command Limit\n");
		file.write(" * Please see the silicon errata for more details.\n");
	}
	file.write(newline);
	
	// DDR PHY: DDR_PHY_CTRL_1
	reg_val = printRegisterValue(debugSessionDAP, "DDR PHY: DDR_PHY_CTRL_1", 0x4C0000E4);
	if ( (reg_val & 1<<27) == (1<<27) ) {file.write("  * RDLVL_MASK=1, read leveling is disabled! Not recommended.\n");}
	if ( (reg_val & 1<<26) == (1<<26) ) {file.write("  * RDLVLGATE_MASK=1, read leveling is disabled! Not recommended.\n");}
	if ( (reg_val & 1<<25) == (1<<25) ) {file.write("  * WRLVL_MASK=1, write leveling is disabled! Not recommended.\n");}
	if ( (reg_val & 1<<21) == (1<<21) ) {file.write("  * PHY_HALF_DELAYS=1 Non-typical value.\n");}
	if ( (reg_val & 1<<20) == (1<<20) ) {file.write("  * PHY_CLK_STALL_LEVEL=1, Illegal value. Not recommended.\n");}
	if ( (reg_val & 1<<19) == (1<<19) ) {file.write("  * PHY_DIS_CALIB_RST=1, Illegal value. Not recommended.\n");}
	var phy_invert_clkout=0;
	if ( (reg_val & 1<<18) == (1<<18) ) {
		file.write("  * PHY_INVERT_CLKOUT=1.\n");
		phy_invert_clkout=1;
	} else {
		file.write("  * PHY_INVERT_CLKOUT=0.\n");
	}
	if ( (reg_val & 0x3FC00) != (0x20 << 10) ) {file.write("  * PHY_DLL_LOCK_DIFF is not set to the required value.\n");}
	if ( (reg_val & 1<<9) == (1<<9) ) {file.write("  * PHY_FAST_DLL_LOCK=1, Illegal value. Not recommended.\n");}
	recommended_read_lat = decoded_cl + 2 + phy_invert_clkout;
	programmed_read_lat = reg_val & 0x1F;
	if ( programmed_read_lat == recommended_read_lat ) {
		file.write("  * READ_LAT=" + d2d(recommended_read_lat) + ", (corresponds correctly with CL and PHY_INVERT_CLKOUT)\n");
	} else {
		file.write("  * WARNING: READ_LAT=" + d2d(programmed_read_lat) +
		           ", but given your CL and PHY_INVERT_CLKOUT values the recommended value is " +
				   d2d(recommended_read_lat) + "\n");
	}
	file.write(newline);
	
	// DDR PHY: EXT_PHY_CTRL_1
	reg_val = printRegisterValue(debugSessionDAP, "DDR PHY: EXT_PHY_CTRL_1", 0x4C000200);
	if (phy_invert_clkout == 1) {
		if (reg_val != 0x00040100) {
			file.write("  * ERROR!  Mismatch between PHY_INVERT_CLKOUT and EXT_PHY_CTRL_1 values!\n");
			file.write("    More info: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/668292/2466872#2466872\n");
			file.write("    Expected value is 0x00040100 when PHY_INVERT_CLKOUT=1.\n");
		}
	} else {
		if (reg_val != 0x08020080) {
			file.write("  * ERROR!  Mismatch between PHY_INVERT_CLKOUT and EXT_PHY_CTRL_1 values!\n");
			file.write("    More info: https://e2e.ti.com/support/arm/sitara_arm/f/791/p/668292/2466872#2466872\n");
			file.write("    Expected value is 0x08020080 when PHY_INVERT_CLKOUT=0.\n");
		}
	}


} else {
	file.write("Skipping read of EMIF registers since EMIF clock disabled.\n");
	file.write(" * EMIF registers are not readable when in DS0 state\n");
	file.write(" * If you are attempting to enter DS0 this is normal.\n");
}
file.write(newline);

	// DDR PHY: EXT_PHY_CTRL_36
	reg_val = printRegisterValue(debugSessionDAP, "DDR PHY: EXT_PHY_CTRL_36", 0x4C000318);
	if ( (reg_val & 0xFF) == 0x77 ) {
		file.write("  * Configured as recommended.\n")
	}
	else {
		file.write("  * Bits 7:0 recommended value is 0x77.\n")
		file.write("  * Please verify you are using the latest AM43xx DDR Spreadsheet: http://www.ti.com/lit/zip/sprac70\n")
	}
	file.write(newline);

// CONTROL: CTRL_DDR_ADDRCTRL_IOCTRL
reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_ADDRCTRL_IOCTRL", 0x44E11404);
file.write("  * Bits 9:5 control ddr_ck and ddr_ckn\n");
file.write("    - Slew ");
if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}
if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write("  * Bits 4:0 control all other address/control pins\n");
file.write("    - Slew ");
if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}
if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}
if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write(newline);

// CTRL_DDR_ADDRCTRL_WD0_IOCTRL and CTRL_DDR_ADDRCTRL_WD1_IOCTRL
var reg_val_wd0;
var reg_val_wd1;
reg_val_wd0 = printRegisterValue(debugSessionDAP, "CTRL_DDR_ADDRCTRL_WD0_IOCTRL", 0x44E11408);
reg_val_wd1 = printRegisterValue(debugSessionDAP, "CTRL_DDR_ADDRCTRL_WD1_IOCTRL", 0x44E1140C);
file.write("  * [ddr_a0    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 0));
file.write("  * [ddr_a1    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 1));
file.write("  * [ddr_a2    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 2));
file.write("  * [ddr_a3    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 3));
file.write("  * [ddr_a4    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 4));
file.write("  * [ddr_a5    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 5));
file.write("  * [ddr_a6    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 6));
file.write("  * [ddr_a7    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 7));
file.write("  * [ddr_a8    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 8));
file.write("  * [ddr_a9    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 9));
file.write("  * [ddr_a10   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 10));
file.write("  * [ddr_a11   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 11));
file.write("  * [ddr_a12   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 12));
file.write("  * [ddr_a13   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 13));
file.write("  * [ddr_a14   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 14));
file.write("  * [ddr_a15   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 15));
file.write("  * [ddr_ba2   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 16));
file.write("  * [ddr_ba1   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 17));
file.write("  * [ddr_ba0   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 18));
file.write("  * [ddr_wen   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 19));
file.write("  * [ddr_rasn  ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 20));
file.write("  * [ddr_casn  ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 21));
file.write("  * [ddr_nck   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 22));
file.write("  * [ddr_ck    ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 23));
file.write("  * [ddr_cke   ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 24));
file.write("  * [ddr_csn1  ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 25));
file.write("  * [ddr_csn0  ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 26));
file.write("  * [ddr_resetn] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 27));
file.write("  * [ddr_odt1  ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 28));
file.write("  * [ddr_odt0  ] " + interpret_addrctrl_phy_macro(reg_val_wd0, reg_val_wd1, 29));
file.write(newline);

// CTRL_DDR_DATA0_IOCTRL
reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_DATA0_IOCTRL", 0x44E11440);
file.write("  * ddr_d0 " + interpret_data_phy_macro(reg_val, 0));
file.write("  * ddr_d1 " + interpret_data_phy_macro(reg_val, 1));
file.write("  * ddr_d2 " + interpret_data_phy_macro(reg_val, 2));
file.write("  * ddr_d3 " + interpret_data_phy_macro(reg_val, 3));
file.write("  * ddr_d4 " + interpret_data_phy_macro(reg_val, 4));
file.write("  * ddr_d5 " + interpret_data_phy_macro(reg_val, 5));
file.write("  * ddr_d6 " + interpret_data_phy_macro(reg_val, 6));
file.write("  * ddr_d7 " + interpret_data_phy_macro(reg_val, 7));
file.write("  * ddr_dqm0 " + interpret_data_phy_macro(reg_val, 8));
file.write("  * ddr_dqs0 and ddr_dqsn0 " + interpret_data_phy_macro(reg_val, 9));
file.write("  * Bits 9:5 control ddr_dqs0, ddr_dqsn0\n");
file.write("    - Slew ");
if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}
if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write("  * Bits 4:0 control ddr_d[7:0], dqm0\n");
file.write("    - Slew ");
if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}
if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}
if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write(newline);

// CTRL_DDR_DATA1_IOCTRL
reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_DATA1_IOCTRL", 0x44E11444);
file.write("  * ddr_d8 " + interpret_data_phy_macro(reg_val, 0));
file.write("  * ddr_d9 " + interpret_data_phy_macro(reg_val, 1));
file.write("  * ddr_d10 " + interpret_data_phy_macro(reg_val, 2));
file.write("  * ddr_d11 " + interpret_data_phy_macro(reg_val, 3));
file.write("  * ddr_d12 " + interpret_data_phy_macro(reg_val, 4));
file.write("  * ddr_d13 " + interpret_data_phy_macro(reg_val, 5));
file.write("  * ddr_d14 " + interpret_data_phy_macro(reg_val, 6));
file.write("  * ddr_d15 " + interpret_data_phy_macro(reg_val, 7));
file.write("  * ddr_dqm1 " + interpret_data_phy_macro(reg_val, 8));
file.write("  * ddr_dqs1 and ddr_dqsn1 " + interpret_data_phy_macro(reg_val, 9));
file.write("  * Bits 9:5 control ddr_dqs1, ddr_dqsn1\n");
file.write("    - Slew ");
if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}
if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write("  * Bits 4:0 control ddr_d[15:8], ddr_dqm1\n");
file.write("    - Slew ");
if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}
if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}
if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write(newline);

// CTRL_DDR_DATA2_IOCTRL
reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_DATA2_IOCTRL", 0x44E11448);
file.write("  * ddr_d16 " + interpret_data_phy_macro(reg_val, 0));
file.write("  * ddr_d17 " + interpret_data_phy_macro(reg_val, 1));
file.write("  * ddr_d18 " + interpret_data_phy_macro(reg_val, 2));
file.write("  * ddr_d19 " + interpret_data_phy_macro(reg_val, 3));
file.write("  * ddr_d20 " + interpret_data_phy_macro(reg_val, 4));
file.write("  * ddr_d21 " + interpret_data_phy_macro(reg_val, 5));
file.write("  * ddr_d22 " + interpret_data_phy_macro(reg_val, 6));
file.write("  * ddr_d23 " + interpret_data_phy_macro(reg_val, 7));
file.write("  * ddr_dqm2 " + interpret_data_phy_macro(reg_val, 8));
file.write("  * ddr_dqs2 and ddr_dqsn2 " + interpret_data_phy_macro(reg_val, 9));
file.write("  * Bits 9:5 control ddr_dqs2, ddr_dqsn2\n");
file.write("    - Slew ");
if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}
if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write("  * Bits 4:0 control ddr_d[23:16], ddr_dqm2\n");
file.write("    - Slew ");
if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}
if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}
if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write(newline);

// CTRL_DDR_DATA3_IOCTRL
reg_val = printRegisterValue(debugSessionDAP, "CTRL_DDR_DATA3_IOCTRL", 0x44E1144C);
file.write("  * ddr_d24 " + interpret_data_phy_macro(reg_val, 0));
file.write("  * ddr_d25 " + interpret_data_phy_macro(reg_val, 1));
file.write("  * ddr_d26 " + interpret_data_phy_macro(reg_val, 2));
file.write("  * ddr_d27 " + interpret_data_phy_macro(reg_val, 3));
file.write("  * ddr_d28 " + interpret_data_phy_macro(reg_val, 4));
file.write("  * ddr_d29 " + interpret_data_phy_macro(reg_val, 5));
file.write("  * ddr_d30 " + interpret_data_phy_macro(reg_val, 6));
file.write("  * ddr_d31 " + interpret_data_phy_macro(reg_val, 7));
file.write("  * ddr_dqm3 " + interpret_data_phy_macro(reg_val, 8));
file.write("  * ddr_dqs3 and ddr_dqsn3 " + interpret_data_phy_macro(reg_val, 9));
file.write("  * Bits 9:5 control ddr_dqs3, ddr_dqsn3\n");
file.write("    - Slew ");
if ( (reg_val & 0x300) == (0 << 8) ) {file.write("fastest\n");}
if ( (reg_val & 0x300) == (1 << 8) ) {file.write("slow\n");}
if ( (reg_val & 0x300) == (2 << 8) ) {file.write("fast\n");}
if ( (reg_val & 0x300) == (3 << 8) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0xE0) >> 5) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write("  * Bits 4:0 control ddr_d[31:24], ddr_dqm3\n");
file.write("    - Slew ");
if ( (reg_val & 0x18) == (0 << 3) ) {file.write("fastest\n");}
if ( (reg_val & 0x18) == (1 << 3) ) {file.write("slow\n");}
if ( (reg_val & 0x18) == (2 << 3) ) {file.write("fast\n");}
if ( (reg_val & 0x18) == (3 << 3) ) {file.write("slowest\n");}
var drive_strength_mA = ((reg_val & 0x07) >> 0) + 5;
file.write("    - Drive Strength " + drive_strength_mA + " mA\n");
file.write(newline);

// CONTROL: CTRL_DDR_IO
reg_val = printRegisterValue(debugSessionDAP, "CONTROL: CTRL_DDR_IO", 0x44E10E04);
if ( (reg_val & (1 << 31)) == (1<<31) ) {
	file.write("  * Bit 31: Overriding DDR_RESETn (expected for DS0).\n");
} else {
	file.write("  * Bit 31: DDR_RESETn controlled by EMIF.\n");
}
file.write(newline);

// CONTROL: CTRL_VTP
reg_val = printRegisterValue(debugSessionDAP, "CONTROL: CTRL_VTP", 0x44E10E0C);
if ( (reg_val & 0x40) == 0 ) {
	file.write("  * VTP disabled (expected in DS0).\n");
} else {
	file.write("  * VTP not disabled (expected in normal operation, but not DS0).\n");
}
file.write(newline);

// CONTROL: CTRL_VREF
reg_val = printRegisterValue(debugSessionDAP, "CONTROL: CTRL_VREF", 0x44E10E14);
if ( (reg_val & 1) == 0 ) {
	file.write("  * VREF supplied externally (typical).\n");
} else {
	file.write("  * Internal VREF (unusual).\n");
}
file.write(newline);

// CONTROL: CTRL_DDR_CKE
reg_val = printRegisterValue(debugSessionDAP, "CONTROL: CTRL_DDR_CKE", 0x44E1131C);
if ( (reg_val & 1) == 0 ) {
	file.write("  * CKE0 gated (forces pin low making DDR inaccessible).\n");
} else {
	file.write("  * CKE0 controlled by EMIF (normal/ungated operation).\n");
}
if ( (reg_val & 2) == 0 ) {
	file.write("  * CKE1 gated (forces pin low making DDR inaccessible).\n");
} else {
	file.write("  * CKE1 controlled by EMIF (normal/ungated operation).\n");
}
file.write(newline);

// CONTROL: CTRL_EMIF_SDRAM_CONFIG_EXT
reg_val = printRegisterValue(debugSessionDAP, "CONTROL: CTRL_EMIF_SDRAM_CONFIG_EXT", 0x44E11460);
narrow_only = bits32(reg_val, 17, 17);
phy_num_of_samples = bits32(reg_val, 15, 14);
phy_sel_logic = bits32(reg_val, 13, 13);
phy_all_dq_mpr_rd_resp = bits32(reg_val, 12, 12);
phy_output_sts_select = bits32(reg_val, 11, 9);
dynamic_pwrdn_en = bits32(reg_val, 8, 8);
phy_rd_local_odt = bits32(reg_val, 6, 5);
dfi_clock_phase_ctrl = bits32(reg_val, 3, 3);
en_slice_1 = bits32(reg_val, 1, 1);
en_slice_0 = bits32(reg_val, 0, 0);
file.write("  * Bit  17:    NARROW_ONLY = " + d2d(narrow_only) + newline);
if ( (narrow_only == 0) && (emif_width == 16) ) {
	file.write("    -> ERROR: Mismatch of EMIF width between this register and SDRAM_CONFIG!" + newline);
}
if ( (narrow_only == 1) && (emif_width == 32) ) {
	file.write("    -> ERROR: Mismatch of EMIF width between this register and SDRAM_CONFIG!" + newline);
}
switch (phy_num_of_samples) {
	case 0:
		file.write("  * Bits 15:14: phy_num_of_samples = 0 -> 4 samples, incremental leveling" + newline);
		break;
	case 3:
		file.write("  * Bits 15:14: phy_num_of_samples = 3 -> 128 samples, full leveling" + newline);
		break;
	default:
		file.write("  * Bits 15:14: phy_num_of_samples = " + d2d(phy_num_of_samples) + " -> INVALID VALUE" + newline);
		break;
}
if (phy_sel_logic  == 0)
	file.write("  * Bit  13:    phy_sel_logic = 0 (Recommended)" + newline);
else
	file.write("  * Bit  13:    phy_sel_logic = 1 (Not recommended)" + newline);
file.write("  * Bit  12:    phy_all_dq_mpr_rd_resp = " + d2d(phy_all_dq_mpr_rd_resp) + newline);
file.write("  * Bits 11:09: phy_output_sts_select = " + d2d(phy_output_sts_select) + newline);
file.write("  * Bit   8:    dynamic_pwrdn_en = " + d2d(dynamic_pwrdn_en) + newline);
switch (phy_rd_local_odt) {
	case 0:
	case 1:
		file.write("  * Bits 06:05: phy_rd_local_odt = " + d2d(phy_rd_local_odt) + ", ODT off" + newline);
		break;
	case 2:
		file.write("  * Bits 06:05: phy_rd_local_odt = " + d2d(phy_rd_local_odt) + ", Full Thevenin load" + newline);
		break;
	case 3:
		file.write("  * Bits 06:05: phy_rd_local_odt = " + d2d(phy_rd_local_odt) + ", Half Thevenin load" + newline);
		break;
	default:
		file.write("  * You should never hit this case." + newline);
		break;
}
file.write("  * Bit   3:    dfi_clock_phase_ctrl = " + d2d(dfi_clock_phase_ctrl) + newline);
if (dfi_clock_phase_ctrl == 1)
	file.write("    -> WARNING: Recommended value for dfi_clock_phase_ctrl is 0" + newline);
file.write("  * Bit   1:    en_slice_1 = " + d2d(en_slice_1) + " (CMD PHY1)" + newline);
file.write("  * Bit   0:    en_slice_0 = " + d2d(en_slice_0) + " (CMD PHY0)"  + newline);

file.close();
print("Created file " + filename);

/***************************************************************************************
Create CSV File that dumps out EMIF and PHY registers
****************************************************************************************/



var filename = userHomeFolder + '/Desktop/' + 'am43xx-ddr-config' + filename_date + '.csv';
file = new java.io.FileWriter(filename);

var ddr_config_regs = [
	0x4C000000,
	0x4C000004,
	0x4C000008,
	0x4C00000C,
	0x4C000010,
	0x4C000014,
	0x4C000018,
	0x4C00001C,
	0x4C000020,
	0x4C000024,
	0x4C000028,
	0x4C00002C,
	0x4C000030,
	0x4C000034,
	0x4C000038,
	0x4C00003C,
	0x4C000040,
	0x4C000050,
	0x4C000054,
	0x4C000058,
	0x4C00005C,
	0x4C000060,
	0x4C000064,
	0x4C000068,
	0x4C00006C,
	0x4C000070,
	0x4C000074,
	0x4C000080,
	0x4C000084,
	0x4C000088,
	0x4C00008C,
	0x4C000090,
	0x4C000094,
	0x4C000098,
	0x4C00009C,
	0x4C0000A0,
	0x4C0000A4,
	0x4C0000A8,
	0x4C0000AC,
	0x4C0000B0,
	0x4C0000B4,
	0x4C0000B8,
	0x4C0000BC,
	0x4C0000C0,
	0x4C0000C8,
	0x4C0000CC,
	0x4C0000D0,
	0x4C0000D4,
	0x4C0000D8,
	0x4C0000DC,
	0x4C0000E4,
	0x4C0000E8,
	0x4C000100,
	0x4C000104,
	0x4C000108,
	0x4C00010C,
	0x4C000110,
	0x4C000114,
	0x4C000118,
	0x4C00011C,
	0x4C000120,
	0x4C000124,
	0x4C000130,
	0x4C000134,
	0x4C000138,
	0x4C00013C,
	0x4C000140,
	0x4C000144,
	0x4C000148,
	0x4C00014C,
	0x4C000150,
	0x4C000154,
	0x4C000158,
	0x4C00015C,
	0x4C000160,
	0x4C000164,
	0x4C000168,
	0x4C00016C,
	0x4C000170,
	0x4C000174,
	0x4C000178,
	0x4C00017C,
	0x4C000180,
	0x4C000184,
	0x4C000188,
	0x4C00018C,
	0x4C000190,
	0x4C000194,
	0x4C000198,
	0x4C00019C,
	0x4C0001A0,
	0x4C0001A4,
	0x4C0001A8,
	0x4C0001AC,
	0x4C0001B0,
	0x4C000200,
	0x4C000204,
	0x4C000208,
	0x4C00020C,
	0x4C000210,
	0x4C000214,
	0x4C000218,
	0x4C00021C,
	0x4C000220,
	0x4C000224,
	0x4C000228,
	0x4C00022C,
	0x4C000230,
	0x4C000234,
	0x4C000238,
	0x4C00023C,
	0x4C000240,
	0x4C000244,
	0x4C000248,
	0x4C00024C,
	0x4C000250,
	0x4C000254,
	0x4C000258,
	0x4C00025C,
	0x4C000260,
	0x4C000264,
	0x4C000268,
	0x4C00026C,
	0x4C000270,
	0x4C000274,
	0x4C000278,
	0x4C00027C,
	0x4C000280,
	0x4C000284,
	0x4C000288,
	0x4C00028C,
	0x4C000290,
	0x4C000294,
	0x4C000298,
	0x4C00029C,
	0x4C0002A0,
	0x4C0002A4,
	0x4C0002A8,
	0x4C0002AC,
	0x4C0002B0,
	0x4C0002B4,
	0x4C0002B8,
	0x4C0002BC,
	0x4C0002C0,
	0x4C0002C4,
	0x4C0002C8,
	0x4C0002CC,
	0x4C0002D0,
	0x4C0002D4,
	0x4C0002D8,
	0x4C0002DC,
	0x4C0002E0,
	0x4C0002E4,
	0x4C0002E8,
	0x4C0002EC,
	0x4C0002F0,
	0x4C0002F4,
	0x4C0002F8,
	0x4C0002FC,
	0x4C000300,
	0x4C000304,
	0x4C000308,
	0x4C00030C,
	0x4C000310,
	0x4C000314,
	0x4C000318,
	0x4C00031C,
	0x44e10E04,
	0x44e10E0C,
	0x44e10E14,
	0x44e1131C,
	0x44e11404,
	0x44e11408,
	0x44e1140C,
	0x44e11440,
	0x44e11444,
	0x44e11448,
	0x44e1144C,
	0x44e11460,
	0x44e11464];

// Column Headers for CSV
file.write("Address,Raw Reg Val\r\n");

var reg_val;

// Fill out one line per loop iteration
for (i=0; i<ddr_config_regs.length; i++)
{

	reg_val = getRegisterValue(debugSessionDAP, ddr_config_regs[i]);
	file.write("0x" + d2h(ddr_config_regs[i])); // Address
	file.write(",0x" + d2h(reg_val)); // Raw Reg Val
	
	file.write("\r\n");  // CSV specifies CR/LF for line endings

}

file.close();
print("Created file " + filename);

debugSessionDAP.target.disconnect();



//****************************************************************************
// getErrorCode
//****************************************************************************
function getErrorCode(exception)
{
   var ex2 = exception.javaException;
   if (ex2 instanceof Packages.com.ti.ccstudio.scripting.environment.ScriptingException)
   {
      return ex2.getErrorID();
   }
   return 0;
}