aboutsummaryrefslogtreecommitdiffstats
blob: 1e672e4ab49ed596fdcf9463ac7ff7834d60a142 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
/*
 * Copyright (c) 2018, Texas Instruments Incorporated
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * *  Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 * *  Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 *
 * *  Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */

function d2h(d) {return ("00000000" + (d).toString(16)).slice(-8);}

var newline = "\n";

function printRegisterValue(ds, name, addr)
{
	value = debugSessionDAP.memory.readWord(0,addr,false);
	value_string = d2h(value);
	file.write(name + " = 0x" + value_string + newline);
	return value; // return the register value for interrogation
}

// Helper function for decoding trace vector 1 (gets called for current vector and cold reset vector)
function decode_tracing_vector_1(value)
{
	if (value & (1<< 0)) {file.write("  * Bit  0: [Boot] Passed the public reset vector" + newline);}
	if (value & (1<< 1)) {file.write("  * Bit  1: [Boot] Entered main function" + newline);}
	if (value & (1<< 2)) {file.write("  * Bit  2: [Boot] Running after the cold reset" + newline);}
	if (value & (1<< 3)) {file.write("  * Bit  3: [Boot] Main booting routine entered" + newline);}
	if (value & (1<< 4)) {file.write("  * Bit  4: [Memory boot] Memory booting started" + newline);}
	if (value & (1<< 5)) {file.write("  * Bit  5: [Peripheral boot] Peripheral booting started" + newline);}
	if (value & (1<< 6)) {file.write("  * Bit  6: [Boot] Booting loop reached last device" + newline);}
	if (value & (1<< 7)) {file.write("  * Bit  7: [Boot] GP header found" + newline);}
	if (value & (1<< 8)) {file.write("  * Bit  8: [Peripheral boot] Booting message Skip peripheral booting received" + newline);}
	if (value & (1<< 9)) {file.write("  * Bit  9: [Peripheral boot] Booting message Change device received" + newline);}
	if (value & (1<<10)) {file.write("  * Bit 10: [Peripheral boot] Booting message Peripheral booting received" + newline);}
	if (value & (1<<11)) {file.write("  * Bit 11: [Peripheral boot] Booting message Get ASIC ID received" + newline);}
	if (value & (1<<12)) {file.write("  * Bit 12: [Peripheral boot] Device initialized" + newline);}
	if (value & (1<<13)) {file.write("  * Bit 13: [Peripheral boot] ASIC ID sent" + newline);}
	if (value & (1<<14)) {file.write("  * Bit 14: [Peripheral boot] Image received" + newline);}
	if (value & (1<<15)) {file.write("  * Bit 15: [Peripheral boot] Peripheral booting failed" + newline);}
	if (value & (1<<16)) {file.write("  * Bit 16: [Peripheral boot] Booting message not received (time-out)" + newline);}
	if (value & (1<<17)) {file.write("  * Bit 17: [Peripheral boot] Image size not received (time-out)" + newline);}
	if (value & (1<<18)) {file.write("  * Bit 18: [Peripheral boot] Image not received (time-out)" + newline);}
	if (value & (1<<19)) {file.write("  * Bit 19: Reserved" + newline);}
	if (value & (1<<20)) {file.write("  * Bit 20: [Boot] Configuration header found" + newline);}
	if (value & (1<<21)) {file.write("  * Bit 21: [Boot] CHSETTINGS item processed" + newline);}
	if (value & (1<<22)) {file.write("  * Bit 22: [Boot] Reserved" + newline);}
	if (value & (1<<23)) {file.write("  * Bit 23: [Boot] CHFLASH item processed" + newline);}
	if (value & (1<<24)) {file.write("  * Bit 24: [Boot] CHMMCSD item processed (clock)" + newline);}
	if (value & (1<<25)) {file.write("  * Bit 25: [Boot] CHMMCSD item processed (bus width)" + newline);}
	if (value & (1<<26)) {file.write("  * Bit 26: [Boot] CHMMCSD item processed (eMMC DDR mode)" + newline);}
	if (value & (1<<27)) {file.write("  * Bit 27: Reserved" + newline);}
	if (value & (1<<28)) {file.write("  * Bit 28: [Boot] SWCFG general detected" + newline);}
	if (value & (1<<29)) {file.write("  * Bit 29: [Boot] SWCFG clocks detected" + newline);}
	if (value & (1<<30)) {file.write("  * Bit 30: [Boot] SWCFG time-out detected" + newline);}
	if (value & (1<<31)) {file.write("  * Bit 31: Reserved" + newline);}
}

// Helper function for decoding trace vector 2 (gets called for current vector and cold reset vector)
function decode_tracing_vector_2(value)
{
	if (value & (1<< 0)) {file.write("  * Bit  0: [Configuration Header] CHSATA item processed" + newline);}
	if (value & (1<< 1)) {file.write("  * Bit  1: Reserved" + newline);}
	if (value & (1<< 2)) {file.write("  * Bit  2: Reserved" + newline);}
	if (value & (1<< 3)) {file.write("  * Bit  3: Reserved" + newline);}
	if (value & (1<< 4)) {file.write("  * Bit  4: [USB] USB connected" + newline);}
	if (value & (1<< 5)) {file.write("  * Bit  5: [USB] USB configured" + newline);}
	if (value & (1<< 6)) {file.write("  * Bit  6: Reserved" + newline);}
	if (value & (1<< 7)) {file.write("  * Bit  7: Reserved" + newline);}
	if (value & (1<< 8)) {file.write("  * Bit  8: [Configuration Header] CHQSPI item processed (clock speed)" + newline);}
	if (value & (1<< 9)) {file.write("  * Bit  9: [Configuration Header] CHQSPI item processed (Read command)" + newline);}
	if (value & (1<<10)) {file.write("  * Bit 10: Reserved" + newline);}
	if (value & (1<<11)) {file.write("  * Bit 11: Reserved" + newline);}
	if (value & (1<<12)) {file.write("  * Bit 12: [Memory boot] Memory booting trial (first block)" + newline);}
	if (value & (1<<13)) {file.write("  * Bit 13: [Memory boot] Memory booting trial (second block)" + newline);}
	if (value & (1<<14)) {file.write("  * Bit 14: [Memory boot] Memory booting trial (third block)" + newline);}
	if (value & (1<<15)) {file.write("  * Bit 15: [Memory boot] Memory booting trial (fourth block)" + newline);}
	if (value & (1<<16)) {file.write("  * Bit 16: Reserved" + newline);}
	if (value & (1<<17)) {file.write("  * Bit 17: Reserved" + newline);}
	if (value & (1<<18)) {file.write("  * Bit 18: Reserved" + newline);}
	if (value & (1<<19)) {file.write("  * Bit 19: Reserved" + newline);}
	if (value & (1<<20)) {file.write("  * Bit 20: Reserved" + newline);}
	if (value & (1<<21)) {file.write("  * Bit 21: Reserved" + newline);}
	if (value & (1<<22)) {file.write("  * Bit 22: Reserved" + newline);}
	if (value & (1<<23)) {file.write("  * Bit 23: Reserved" + newline);}
	if (value & (1<<24)) {file.write("  * Bit 24: Reserved" + newline);}
	if (value & (1<<25)) {file.write("  * Bit 25: Reserved" + newline);}
	if (value & (1<<26)) {file.write("  * Bit 26: Reserved" + newline);}
	if (value & (1<<27)) {file.write("  * Bit 27: Reserved" + newline);}
	if (value & (1<<28)) {file.write("  * Bit 28: Reserved" + newline);}
	if (value & (1<<29)) {file.write("  * Bit 29: Reserved" + newline);}
	if (value & (1<<30)) {file.write("  * Bit 30: [Boot] Jumping to Initial Software" + newline);}
	if (value & (1<<31)) {file.write("  * Bit 31: Reserved" + newline);}
}

// Helper function for decoding trace vector 3 (gets called for current vector and cold reset vector)
function decode_tracing_vector_3(value)
{
	if (value & (1<< 0)) {file.write("  * Bit  0: Reserved" + newline);}
	if (value & (1<< 1)) {file.write("  * Bit  1: [Memory boot] Memory booting device XIP" + newline);}
	if (value & (1<< 2)) {file.write("  * Bit  2: [Memory boot] Memory booting device XIPWAIT" + newline);}
	if (value & (1<< 3)) {file.write("  * Bit  3: [Memory boot] Memory booting device NAND" + newline);}
	if (value & (1<< 4)) {file.write("  * Bit  4: Reserved" + newline);}
	if (value & (1<< 5)) {file.write("  * Bit  5: [Memory boot] Memory booting device SD" + newline);}
	if (value & (1<< 6)) {file.write("  * Bit  6: [Memory boot] Memory booting device eMMC (from boot partition)" + newline);}
	if (value & (1<< 7)) {file.write("  * Bit  7: [Memory boot] Memory booting device MMC2: eMMC (from user area)" + newline);}
	if (value & (1<< 8)) {file.write("  * Bit  8: Reserved" + newline);}
	if (value & (1<< 9)) {file.write("  * Bit  9: [Memory boot] Memory booting device SATA" + newline);}
	if (value & (1<<10)) {file.write("  * Bit 10: [Memory boot] Memory booting device QSPI_1" + newline);}
	if (value & (1<<11)) {file.write("  * Bit 11: [Memory boot] Memory booting device QSPI_4" + newline);}
	if (value & (1<<12)) {file.write("  * Bit 12: Reserved" + newline);}
	if (value & (1<<13)) {file.write("  * Bit 13: Reserved" + newline);}
	if (value & (1<<14)) {file.write("  * Bit 14: Reserved" + newline);}
	if (value & (1<<15)) {file.write("  * Bit 15: Reserved" + newline);}
	if (value & (1<<16)) {file.write("  * Bit 16: Reserved" + newline);}
	if (value & (1<<17)) {file.write("  * Bit 17: Reserved" + newline);}
	if (value & (1<<18)) {file.write("  * Bit 18: Reserved" + newline);}
	if (value & (1<<19)) {file.write("  * Bit 19: [Peripheral boot] Peripheral booting device UART3" + newline);}
	if (value & (1<<20)) {file.write("  * Bit 20: Reserved" + newline);}
	if (value & (1<<21)) {file.write("  * Bit 21: [Peripheral boot] Peripheral booting device USB" + newline);}
	if (value & (1<<22)) {file.write("  * Bit 22: Reserved" + newline);}
	if (value & (1<<23)) {file.write("  * Bit 23: Reserved" + newline);}
	if (value & (1<<24)) {file.write("  * Bit 24: Reserved" + newline);}
	if (value & (1<<25)) {file.write("  * Bit 25: Reserved" + newline);}
	if (value & (1<<26)) {file.write("  * Bit 26: Reserved" + newline);}
	if (value & (1<<27)) {file.write("  * Bit 27: Reserved" + newline);}
	if (value & (1<<28)) {file.write("  * Bit 28: [Boot] Reserved" + newline);}
	if (value & (1<<29)) {file.write("  * Bit 29: [Boot] Reserved" + newline);}
	if (value & (1<<30)) {file.write("  * Bit 30: Reserved" + newline);}
	if (value & (1<<31)) {file.write("  * Bit 31: Reserved" + newline);}
}

// Helper function for decoding trace vector 4 (gets called for current vector and cold reset vector)
function decode_tracing_vector_4(value)
{
	if (value & (1<< 0)) {file.write("  * Bit  0: Reserved" + newline);}
	if (value & (1<< 1)) {file.write("  * Bit  1: Reserved" + newline);}
	if (value & (1<< 2)) {file.write("  * Bit  2: Reserved" + newline);}
	if (value & (1<< 3)) {file.write("  * Bit  3: Reserved" + newline);}
	if (value & (1<< 4)) {file.write("  * Bit  4: Reserved" + newline);}
	if (value & (1<< 5)) {file.write("  * Bit  5: Reserved" + newline);}
	if (value & (1<< 6)) {file.write("  * Bit  6: Reserved" + newline);}
	if (value & (1<< 7)) {file.write("  * Bit  7: Reserved" + newline);}
	if (value & (1<< 8)) {file.write("  * Bit  8: Reserved" + newline);}
	if (value & (1<< 9)) {file.write("  * Bit  9: Reserved" + newline);}
	if (value & (1<<10)) {file.write("  * Bit 10: Reserved" + newline);}
	if (value & (1<<11)) {file.write("  * Bit 11: Reserved" + newline);}
	if (value & (1<<12)) {file.write("  * Bit 12: Reserved" + newline);}
	if (value & (1<<13)) {file.write("  * Bit 13: Reserved" + newline);}
	if (value & (1<<14)) {file.write("  * Bit 14: Reserved" + newline);}
	if (value & (1<<15)) {file.write("  * Bit 15: Reserved" + newline);}
	if (value & (1<<16)) {file.write("  * Bit 16: Reserved" + newline);}
	if (value & (1<<17)) {file.write("  * Bit 17: Reserved" + newline);}
	if (value & (1<<18)) {file.write("  * Bit 18: Reserved" + newline);}
	if (value & (1<<19)) {file.write("  * Bit 19: Reserved" + newline);}
	if (value & (1<<20)) {file.write("  * Bit 20: Reserved" + newline);}
	if (value & (1<<21)) {file.write("  * Bit 21: Reserved" + newline);}
	if (value & (1<<22)) {file.write("  * Bit 22: Reserved" + newline);}
	if (value & (1<<23)) {file.write("  * Bit 23: Reserved" + newline);}
	if (value & (1<<24)) {file.write("  * Bit 24: [MMC/SD] SD card detected PBIAS configuration is 1.8V" + newline);}
	if (value & (1<<25)) {file.write("  * Bit 25: Reserved" + newline);}
	if (value & (1<<26)) {file.write("  * Bit 26: Reserved" + newline);}
	if (value & (1<<27)) {file.write("  * Bit 27: Reserved" + newline);}
	if (value & (1<<28)) {file.write("  * Bit 28: [SATA] SATA is configured" + newline);}
	if (value & (1<<29)) {file.write("  * Bit 29: [SATA] SATA retried" + newline);}
	if (value & (1<<30)) {file.write("  * Bit 30: [SATA] SATA failed" + newline);}
	if (value & (1<<31)) {file.write("  * Bit 31: Reserved" + newline);}
}

// Help function for decoding PRM_RSTST register as well as the copy of PRM_RSTST saved with tracing vectors
function decode_prm_rstst(value)
{
if (reg_val & 1<<0  ) {file.write("  * Bit 0 : GLOBAL_COLD_RST" + newline);}
if (reg_val & 1<<1  ) {file.write("  * Bit 1 : GLOBAL_WARM_RST" + newline);}
if (reg_val & 1<<2  ) {file.write("  * Bit 2 : MPU_SECURITY_VIOL_RST" + newline);}
if (reg_val & 1<<3  ) {file.write("  * Bit 3 : MPU_WDT_RST: WD_TIMER2 and MPU subsystem watchdog reset event" + newline);}
if (reg_val & 1<<4  ) {file.write("  * Bit 4 : SECURE_WDT_RST" + newline);}
if (reg_val & 1<<5  ) {file.write("  * Bit 5 : EXTERNAL_WARM_RST" + newline);}
if (reg_val & 1<<6  ) {file.write("  * Bit 6 : VDD_MPU_VOLT_MGR_RST" + newline);}
if (reg_val & 1<<7  ) {file.write("  * Bit 7 : VDD_MM_VOLT_MGR_RST" + newline);}
if (reg_val & 1<<8  ) {file.write("  * Bit 8 : VDD_CORE_VOLT_MGR_RST" + newline);}
if (reg_val & 1<<9  ) {file.write("  * Bit 9 : ICEPICK_RST" + newline);}
if (reg_val & 1<<10 ) {file.write("  * Bit 10 : C2C_RST" + newline);}
if (reg_val & 1<<11 ) {file.write("  * Bit 11 : TSHUT_MPU_RST" + newline);}
if (reg_val & 1<<12 ) {file.write("  * Bit 12 : TSHUT_MM_RST" + newline);}
if (reg_val & 1<<13 ) {file.write("  * Bit 13 : TSHUT_CORE_RST" + newline);}
if (reg_val & 1<<14 ) {file.write("  * Bit 14 : LLI_RST" + newline);}
if (reg_val & 1<<15 ) {file.write("  * Bit 15 : TSHUT_DSPEVE_RST" + newline);}
if (reg_val & 1<<16 ) {file.write("  * Bit 16 : TSHUT_IVA_RST" + newline);}
}

// Build a filename that includes date/time
var today = new Date();
var year4digit = today.getFullYear();
var month2digit = ("0" + (today.getMonth()+1)).slice(-2);
var day2digit = ("0" + today.getDate()).slice(-2);
var hour2digit = ("0" + today.getHours()).slice(-2);
var minutes2digit = ("0" + today.getMinutes()).slice(-2);
var seconds2digit = ("0" + today.getSeconds()).slice(-2);
var filename_date = '_' + year4digit + '-' + month2digit + '-' + day2digit + '_' + hour2digit + minutes2digit + seconds2digit; 
var userHomeFolder = System.getProperty("user.home");
var filename = userHomeFolder + '/Desktop/' + 'am57xx-boot' + filename_date + '.txt';

file = new java.io.FileWriter(filename);

debugSessionDAP = ds.openSession("*","CS_DAP_DebugSS");
debugSessionDAP.target.connect();

/* Check ID_CODE register (address 0x4AE0C204) to determine which 
   AM57xx variant is being used */
try {
	id_code = debugSessionDAP.memory.readWord(0,0x4AE0C204,false);
} catch(ex) {
	print("\n Trouble reading ID_CODE.\n");
}

print("ID_CODE = 0x" + d2h(id_code));

// Check STD_FUSE_ID_2 register (address 0x4AE0C20C) for package type
try {
	fuse_id_2 = debugSessionDAP.memory.readWord(0,0x4AE0C20C,false);
} catch(ex) {
	print("\n Trouble reading STD_FUSE_ID_2.\n");
}
pkg_type = (fuse_id_2 & 0x00030000) >> 16;  // FUSE_ID_2[17:16] = pkg_type

switch(id_code) {
	case 0x0B9BC02F:
		print("AM571x SR1.0 detected.\n");
		device_type = 571;
		break;
	case 0x1B9BC02F:
		if(pkg_type == 1) {
			print("AM570x SR2.0 detected.\n");
			device_type = 570;
		} else if(pkg_type == 2) {
			print("AM571x SR2.0 detected.\n");
			device_type = 571;
		} else
			print("AM571x/AM570x SR2.0 unrecognized package type\n")
		break;
	case 0x2B9BC02F:
		if(pkg_type == 1) {
			print("AM570x SR2.1 detected.\n");
			device_type = 570;
		} else if(pkg_type == 2) {
			print("AM571x SR2.1 detected.\n");
			device_type = 571;
		} else
			print("AM571x/AM570x SR2.1 unrecognized package type\n")
		break;
	case 0x0B99002F:
		print("AM572x SR1.0 detected.\n");
		device_type = 572;
		break;
	case 0x1B99002F:
		print("AM572x SR1.1 detected.\n");
		device_type = 572;
		break;
	case 0x2B99002F:
		print("AM572x SR2.0 detected.\n");
		device_type = 572;
		break;
	case 0x0BB5002F:
		print("AM574x SR1.0 detected.\n");
		device_type = 574;
		break;
	default:
		print("Unable to identify which AM57xx variant.\n");
		debugSessionDAP.target.disconnect();
		throw("Terminating script.\n")
		break;
}


var reg_val;

// CTRL_CORE_BOOTSTRAP
reg_val = printRegisterValue(debugSessionDAP, "CTRL_CORE_BOOTSTRAP", 0x4A0026C4);
if ( (reg_val & (1 << 15)) == (1 << 15) )  {
	if ( (device_type == 574) || (device_type == 572) )
		file.write("  * sysboot15 = 1, internal pulldown permanently disabled (recommended for eMMC boot)" + newline);
	if ( (device_type == 571) || (device_type == 570) )
		file.write("  * sysboot15 = 1, internal pulldown enabled at boot (recommended for GPMC NOR boot)" + newline);
} else {
	if ( (device_type == 574) || (device_type == 572) )	
		file.write("  * sysboot15 = 0, internal pulldown enabled at boot (recommended for GPMC NOR boot)" + newline);
	if ( (device_type == 571) || (device_type == 570) )
		file.write("  * sysboot15 = 0, internal pulldown permanently disabled (recommended for eMMC boot)" + newline);
}
if ( (reg_val & (1 << 14)) == (1 << 14) )  {file.write("  * sysboot14 = 1, ILLEGAL VALUE!!!" + newline);}
if ( (reg_val & (1 << 13)) == (0 << 13) )  {file.write("  * XIP/NAND BOOTDEVICESIZE = 8-bit" + newline);}
if ( (reg_val & (1 << 13)) == (1 << 13) )  {file.write("  * XIP/NAND BOOTDEVICESIZE = 16-bit" + newline);}
if ( (reg_val & (3 << 11)) == (0 << 11) )  {file.write("  * XIP/NAND MUXCS0DEVICE = Non-muxed" + newline);}
if ( (reg_val & (3 << 11)) == (1 << 11) )  {file.write("  * XIP/NAND MUXCS0DEVICE = Muxed" + newline);}
if ( (reg_val & (3 << 11)) == (2 << 11) )  {file.write("  * XIP/NAND MUXCS0DEVICE = Reserved (undefined)" + newline);}
if ( (reg_val & (3 << 11)) == (3 << 11) )  {file.write("  * XIP/NAND MUXCS0DEVICE = Reserved (undefined)" + newline);}
if ( (reg_val & (1 << 10)) == (0 << 10) )  {file.write("  * XIP/NAND BOOTWAITEN, wait pin not monitored" + newline);}
if ( (reg_val & (1 << 10)) == (1 << 10) )  {file.write("  * XIP/NAND BOOTWAITEN, wait pin is monitored" + newline);}
if ( (reg_val & (3 <<  8)) == (0 <<  8) )  {file.write("  * SPEEDSELECT = Reserved" + newline);}
if ( (reg_val & (3 <<  8)) == (1 <<  8) )  {file.write("  * SPEEDSELECT = 20 MHz" + newline);}
if ( (reg_val & (3 <<  8)) == (2 <<  8) )  {file.write("  * SPEEDSELECT = 27 MHz" + newline);}
if ( (reg_val & (3 <<  8)) == (3 <<  8) )  {file.write("  * SPEEDSELECT = 19.2 MHz" + newline);}
if ( (reg_val & (3 <<  6)) == (0 <<  6) )  {file.write("  * QSPI offset = 64KB" + newline);}
if ( (reg_val & (3 <<  6)) == (1 <<  6) )  {file.write("  * QSPI offset = 128KB" + newline);}
if ( (reg_val & (3 <<  6)) == (2 <<  6) )  {file.write("  * QSPI offset = 256KB" + newline);}
if ( (reg_val & (3 <<  6)) == (3 <<  6) )  {file.write("  * QSPI offset = 512KB" + newline);}
if ( (reg_val & 0x3F) == (0x00) ) {file.write("  * USB -> eMMC" + newline);}
if ( (reg_val & 0x3F) == (0x01) ) {file.write("  * USB -> NAND" + newline);}
if ( (reg_val & 0x3F) == (0x02) ) {file.write("  * USB -> SD -> eMMC" + newline);}
if ( (reg_val & 0x3F) == (0x03) ) {file.write("  * USB -> SATA -> SD" + newline);}
if ( (reg_val & 0x3F) == (0x04) ) {file.write("  * USB -> UART -> XIP" + newline);}
if ( (reg_val & 0x3F) == (0x05) ) {file.write("  * SD -> XIP" + newline);}
if ( (reg_val & 0x3F) == (0x06) ) {file.write("  * SD -> QSPI_1" + newline);}
if ( (reg_val & 0x3F) == (0x07) ) {file.write("  * SD -> QSPI_4" + newline);}
if ( (reg_val & 0x3F) == (0x08) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x09) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x0A) ) {file.write("  * SD -> Fast XIP" + newline);}
if ( (reg_val & 0x3F) == (0x0B) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x0C) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x0D) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x0E) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x0F) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x10) ) {file.write("  * USB" + newline);}
if ( (reg_val & 0x3F) == (0x11) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x12) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x13) ) {file.write("  * UART" + newline);}
if ( (reg_val & 0x3F) == (0x14) ) {file.write("  * SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x15) ) {file.write("  * SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x16) ) {file.write("  * SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x17) ) {file.write("  * SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x18) ) {file.write("  * SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x19) ) {file.write("  * SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x1A) ) {file.write("  * SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x1B) ) {file.write("  * SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x1C) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x1D) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x1E) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x1F) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x20) ) {file.write("  * eMMC -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x21) ) {file.write("  * NAND -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x22) ) {file.write("  * SD -> eMMC -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x23) ) {file.write("  * SATA -> SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x24) ) {file.write("  * XIP -> USB -> UART" + newline);}
if ( (reg_val & 0x3F) == (0x25) ) {file.write("  * XIP -> SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x26) ) {file.write("  * QSPI_1 -> SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x27) ) {file.write("  * QSPI_4 -> SD -> USB" + newline);}
if ( (reg_val & 0x3F) == (0x28) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x29) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x2A) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x2B) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x2C) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x2D) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x2E) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x2F) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x30) ) {file.write("  * SD" + newline);}
if ( (reg_val & 0x3F) == (0x31) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x32) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x33) ) {file.write("  * Undefined" + newline);}
if ( (reg_val & 0x3F) == (0x34) ) {file.write("  * SATA" + newline);}
if ( (reg_val & 0x3F) == (0x35) ) {file.write("  * XIP" + newline);}
if ( (reg_val & 0x3F) == (0x36) ) {file.write("  * QSPI_1" + newline);}
if ( (reg_val & 0x3F) == (0x37) ) {file.write("  * QSPI_4" + newline);}
if ( (reg_val & 0x3F) == (0x38) ) {file.write("  * eMMC" + newline);}
if ( (reg_val & 0x3F) == (0x39) ) {file.write("  * NAND" + newline);}
if ( (reg_val & 0x3F) == (0x3A) ) {file.write("  * Fast XIP" + newline);}
if ( (reg_val & 0x3F) == (0x3B) ) {file.write("  * eMMC (boot part.)" + newline);}
if ( (reg_val & 0x3F) == (0x3C) ) {file.write("  * " + newline);}
if ( (reg_val & 0x3F) == (0x3D) ) {file.write("  * " + newline);}
if ( (reg_val & 0x3F) == (0x3E) ) {file.write("  * " + newline);}
if ( (reg_val & 0x3F) == (0x3F) ) {file.write("  * " + newline);}

// Current tracing vector, word 1
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Current tracing vector, word 1", 0x4037F040);
decode_tracing_vector_1(reg_val);

// Current tracing vector, word 2
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Current tracing vector, word 2", 0x4037F044);
decode_tracing_vector_2(reg_val);

// Current tracing vector, word 3
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Current tracing vector, word 3", 0x4037F048);
decode_tracing_vector_3(reg_val);

// Current tracing vector, word 4
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Current tracing vector, word 4", 0x4037F04C);
decode_tracing_vector_4(reg_val);

// Cold reset tracing vector, word 1
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Cold reset tracing vector, word 1", 0x4037F050);
decode_tracing_vector_1(reg_val);

// Cold reset tracing vector, word 2
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Cold reset tracing vector, word 2", 0x4037F054);
decode_tracing_vector_2(reg_val);

// Cold reset tracing vector, word 3
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Cold reset tracing vector, word 3", 0x4037F058);
decode_tracing_vector_3(reg_val);

// Cold reset tracing vector, word 4
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Cold reset tracing vector, word 4", 0x4037F05C);
decode_tracing_vector_4(reg_val);

// Current copy of the PRM_RSTST register (reset reasons)
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "Current copy of the PRM_RSTST register (reset reasons)", 0x4037F060);
decode_prm_rstst(reg_val);

// PRM_RSTST register
file.write(newline);
reg_val = printRegisterValue(debugSessionDAP, "PRM_RSTST", 0x4AE07D04);
decode_prm_rstst(reg_val);

debugSessionDAP.target.disconnect();

debugSessionA15 = ds.openSession("*","CortexA15_0");
debugSessionA15.target.connect();

// Get value of ARM Program Counter
value = debugSessionA15.memory.readRegister("PC");
value_string = d2h(value);
file.write(newline + "Cortex A15 Program Counter = 0x" + value_string + newline);
switch (value){
	case 0x38080:
		file.write("  -> Undefined exception default handler" + newline);
		break;
	case 0x38084:
		file.write("  -> SWI exception default handler" + newline);
		break;
	case 0x38088:
		file.write("  -> Prefetch abort exception default handler" + newline);
		value = debugSessionA15.memory.readRegister("R0");  // handler stores IFAR in R0
		file.write("  -> IFAR = " + d2h(value) + newline);
		value = debugSessionA15.memory.readRegister("R1");  // handler stores IFSR in R1
		file.write("  -> IFSR = " + d2h(value) + newline);
		break;
	case 0x3808C:
		file.write("  -> Data abort exception default handler" + newline);
		value = debugSessionA15.memory.readRegister("R0");  // handler stores DFAR in R0
		file.write("  -> DFAR = " + d2h(value) + newline);
		value = debugSessionA15.memory.readRegister("R1");  // handler stores DFSR in R1
		file.write("  -> DFSR = " + d2h(value) + newline);
		break;
	case 0x38090:
		file.write("  -> Unused exception default handler" + newline);
		break;
	case 0x38094:
		file.write("  -> IRQ exception default handler" + newline);
		break;
	case 0x38098:
		file.write("  -> FIQ exception default handler" + newline);
		break;
	default:
		break;
}


debugSessionA15.target.disconnect();

file.close();
print("Created file " + filename);