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authorTracy Yi2018-08-17 03:04:29 -0500
committerTracy Yi2018-08-17 03:12:27 -0500
commit5d39dff8fffa449d2c4222aca0dff361f0e26ed4 (patch)
tree5de295ef924f035e6d51af910ddba0b7a27fb3f4
downloadtas2562-android-driver-5d39dff8fffa449d2c4222aca0dff361f0e26ed4.tar.gz
tas2562-android-driver-5d39dff8fffa449d2c4222aca0dff361f0e26ed4.tar.xz
tas2562-android-driver-5d39dff8fffa449d2c4222aca0dff361f0e26ed4.zip
TAS2562 driver original release
Signed-off-by: Tracy Yi <tracy-yi@ti.com>
-rw-r--r--Kconfig15
-rw-r--r--License text GPLv2.txt339
-rw-r--r--Makefile2
-rw-r--r--dai_link.readme28
-rw-r--r--dts.readme13
-rw-r--r--tas2562-codec.c638
-rw-r--r--tas2562-codec.h31
-rw-r--r--tas2562-misc.c246
-rw-r--r--tas2562-misc.h37
-rw-r--r--tas2562-regmap.c833
-rw-r--r--tas2562.h770
11 files changed, 2952 insertions, 0 deletions
diff --git a/Kconfig b/Kconfig
new file mode 100644
index 0000000..f3a79ed
--- /dev/null
+++ b/Kconfig
@@ -0,0 +1,15 @@
1
2menuconfig SND_SOC_TAS2562
3 tristate "Texas Instruments TAS2562 SmartAmp(R)"
4
5if SND_SOC_TAS2562
6config TAS2562_REGMAP
7 bool "Use of RegMap API"
8
9config TAS2562_CODEC
10 bool "Codec Driver support"
11
12#config TAS2562_MISC
13# bool "Misc Driver support"
14
15endif # SND_SOC_TAS2562
diff --git a/License text GPLv2.txt b/License text GPLv2.txt
new file mode 100644
index 0000000..d159169
--- /dev/null
+++ b/License text GPLv2.txt
@@ -0,0 +1,339 @@
1 GNU GENERAL PUBLIC LICENSE
2 Version 2, June 1991
3
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diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..d69e0f2
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,2 @@
1snd-soc-tas2562-objs := tas2562-codec.o tas2562-regmap.o
2obj-$(CONFIG_SND_SOC_TAS2562) += snd-soc-tas2562.o
diff --git a/dai_link.readme b/dai_link.readme
new file mode 100644
index 0000000..4ca8e73
--- /dev/null
+++ b/dai_link.readme
@@ -0,0 +1,28 @@
1example for connecting CPU DAI
2
3#if defined(CONFIG_TAS2562_CODEC)
4 {
5 .name = LPASS_BE_PRI_MI2S_RX,
6 .stream_name = "Primary MI2S Hostless Playback",
7 .cpu_dai_name = "msm-dai-q6-mi2s.0",
8 .platform_name = "msm-pcm-routing",
9 .codec_name = "tas2562.3-0041",
10 .codec_dai_name = "tas2562 ASI",
11 .no_pcm = 1,
12 .be_id = MSM_BACKEND_DAI_PRI_MI2S_RX,
13 .be_hw_params_fixup = msm_be_prim_mi2s_hw_params_fixup,
14 .ops = &msm8974_prim_mi2s_be_ops,
15 },
16 {
17 .name = LPASS_BE_PRI_MI2S_TX,
18 .stream_name = "Primary MI2S Hostless Capture",
19 .cpu_dai_name = "msm-dai-q6-mi2s.0",
20 .platform_name = "msm-pcm-routing",
21 .codec_name = "tas2562.3-0041",
22 .codec_dai_name = "tas2562 ASI",
23 .no_pcm = 1,
24 .be_id = MSM_BACKEND_DAI_PRI_MI2S_TX,
25 .be_hw_params_fixup = msm_be_prim_mi2s_hw_params_fixup,
26 .ops = &msm8974_prim_mi2s_be_ops,
27 },
28#endif
diff --git a/dts.readme b/dts.readme
new file mode 100644
index 0000000..90a405b
--- /dev/null
+++ b/dts.readme
@@ -0,0 +1,13 @@
1example for dts:
2 tas2562@4c {
3 compatible = "ti,tas2562";
4 reg = <0x4c>;
5 ti,reset-gpio = <&msmgpio 13 0>;
6 ti,irq-gpio = <&msmgpio 59 0>;
7 ti,asi-format = <0>; /* 0, i2S; 1, DSP; */
8 ti,left-slot = <0>; /* <left slot number> */
9 ti,right-slot = <1>; /* <right slot number> */
10 ti,imon-slot-no = <0>; /* <current sense slot number> */
11 ti,vmon-slot-no = <2>; /* <current voltage slot number> */
12 status = "ok";
13 };
diff --git a/tas2562-codec.c b/tas2562-codec.c
new file mode 100644
index 0000000..dc9a4dc
--- /dev/null
+++ b/tas2562-codec.c
@@ -0,0 +1,638 @@
1/*
2** =============================================================================
3** Copyright (c) 2016 Texas Instruments Inc.
4**
5** This program is free software; you can redistribute it and/or modify it under
6** the terms of the GNU General Public License as published by the Free Software
7** Foundation; version 2.
8**
9** This program is distributed in the hope that it will be useful, but WITHOUT
10** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
11** FOR A PARTICULAR PURPOSE.See the GNU General Public License for more details.
12**
13** File:
14** tas2562-codec.c
15**
16** Description:
17** ALSA SoC driver for Texas Instruments TAS2562 High Performance 4W Smart
18** Amplifier
19**
20** =============================================================================
21*/
22
23#ifdef CONFIG_TAS2562_CODEC
24#define DEBUG
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/pm.h>
30#include <linux/i2c.h>
31#include <linux/gpio.h>
32#include <linux/regulator/consumer.h>
33#include <linux/firmware.h>
34#include <linux/regmap.h>
35#include <linux/of.h>
36#include <linux/of_gpio.h>
37#include <linux/slab.h>
38#include <sound/core.h>
39#include <sound/pcm.h>
40#include <sound/pcm_params.h>
41#include <sound/soc.h>
42#include <sound/initval.h>
43#include <sound/tlv.h>
44
45#include "tas2562.h"
46
47
48#define TAS2562_MDELAY 0xFFFFFFFE
49/* #define KCONTROL_CODEC */
50static char const *iv_enable_text[] = {"Off", "On"};
51static int tas2562iv_enable;
52static const struct soc_enum tas2562_enum[] = {
53 SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(iv_enable_text), iv_enable_text),
54};
55
56static unsigned int tas2562_codec_read(struct snd_soc_codec *codec,
57 unsigned int reg)
58{
59 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
60 int nResult = 0;
61 unsigned int value = 0;
62
63 mutex_lock(&pTAS2562->dev_lock);
64
65 nResult = regmap_read(pTAS2562->regmap, reg, &value);
66
67 if (nResult < 0)
68 dev_err(pTAS2562->dev, "%s, ERROR, reg=0x%x, E=%d\n",
69 __func__, reg, nResult);
70 else
71 dev_dbg(pTAS2562->dev, "%s, reg: 0x%x, value: 0x%x\n",
72 __func__, reg, value);
73
74 mutex_unlock(&pTAS2562->dev_lock);
75
76 if (nResult >= 0)
77 return value;
78 else
79 return nResult;
80}
81
82static int tas2562iv_put(struct snd_kcontrol *kcontrol,
83 struct snd_ctl_elem_value *ucontrol)
84{
85 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
86
87 if (codec == NULL) {
88 pr_err("%s: codec is NULL \n", __func__);
89 return 0;
90 }
91
92 tas2562iv_enable = ucontrol->value.integer.value[0];
93
94 if (tas2562iv_enable) {
95 pr_debug("%s: tas2562iv_enable \n", __func__);
96 snd_soc_update_bits(codec, TAS2562_PowerControl,
97 TAS2562_PowerControl_OperationalMode10_Mask |
98 TAS2562_PowerControl_ISNSPower_Mask |
99 TAS2562_PowerControl_VSNSPower_Mask,
100 TAS2562_PowerControl_OperationalMode10_Active |
101 TAS2562_PowerControl_VSNSPower_Active |
102 TAS2562_PowerControl_ISNSPower_Active);
103 } else {
104 pr_debug("%s: tas2562iv_disable \n", __func__);
105 snd_soc_update_bits(codec, TAS2562_PowerControl,
106 TAS2562_PowerControl_OperationalMode10_Mask |
107 TAS2562_PowerControl_ISNSPower_Mask |
108 TAS2562_PowerControl_VSNSPower_Mask,
109 TAS2562_PowerControl_OperationalMode10_Active |
110 TAS2562_PowerControl_VSNSPower_PoweredDown |
111 TAS2562_PowerControl_ISNSPower_PoweredDown);
112 }
113
114 pr_debug("%s: tas2562iv_enable = %d\n", __func__, tas2562iv_enable);
115
116 return 0;
117}
118
119static int tas2562iv_get(struct snd_kcontrol *kcontrol,
120 struct snd_ctl_elem_value *ucontrol)
121{
122 int value;
123 ucontrol->value.integer.value[0] = tas2562iv_enable;
124 value=gpio_get_value(37);
125 pr_debug("%s: tas2562iv_enable = %d\n", __func__, tas2562iv_enable);
126 pr_debug("%s: gpio37 value = %d\n", __func__, value);
127 return 0;
128}
129static const struct snd_kcontrol_new tas2562_controls[] = {
130SOC_ENUM_EXT("TAS2562 IVSENSE ENABLE", tas2562_enum[0],
131 tas2562iv_get, tas2562iv_put),
132};
133
134static int tas2562_codec_write(struct snd_soc_codec *codec, unsigned int reg,
135 unsigned int value)
136{
137 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
138
139 int nResult = 0;
140
141 mutex_lock(&pTAS2562->dev_lock);
142
143 nResult = regmap_write(pTAS2562->regmap, reg, value);
144 if (nResult < 0)
145 dev_err(pTAS2562->dev, "%s, ERROR, reg=0x%x, E=%d\n",
146 __func__, reg, nResult);
147 else
148 dev_dbg(pTAS2562->dev, "%s, reg: 0x%x, 0x%x\n",
149 __func__, reg, value);
150
151 mutex_unlock(&pTAS2562->dev_lock);
152
153 return nResult;
154
155}
156
157
158static int tas2562_codec_suspend(struct snd_soc_codec *codec)
159{
160 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
161 int ret = 0;
162
163 mutex_lock(&pTAS2562->codec_lock);
164
165 dev_dbg(pTAS2562->dev, "%s\n", __func__);
166 pTAS2562->runtime_suspend(pTAS2562);
167
168 mutex_unlock(&pTAS2562->codec_lock);
169 return ret;
170}
171
172static int tas2562_codec_resume(struct snd_soc_codec *codec)
173{
174 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
175 int ret = 0;
176
177 mutex_lock(&pTAS2562->codec_lock);
178
179 dev_dbg(pTAS2562->dev, "%s\n", __func__);
180 pTAS2562->runtime_resume(pTAS2562);
181
182 mutex_unlock(&pTAS2562->codec_lock);
183 return ret;
184}
185
186static const struct snd_kcontrol_new tas2562_asi_controls[] = {
187 SOC_DAPM_SINGLE("Left", TAS2562_TDMConfigurationReg2,
188 4, 1, 0),
189 SOC_DAPM_SINGLE("Right", TAS2562_TDMConfigurationReg2,
190 4, 2, 0),
191 SOC_DAPM_SINGLE("LeftRightDiv2", TAS2562_TDMConfigurationReg2,
192 4, 3, 0),
193};
194
195
196static int tas2562_dac_event(struct snd_soc_dapm_widget *w,
197 struct snd_kcontrol *kcontrol, int event)
198{
199 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
200
201 switch (event) {
202 case SND_SOC_DAPM_POST_PMU:
203 snd_soc_update_bits(codec, TAS2562_PowerControl,
204 TAS2562_PowerControl_OperationalMode10_Mask |
205 TAS2562_PowerControl_ISNSPower_Mask |
206 TAS2562_PowerControl_VSNSPower_Mask,
207 TAS2562_PowerControl_OperationalMode10_Active |
208 TAS2562_PowerControl_VSNSPower_Active |
209 TAS2562_PowerControl_ISNSPower_Active);
210 break;
211 case SND_SOC_DAPM_PRE_PMD:
212 snd_soc_update_bits(codec, TAS2562_PowerControl,
213 TAS2562_PowerControl_OperationalMode10_Mask,
214 TAS2562_PowerControl_OperationalMode10_Shutdown);
215 break;
216
217 }
218 return 0;
219
220}
221
222static const struct snd_soc_dapm_widget tas2562_dapm_widgets[] = {
223 SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
224 SND_SOC_DAPM_AIF_OUT("Voltage Sense", "ASI1 Capture", 1, TAS2562_PowerControl, 2, 1),
225 SND_SOC_DAPM_AIF_OUT("Current Sense", "ASI1 Capture", 0, TAS2562_PowerControl, 3, 1),
226 SND_SOC_DAPM_MIXER("ASI1 Sel",
227 TAS2562_TDMConfigurationReg2, 4, 0,
228 &tas2562_asi_controls[0],
229 ARRAY_SIZE(tas2562_asi_controls)),
230 SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0, tas2562_dac_event,
231 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
232 SND_SOC_DAPM_OUTPUT("OUT"),
233 SND_SOC_DAPM_SIGGEN("VMON"),
234 SND_SOC_DAPM_SIGGEN("IMON")
235};
236
237static const struct snd_soc_dapm_route tas2562_audio_map[] = {
238 {"ASI1 Sel", "Left", "ASI1"},
239 {"ASI1 Sel", "Right", "ASI1"},
240 {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
241 {"DAC", NULL, "ASI1 Sel"},
242 {"OUT", NULL, "DAC"},
243 /*{"VMON", NULL, "Voltage Sense"},
244 {"IMON", NULL, "Current Sense"},*/
245 {"Voltage Sense", NULL, "VMON"},
246 {"Current Sense", NULL, "IMON"},
247};
248
249
250static int tas2562_mute(struct snd_soc_dai *dai, int mute)
251{
252 struct snd_soc_codec *codec = dai->codec;
253 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
254
255 mutex_lock(&pTAS2562->codec_lock);
256 if (mute) {
257 snd_soc_update_bits(codec, TAS2562_PowerControl,
258 TAS2562_PowerControl_OperationalMode10_Mask,
259 TAS2562_PowerControl_OperationalMode10_Mute);
260 } else {
261 snd_soc_update_bits(codec, TAS2562_PowerControl,
262 TAS2562_PowerControl_OperationalMode10_Mask,
263 TAS2562_PowerControl_OperationalMode10_Active);
264 }
265 mutex_unlock(&pTAS2562->codec_lock);
266 return 0;
267}
268
269static int tas2562_slot_config(struct snd_soc_codec *codec, struct tas2562_priv *pTAS2562, int blr_clk_ratio)
270{
271 int ret = 0;
272 snd_soc_update_bits(codec,
273 TAS2562_TDMConfigurationReg5, 0xff, 0x42);
274
275 snd_soc_update_bits(codec,
276 TAS2562_TDMConfigurationReg6, 0xff, 0x40);
277
278 return ret;
279}
280
281//Added/Mofified 060356-PP
282//To avoid implicit decleration
283
284static int tas2562_set_slot(struct snd_soc_codec *codec, int slot_width)
285{
286 int ret = 0;
287 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
288
289 switch (slot_width) {
290 case 16:
291 ret = snd_soc_update_bits(codec,
292 TAS2562_TDMConfigurationReg2,
293 TAS2562_TDMConfigurationReg2_RXSLEN10_Mask,
294 TAS2562_TDMConfigurationReg2_RXSLEN10_16Bits);
295 break;
296
297 case 24:
298 ret = snd_soc_update_bits(codec,
299 TAS2562_TDMConfigurationReg2,
300 TAS2562_TDMConfigurationReg2_RXSLEN10_Mask,
301 TAS2562_TDMConfigurationReg2_RXSLEN10_24Bits);
302 break;
303
304 case 32:
305 ret = snd_soc_update_bits(codec,
306 TAS2562_TDMConfigurationReg2,
307 TAS2562_TDMConfigurationReg2_RXSLEN10_Mask,
308 TAS2562_TDMConfigurationReg2_RXSLEN10_32Bits);
309 break;
310
311 case 0:
312 /* Do not change slot width */
313 break;
314
315 default:
316 dev_dbg(pTAS2562->dev, "slot width not supported");
317 ret = -EINVAL;
318 }
319
320 if (ret >= 0)
321 pTAS2562->mnSlot_width = slot_width;
322
323 return ret;
324}
325
326static int tas2562_hw_params(struct snd_pcm_substream *substream,
327 struct snd_pcm_hw_params *params,
328 struct snd_soc_dai *dai)
329{
330 struct snd_soc_codec *codec = dai->codec;
331 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
332 int blr_clk_ratio;
333 int ret = 0;
334 int slot_width_tmp = 16;
335
336 dev_dbg(pTAS2562->dev, "%s, format: %d\n", __func__,
337 params_format(params));
338
339 switch (params_format(params)) {
340 case SNDRV_PCM_FORMAT_S16_LE:
341 snd_soc_update_bits(codec,
342 TAS2562_TDMConfigurationReg2,
343 TAS2562_TDMConfigurationReg2_RXWLEN32_Mask,
344 TAS2562_TDMConfigurationReg2_RXWLEN32_16Bits);
345 pTAS2562->ch_size = 16;
346 if (pTAS2562->mnSlot_width == 0)
347 slot_width_tmp = 16;
348 break;
349 case SNDRV_PCM_FMTBIT_S24_LE:
350 snd_soc_update_bits(codec,
351 TAS2562_TDMConfigurationReg2,
352 TAS2562_TDMConfigurationReg2_RXWLEN32_Mask,
353 TAS2562_TDMConfigurationReg2_RXWLEN32_24Bits);
354 pTAS2562->ch_size = 24;
355 if (pTAS2562->mnSlot_width == 0)
356 slot_width_tmp = 32;
357 break;
358 case SNDRV_PCM_FMTBIT_S32_LE:
359 snd_soc_update_bits(codec,
360 TAS2562_TDMConfigurationReg2,
361 TAS2562_TDMConfigurationReg2_RXWLEN32_Mask,
362 TAS2562_TDMConfigurationReg2_RXWLEN32_32Bits);
363 pTAS2562->ch_size = 32;
364 if (pTAS2562->mnSlot_width == 0)
365 slot_width_tmp = 32;
366 break;
367
368 }
369
370 /* If machine driver did not call set slot width */
371 if (pTAS2562->mnSlot_width == 0)
372 tas2562_set_slot(codec, slot_width_tmp);
373
374 blr_clk_ratio = params_channels(params) * pTAS2562->ch_size;
375 dev_dbg(pTAS2562->dev, "blr_clk_ratio: %d\n", blr_clk_ratio);
376 tas2562_slot_config(codec, pTAS2562, blr_clk_ratio);
377
378 dev_dbg(pTAS2562->dev, "%s, sample rate: %d\n", __func__,
379 params_rate(params));
380 switch (params_rate(params)) {
381 case 48000:
382 snd_soc_update_bits(codec,
383 TAS2562_TDMConfigurationReg0,
384 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
385 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
386 snd_soc_update_bits(codec,
387 TAS2562_TDMConfigurationReg0,
388 TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
389 TAS2562_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz);
390 break;
391 case 44100:
392 snd_soc_update_bits(codec,
393 TAS2562_TDMConfigurationReg0,
394 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
395 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
396 snd_soc_update_bits(codec,
397 TAS2562_TDMConfigurationReg0,
398 TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
399 TAS2562_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz);
400 break;
401 case 96000:
402 snd_soc_update_bits(codec,
403 TAS2562_TDMConfigurationReg0,
404 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
405 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
406 snd_soc_update_bits(codec,
407 TAS2562_TDMConfigurationReg0,
408 TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
409 TAS2562_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz);
410 break;
411 case 88200:
412 snd_soc_update_bits(codec,
413 TAS2562_TDMConfigurationReg0,
414 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
415 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
416 snd_soc_update_bits(codec,
417 TAS2562_TDMConfigurationReg0,
418 TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
419 TAS2562_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz);
420 break;
421 case 19200:
422 snd_soc_update_bits(codec,
423 TAS2562_TDMConfigurationReg0,
424 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
425 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
426 snd_soc_update_bits(codec,
427 TAS2562_TDMConfigurationReg0,
428 TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
429 TAS2562_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz);
430 break;
431 case 17640:
432 snd_soc_update_bits(codec,
433 TAS2562_TDMConfigurationReg0,
434 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask,
435 TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
436 snd_soc_update_bits(codec,
437 TAS2562_TDMConfigurationReg0,
438 TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask,
439 TAS2562_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz);
440 break;
441 default:
442 dev_dbg(pTAS2562->dev, "%s, unsupported sample rate\n", __func__);
443
444 }
445 return ret;
446}
447
448static int tas2562_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
449{
450 u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0;
451 struct snd_soc_codec *codec = dai->codec;
452 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
453 int ret = 0;
454
455 dev_dbg(pTAS2562->dev, "%s, format=0x%x\n", __func__, fmt);
456
457 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
458 case SND_SOC_DAIFMT_CBS_CFS:
459 asi_cfg_1 = 0x00;
460 break;
461 default:
462 dev_err(pTAS2562->dev, "ASI format master is not found\n");
463 ret = -EINVAL;
464 }
465
466 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
467 case SND_SOC_DAIFMT_NB_NF:
468 dev_dbg(pTAS2562->dev, "INV format: NBNF\n");
469 asi_cfg_1 |= TAS2562_TDMConfigurationReg1_RXEDGE_Rising;
470 break;
471 case SND_SOC_DAIFMT_IB_NF:
472 dev_dbg(pTAS2562->dev, "INV format: IBNF\n");
473 asi_cfg_1 |= TAS2562_TDMConfigurationReg1_RXEDGE_Falling;
474 break;
475 default:
476 dev_err(pTAS2562->dev, "ASI format Inverse is not found\n");
477 ret = -EINVAL;
478 }
479
480 snd_soc_update_bits(codec, TAS2562_TDMConfigurationReg1,
481 TAS2562_TDMConfigurationReg1_RXEDGE_Mask,
482 asi_cfg_1);
483
484 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
485 case (SND_SOC_DAIFMT_I2S):
486 tdm_rx_start_slot = 1;
487 break;
488 case (SND_SOC_DAIFMT_DSP_A):
489 case (SND_SOC_DAIFMT_DSP_B):
490 tdm_rx_start_slot = 1;
491 break;
492 case (SND_SOC_DAIFMT_LEFT_J):
493 tdm_rx_start_slot = 0;
494 break;
495 default:
496 dev_err(pTAS2562->dev, "DAI Format is not found, fmt=0x%x\n", fmt);
497 ret = -EINVAL;
498 break;
499 }
500
501 snd_soc_update_bits(codec, TAS2562_TDMConfigurationReg1,
502 TAS2562_TDMConfigurationReg1_RXOFFSET51_Mask,
503 (tdm_rx_start_slot << TAS2562_TDMConfigurationReg1_RXOFFSET51_Shift));
504 return ret;
505}
506
507static int tas2562_set_dai_tdm_slot(struct snd_soc_dai *dai,
508 unsigned int tx_mask, unsigned int rx_mask,
509 int slots, int slot_width)
510{
511 int ret = 0;
512 struct snd_soc_codec *codec = dai->codec;
513 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
514
515 dev_dbg(pTAS2562->dev, "%s, tx_mask:%d, rx_mask:%d, slots:%d, slot_width:%d",
516 __func__, tx_mask, rx_mask, slots, slot_width);
517
518 ret = tas2562_set_slot(codec, slot_width);
519
520 return ret;
521}
522
523static struct snd_soc_dai_ops tas2562_dai_ops = {
524 .digital_mute = tas2562_mute,
525 .hw_params = tas2562_hw_params,
526 .set_fmt = tas2562_set_dai_fmt,
527 .set_tdm_slot = tas2562_set_dai_tdm_slot,
528};
529
530#define TAS2562_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
531 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
532
533#define TAS2562_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 \
534 SNDRV_PCM_RATE_88200 |\
535 SNDRV_PCM_RATE_96000 |\
536 SNDRV_PCM_RATE_176400 |\
537 SNDRV_PCM_RATE_192000\
538 )
539
540static struct snd_soc_dai_driver tas2562_dai_driver[] = {
541 {
542 .name = "tas2562 ASI1",
543 .id = 0,
544 .playback = {
545 .stream_name = "ASI1 Playback",
546 .channels_min = 2,
547 .channels_max = 2,
548 .rates = SNDRV_PCM_RATE_8000_192000,
549 .formats = TAS2562_FORMATS,
550 },
551 .capture = {
552 .stream_name = "ASI1 Capture",
553 .channels_min = 0,
554 .channels_max = 2,
555 .rates = SNDRV_PCM_RATE_8000_192000,
556 .formats = TAS2562_FORMATS,
557 },
558 .ops = &tas2562_dai_ops,
559 .symmetric_rates = 1,
560 },
561};
562
563static int tas2562_codec_probe(struct snd_soc_codec *codec)
564{
565 int ret;
566 struct tas2562_priv *pTAS2562 = snd_soc_codec_get_drvdata(codec);
567
568 ret = snd_soc_add_codec_controls(codec, tas2562_controls,
569 ARRAY_SIZE(tas2562_controls));
570 if (ret < 0) {
571 pr_err("%s: add_codec_controls failed, err %d\n",
572 __func__, ret);
573 return ret;
574 }
575
576
577 dev_err(pTAS2562->dev, "%s\n", __func__);
578
579 return 0;
580}
581
582static int tas2562_codec_remove(struct snd_soc_codec *codec)
583{
584 return 0;
585}
586
587/*static DECLARE_TLV_DB_SCALE(dac_tlv, 0, 100, 0);*/
588static DECLARE_TLV_DB_SCALE(tas2562_digital_tlv, 1100, 50, 0);
589static DECLARE_TLV_DB_SCALE(tas2562_playback_volume, -12750, 50, 0);
590
591static const struct snd_kcontrol_new tas2562_snd_controls[] = {
592 SOC_SINGLE_TLV("Amp Output Level", TAS2562_PlaybackConfigurationReg0,
593 0, 0x16, 0,
594 tas2562_digital_tlv),
595 SOC_SINGLE_TLV("Playback Volume", TAS2562_PlaybackConfigurationReg2,
596 0, TAS2562_PlaybackConfigurationReg2_DVCPCM70_Mask, 1,
597 tas2562_playback_volume),
598};
599
600static struct snd_soc_codec_driver soc_codec_driver_tas2562 = {
601 .probe = tas2562_codec_probe,
602 .remove = tas2562_codec_remove,
603 .read = tas2562_codec_read,
604 .write = tas2562_codec_write,
605 .suspend = tas2562_codec_suspend,
606 .resume = tas2562_codec_resume,
607 .component_driver = {
608 .controls = tas2562_snd_controls,
609 .num_controls = ARRAY_SIZE(tas2562_snd_controls),
610 .dapm_widgets = tas2562_dapm_widgets,
611 .num_dapm_widgets = ARRAY_SIZE(tas2562_dapm_widgets),
612 .dapm_routes = tas2562_audio_map,
613 .num_dapm_routes = ARRAY_SIZE(tas2562_audio_map),
614 },
615};
616
617int tas2562_register_codec(struct tas2562_priv *pTAS2562)
618{
619 int nResult = 0;
620
621 dev_info(pTAS2562->dev, "%s, enter\n", __func__);
622 nResult = snd_soc_register_codec(pTAS2562->dev,
623 &soc_codec_driver_tas2562,
624 tas2562_dai_driver, ARRAY_SIZE(tas2562_dai_driver));
625 return nResult;
626}
627
628int tas2562_deregister_codec(struct tas2562_priv *pTAS2562)
629{
630 snd_soc_unregister_codec(pTAS2562->dev);
631
632 return 0;
633}
634
635MODULE_AUTHOR("Texas Instruments Inc.");
636MODULE_DESCRIPTION("TAS2562 ALSA SOC Smart Amplifier driver");
637MODULE_LICENSE("GPL v2");
638#endif /* CONFIG_TAS2562_CODEC */
diff --git a/tas2562-codec.h b/tas2562-codec.h
new file mode 100644
index 0000000..cd13894
--- /dev/null
+++ b/tas2562-codec.h
@@ -0,0 +1,31 @@
1/*
2** =============================================================================
3** Copyright (c) 2016 Texas Instruments Inc.
4**
5** This program is free software; you can redistribute it and/or modify it under
6** the terms of the GNU General Public License as published by the Free Software
7** Foundation; version 2.
8**
9** This program is distributed in the hope that it will be useful, but WITHOUT
10** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
11** FOR A PARTICULAR PURPOSE.See the GNU General Public License for more details.
12**
13** File:
14** tas2562-codec.h
15**
16** Description:
17** header file for tas2562-codec.c
18**
19** =============================================================================
20*/
21
22#ifndef _TAS2562_CODEC_H
23#define _TAS2562_CODEC_H
24
25#include "tas2562.h"
26
27int tas2562_register_codec(struct tas2562_priv *pTAS2562);
28int tas2562_deregister_codec(struct tas2562_priv *pTAS2562);
29int tas2562_LoadConfig(struct tas2562_priv *pTAS2562, bool bPowerOn);
30
31#endif /* _TAS2562_CODEC_H */
diff --git a/tas2562-misc.c b/tas2562-misc.c
new file mode 100644
index 0000000..a63bfa2
--- /dev/null
+++ b/tas2562-misc.c
@@ -0,0 +1,246 @@
1/*
2** =============================================================================
3** Copyright (c) 2016 Texas Instruments Inc.
4**
5** This program is free software; you can redistribute it and/or modify it under
6** the terms of the GNU General Public License as published by the Free Software
7** Foundation; version 2.
8**
9** This program is distributed in the hope that it will be useful, but WITHOUT
10** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
11** FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
12** File:
13** tas2562-misc.c
14**
15** Description:
16** misc driver for Texas Instruments TAS2562 High Performance 4W Smart Amplifier
17**
18** =============================================================================
19*/
20
21#define DEBUG
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/gpio.h>
29#include <linux/regulator/consumer.h>
30#include <linux/firmware.h>
31#include <linux/regmap.h>
32#include <linux/of.h>
33#include <linux/of_gpio.h>
34#include <linux/slab.h>
35#include <linux/syscalls.h>
36#include <linux/fcntl.h>
37#include <linux/miscdevice.h>
38#include <linux/uaccess.h>
39
40#include "tas2562.h"
41#include "tas2562-misc.h"
42#include <linux/dma-mapping.h>
43
44static int g_logEnable = 1;
45static struct tas2562_priv *g_tas2562;
46
47static int tas2562_file_open(struct inode *inode, struct file *file)
48{
49 struct tas2562_priv *pTAS2562 = g_tas2562;
50
51 if (!try_module_get(THIS_MODULE))
52 return -ENODEV;
53
54 file->private_data = (void *)pTAS2562;
55
56 if (g_logEnable)
57 dev_info(pTAS2562->dev, "%s\n", __func__);
58 return 0;
59}
60
61static int tas2562_file_release(struct inode *inode, struct file *file)
62{
63 struct tas2562_priv *pTAS2562 = (struct tas2562_priv *)file->private_data;
64
65 if (g_logEnable)
66 dev_info(pTAS2562->dev, "%s\n", __func__);
67
68 file->private_data = (void *)NULL;
69 module_put(THIS_MODULE);
70
71 return 0;
72}
73
74static ssize_t tas2562_file_read(struct file *file, char *buf, size_t count, loff_t *ppos)
75{
76 struct tas2562_priv *pTAS2562 = (struct tas2562_priv *)file->private_data;
77 int ret = 0;
78 unsigned int nValue = 0;
79 unsigned char value = 0;
80 unsigned char *p_kBuf = NULL;
81
82 mutex_lock(&pTAS2562->file_lock);
83
84 switch (pTAS2562->mnDBGCmd) {
85 case TIAUDIO_CMD_REG_READ:
86 {
87 if (g_logEnable)
88 dev_info(pTAS2562->dev,
89 "TIAUDIO_CMD_REG_READ: current_reg = 0x%x, count=%d\n",
90 pTAS2562->mnCurrentReg, (int)count);
91 if (count == 1) {
92 ret = pTAS2562->read(pTAS2562, pTAS2562->mnCurrentReg, &nValue);
93 if (ret < 0) {
94 dev_err(pTAS2562->dev, "dev read fail %d\n", ret);
95 break;
96 }
97
98 value = (u8)nValue;
99 if (g_logEnable)
100 dev_info(pTAS2562->dev, "TIAUDIO_CMD_REG_READ: nValue=0x%x, value=0x%x\n",
101 nValue, value);
102 ret = copy_to_user(buf, &value, 1);
103 if (ret != 0) {
104 /* Failed to copy all the data, exit */
105 dev_err(pTAS2562->dev, "copy to user fail %d\n", ret);
106 }
107 } else if (count > 1) {
108 p_kBuf = kzalloc(count, GFP_KERNEL);
109 if (p_kBuf != NULL) {
110 ret = pTAS2562->bulk_read(pTAS2562, pTAS2562->mnCurrentReg, p_kBuf, count);
111 if (ret < 0) {
112 dev_err(pTAS2562->dev, "dev bulk read fail %d\n", ret);
113 } else {
114 ret = copy_to_user(buf, p_kBuf, count);
115 if (ret != 0) {
116 /* Failed to copy all the data, exit */
117 dev_err(pTAS2562->dev, "copy to user fail %d\n", ret);
118 }
119 }
120
121 kfree(p_kBuf);
122 } else {
123 dev_err(pTAS2562->dev, "read no mem\n");
124 }
125 }
126 }
127 break;
128 }
129 pTAS2562->mnDBGCmd = 0;
130
131 mutex_unlock(&pTAS2562->file_lock);
132 return count;
133}
134
135static ssize_t tas2562_file_write(struct file *file, const char *buf, size_t count, loff_t *ppos)
136{
137 struct tas2562_priv *pTAS2562 = (struct tas2562_priv *)file->private_data;
138 int ret = 0;
139 unsigned char *p_kBuf = NULL;
140 unsigned int reg = 0;
141 unsigned int len = 0;
142
143 mutex_lock(&pTAS2562->file_lock);
144
145 p_kBuf = kzalloc(count, GFP_KERNEL);
146 if (p_kBuf == NULL) {
147 dev_err(pTAS2562->dev, "write no mem\n");
148 goto err;
149 }
150
151 ret = copy_from_user(p_kBuf, buf, count);
152 if (ret != 0) {
153 dev_err(pTAS2562->dev, "copy_from_user failed.\n");
154 goto err;
155 }
156
157 pTAS2562->mnDBGCmd = p_kBuf[0];
158 switch (pTAS2562->mnDBGCmd) {
159 case TIAUDIO_CMD_REG_WITE:
160 if (count > 5) {
161 reg = ((unsigned int)p_kBuf[1] << 24) +
162 ((unsigned int)p_kBuf[2] << 16) +
163 ((unsigned int)p_kBuf[3] << 8) +
164 (unsigned int)p_kBuf[4];
165 len = count - 5;
166 if (len == 1) {
167 ret = pTAS2562->write(pTAS2562, reg, p_kBuf[5]);
168 if (g_logEnable)
169 dev_info(pTAS2562->dev,
170 "TIAUDIO_CMD_REG_WITE, Reg=0x%x, Val=0x%x\n",
171 reg, p_kBuf[5]);
172 } else {
173 ret = pTAS2562->bulk_write(pTAS2562, reg, &p_kBuf[5], len);
174 }
175 } else {
176 dev_err(pTAS2562->dev, "%s, write len fail, count=%d.\n",
177 __func__, (int)count);
178 }
179 pTAS2562->mnDBGCmd = 0;
180 break;
181
182 case TIAUDIO_CMD_REG_READ:
183 if (count == 5) {
184 pTAS2562->mnCurrentReg = ((unsigned int)p_kBuf[1] << 24) +
185 ((unsigned int)p_kBuf[2] << 16) +
186 ((unsigned int)p_kBuf[3] << 8) +
187 (unsigned int)p_kBuf[4];
188 if (g_logEnable) {
189 dev_info(pTAS2562->dev,
190 "TIAUDIO_CMD_REG_READ, whole=0x%x\n",
191 pTAS2562->mnCurrentReg);
192 }
193 } else {
194 dev_err(pTAS2562->dev, "read len fail.\n");
195 }
196 break;
197 }
198err:
199 if (p_kBuf != NULL)
200 kfree(p_kBuf);
201
202 mutex_unlock(&pTAS2562->file_lock);
203
204 return count;
205}
206
207static const struct file_operations fops = {
208 .owner = THIS_MODULE,
209 .read = tas2562_file_read,
210 .write = tas2562_file_write,
211 .unlocked_ioctl = NULL,
212 .open = tas2562_file_open,
213 .release = tas2562_file_release,
214};
215
216#define MODULE_NAME "tas2562"
217static struct miscdevice tas2562_misc = {
218 .minor = MISC_DYNAMIC_MINOR,
219 .name = MODULE_NAME,
220 .fops = &fops,
221};
222
223int tas2562_register_misc(struct tas2562_priv *pTAS2562)
224{
225 int ret = 0;
226
227 g_tas2562 = pTAS2562;
228 ret = misc_register(&tas2562_misc);
229 if (ret) {
230 dev_err(pTAS2562->dev, "TAS2562 misc fail: %d\n", ret);
231 }
232
233 dev_info(pTAS2562->dev, "%s, leave\n", __func__);
234
235 return ret;
236}
237
238int tas2562_deregister_misc(struct tas2562_priv *pTAS2562)
239{
240 misc_deregister(&tas2562_misc);
241 return 0;
242}
243
244MODULE_AUTHOR("Texas Instruments Inc.");
245MODULE_DESCRIPTION("TAS2562 Misc Smart Amplifier driver");
246MODULE_LICENSE("GPL v2");
diff --git a/tas2562-misc.h b/tas2562-misc.h
new file mode 100644
index 0000000..e92971d
--- /dev/null
+++ b/tas2562-misc.h
@@ -0,0 +1,37 @@
1/*
2** =============================================================================
3** Copyright (c) 2016 Texas Instruments Inc.
4**
5** This program is free software; you can redistribute it and/or modify it under
6** the terms of the GNU General Public License as published by the Free Software
7** Foundation; version 2.
8**
9** This program is distributed in the hope that it will be useful, but WITHOUT
10** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
11** FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
12**
13** File:
14** tas2562-misc.h
15**
16** Description:
17** header file for tas2562-misc.c
18**
19** =============================================================================
20*/
21
22#ifndef _TAS2562_MISC_H
23#define _TAS2562_MISC_H
24
25#define TIAUDIO_CMD_REG_WITE 1
26#define TIAUDIO_CMD_REG_READ 2
27#define TIAUDIO_CMD_DEBUG_ON 3
28#define TIAUDIO_CMD_CALIBRATION 7
29#define TIAUDIO_CMD_SAMPLERATE 8
30#define TIAUDIO_CMD_BITRATE 9
31#define TIAUDIO_CMD_DACVOLUME 10
32#define TIAUDIO_CMD_SPEAKER 11
33
34int tas2562_register_misc(struct tas2562_priv *pTAS2562);
35int tas2562_deregister_misc(struct tas2562_priv *pTAS2562);
36
37#endif /* _TAS2562_MISC_H */
diff --git a/tas2562-regmap.c b/tas2562-regmap.c
new file mode 100644
index 0000000..47153b5
--- /dev/null
+++ b/tas2562-regmap.c
@@ -0,0 +1,833 @@
1/*
2 * ALSA SoC Texas Instruments TAS2562 High Performance 4W Smart Amplifier
3 *
4 * Copyright (C) 2016 Texas Instruments, Inc.
5 *
6 * Author: saiprasad
7 *
8 * This package is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
13 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
14 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
15 *
16 */
17#ifdef CONFIG_TAS2562_REGMAP
18
19#define DEBUG
20#include <linux/module.h>
21#include <linux/moduleparam.h>
22#include <linux/err.h>
23#include <linux/init.h>
24#include <linux/delay.h>
25#include <linux/pm.h>
26#include <linux/i2c.h>
27#include <linux/gpio.h>
28#include <linux/regulator/consumer.h>
29#include <linux/firmware.h>
30#include <linux/regmap.h>
31#include <linux/of.h>
32#include <linux/of_gpio.h>
33#include <linux/slab.h>
34#include <sound/soc.h>
35#include <linux/interrupt.h>
36#include <linux/irq.h>
37
38#include "tas2562.h"
39#include "tas2562-codec.h"
40//Added/Modified 060356-PP
41#include "tas2562-misc.h"
42
43static int tas2562_change_book_page(struct tas2562_priv *pTAS2562,
44 int book, int page)
45{
46 int nResult = 0;
47
48 if ((pTAS2562->mnCurrentBook == book)
49 && (pTAS2562->mnCurrentPage == page))
50 goto end;
51
52 if (pTAS2562->mnCurrentBook != book) {
53 nResult = regmap_write(pTAS2562->regmap, TAS2562_BOOKCTL_PAGE, 0);
54 if (nResult < 0) {
55 dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
56 __func__, __LINE__, nResult);
57 goto end;
58 }
59 pTAS2562->mnCurrentPage = 0;
60 nResult = regmap_write(pTAS2562->regmap, TAS2562_BOOKCTL_REG, book);
61 if (nResult < 0) {
62 dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
63 __func__, __LINE__, nResult);
64 goto end;
65 }
66 pTAS2562->mnCurrentBook = book;
67 }
68
69 if (pTAS2562->mnCurrentPage != page) {
70 nResult = regmap_write(pTAS2562->regmap, TAS2562_BOOKCTL_PAGE, page);
71 if (nResult < 0) {
72 dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
73 __func__, __LINE__, nResult);
74 goto end;
75 }
76 pTAS2562->mnCurrentPage = page;
77 }
78
79end:
80 return nResult;
81}
82
83static int tas2562_dev_read(struct tas2562_priv *pTAS2562,
84 unsigned int reg, unsigned int *pValue)
85{
86 int nResult = 0;
87
88 mutex_lock(&pTAS2562->dev_lock);
89
90 nResult = tas2562_change_book_page(pTAS2562,
91 TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
92 if (nResult < 0)
93 goto end;
94
95 nResult = regmap_read(pTAS2562->regmap, TAS2562_PAGE_REG(reg), pValue);
96 if (nResult < 0)
97 dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
98 __func__, __LINE__, nResult);
99 else
100 dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u\n", __func__,
101 TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
102 TAS2562_PAGE_REG(reg));
103
104end:
105 mutex_unlock(&pTAS2562->dev_lock);
106 return nResult;
107}
108
109static int tas2562_dev_write(struct tas2562_priv *pTAS2562,
110 unsigned int reg, unsigned int value)
111{
112 int nResult = 0;
113
114 mutex_lock(&pTAS2562->dev_lock);
115
116 nResult = tas2562_change_book_page(pTAS2562,
117 TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
118 if (nResult < 0)
119 goto end;
120
121 nResult = regmap_write(pTAS2562->regmap, TAS2562_PAGE_REG(reg),
122 value);
123 if (nResult < 0)
124 dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
125 __func__, __LINE__, nResult);
126 else
127 dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u, VAL: 0x%02x\n",
128 __func__, TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
129 TAS2562_PAGE_REG(reg), value);
130
131end:
132 mutex_unlock(&pTAS2562->dev_lock);
133 return nResult;
134}
135
136static int tas2562_dev_bulk_write(struct tas2562_priv *pTAS2562,
137 unsigned int reg, unsigned char *pData, unsigned int nLength)
138{
139 int nResult = 0;
140
141 mutex_lock(&pTAS2562->dev_lock);
142
143 nResult = tas2562_change_book_page(pTAS2562,
144 TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
145 if (nResult < 0)
146 goto end;
147
148 nResult = regmap_bulk_write(pTAS2562->regmap,
149 TAS2562_PAGE_REG(reg), pData, nLength);
150 if (nResult < 0)
151 dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
152 __func__, __LINE__, nResult);
153 else
154 dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u, len: 0x%02x\n",
155 __func__, TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
156 TAS2562_PAGE_REG(reg), nLength);
157
158end:
159 mutex_unlock(&pTAS2562->dev_lock);
160 return nResult;
161}
162
163static int tas2562_dev_bulk_read(struct tas2562_priv *pTAS2562,
164 unsigned int reg, unsigned char *pData, unsigned int nLength)
165{
166 int nResult = 0;
167
168 mutex_lock(&pTAS2562->dev_lock);
169
170 nResult = tas2562_change_book_page(pTAS2562,
171 TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
172 if (nResult < 0)
173 goto end;
174
175 nResult = regmap_bulk_read(pTAS2562->regmap,
176 TAS2562_PAGE_REG(reg), pData, nLength);
177 if (nResult < 0)
178 dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
179 __func__, __LINE__, nResult);
180 else
181 dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u, len: 0x%02x\n",
182 __func__, TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
183 TAS2562_PAGE_REG(reg), nLength);
184end:
185 mutex_unlock(&pTAS2562->dev_lock);
186 return nResult;
187}
188
189static int tas2562_dev_update_bits(struct tas2562_priv *pTAS2562,
190 unsigned int reg, unsigned int mask, unsigned int value)
191{
192 int nResult = 0;
193
194 mutex_lock(&pTAS2562->dev_lock);
195 nResult = tas2562_change_book_page(pTAS2562,
196 TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg));
197 if (nResult < 0)
198 goto end;
199
200 nResult = regmap_update_bits(pTAS2562->regmap,
201 TAS2562_PAGE_REG(reg), mask, value);
202 if (nResult < 0)
203 dev_err(pTAS2562->dev, "%s, ERROR, L=%d, E=%d\n",
204 __func__, __LINE__, nResult);
205 else
206 dev_dbg(pTAS2562->dev, "%s: BOOK:PAGE:REG %u:%u:%u, mask: 0x%x, val=0x%x\n",
207 __func__, TAS2562_BOOK_ID(reg), TAS2562_PAGE_ID(reg),
208 TAS2562_PAGE_REG(reg), mask, value);
209end:
210 mutex_unlock(&pTAS2562->dev_lock);
211 return nResult;
212}
213
214static const struct reg_default tas2562_reg_defaults[] = {
215 { TAS2562_Page, 0x00 },
216 { TAS2562_SoftwareReset, 0x00 },
217 { TAS2562_PowerControl, 0x0e },
218 { TAS2562_PlaybackConfigurationReg0, 0x10 },
219 { TAS2562_PlaybackConfigurationReg1, 0x01 },
220 { TAS2562_PlaybackConfigurationReg2, 0x00 },
221 { TAS2562_MiscConfigurationReg0, 0x07 },
222 { TAS2562_TDMConfigurationReg1, 0x02 },
223 { TAS2562_TDMConfigurationReg2, 0x0a },
224 { TAS2562_TDMConfigurationReg3, 0x10 },
225 { TAS2562_InterruptMaskReg0, 0xfc },
226 { TAS2562_InterruptMaskReg1, 0xb1 },
227 { TAS2562_InterruptConfiguration, 0x05 },
228 { TAS2562_MiscIRQ, 0x81 },
229 { TAS2562_ClockConfiguration, 0x0c },
230
231};
232
233static bool tas2562_volatile(struct device *dev, unsigned int reg)
234{
235 switch (reg) {
236 case TAS2562_Page: /* regmap implementation requires this */
237 case TAS2562_SoftwareReset: /* always clears after write */
238 case TAS2562_BrownOutPreventionReg0:/* has a self clearing bit */
239 case TAS2562_LiveInterruptReg0:
240 case TAS2562_LiveInterruptReg1:
241 case TAS2562_LatchedInterruptReg0:/* Sticky interrupt flags */
242 case TAS2562_LatchedInterruptReg1:/* Sticky interrupt flags */
243 case TAS2562_VBATMSB:
244 case TAS2562_VBATLSB:
245 case TAS2562_TEMPMSB:
246 case TAS2562_TEMPLSB:
247 return true;
248 }
249 return false;
250}
251
252static bool tas2562_writeable(struct device *dev, unsigned int reg)
253{
254 switch (reg) {
255 case TAS2562_LiveInterruptReg0:
256 case TAS2562_LiveInterruptReg1:
257 case TAS2562_LatchedInterruptReg0:
258 case TAS2562_LatchedInterruptReg1:
259 case TAS2562_VBATMSB:
260 case TAS2562_VBATLSB:
261 case TAS2562_TEMPMSB:
262 case TAS2562_TEMPLSB:
263 case TAS2562_TDMClockdetectionmonitor:
264 case TAS2562_RevisionandPGID:
265 return false;
266 }
267 return true;
268}
269static const struct regmap_config tas2562_i2c_regmap = {
270 .reg_bits = 8,
271 .val_bits = 8,
272 .writeable_reg = tas2562_writeable,
273 .volatile_reg = tas2562_volatile,
274 .reg_defaults = tas2562_reg_defaults,
275 .num_reg_defaults = ARRAY_SIZE(tas2562_reg_defaults),
276 .cache_type = REGCACHE_RBTREE,
277 .max_register = 1 * 128,
278};
279
280
281static void tas2562_hw_reset(struct tas2562_priv *pTAS2562)
282{
283 if (gpio_is_valid(pTAS2562->mnResetGPIO)) {
284 gpio_direction_output(pTAS2562->mnResetGPIO, 0);
285 msleep(5);
286 gpio_direction_output(pTAS2562->mnResetGPIO, 1);
287 msleep(2);
288 }
289
290 pTAS2562->mnCurrentBook = -1;
291 pTAS2562->mnCurrentPage = -1;
292}
293
294void tas2562_enableIRQ(struct tas2562_priv *pTAS2562, bool enable)
295{
296 if (enable) {
297 if (pTAS2562->mbIRQEnable)
298 return;
299
300 if (gpio_is_valid(pTAS2562->mnIRQGPIO))
301 enable_irq(pTAS2562->mnIRQ);
302
303 schedule_delayed_work(&pTAS2562->irq_work, msecs_to_jiffies(10));
304 pTAS2562->mbIRQEnable = true;
305 } else {
306 if (!pTAS2562->mbIRQEnable)
307 return;
308
309 if (gpio_is_valid(pTAS2562->mnIRQGPIO))
310 disable_irq_nosync(pTAS2562->mnIRQ);
311 pTAS2562->mbIRQEnable = false;
312 }
313}
314
315static void irq_work_routine(struct work_struct *work)
316{
317 struct tas2562_priv *pTAS2562 =
318 container_of(work, struct tas2562_priv, irq_work.work);
319 unsigned int nDevInt1Status = 0, nDevInt2Status = 0;
320// int nCounter = 2;
321 int nResult = 0;
322
323#ifdef CONFIG_TAS2562_CODEC
324 mutex_lock(&pTAS2562->codec_lock);
325#endif
326
327#ifdef CONFIG_TAS2562_MISC
328 mutex_lock(&pTAS2562->file_lock);
329#endif
330 if (pTAS2562->mbRuntimeSuspend) {
331 dev_info(pTAS2562->dev, "%s, Runtime Suspended\n", __func__);
332 goto end;
333 }
334/*
335 if (!pTAS2562->mbPowerUp) {
336 dev_info(pTAS2562->dev, "%s, device not powered\n", __func__);
337 goto end;
338 }
339*/
340#if 1
341 nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptMaskReg0, 0x00);
342 if (nResult < 0)
343 goto reload;
344
345 nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptMaskReg1, 0x00);
346 if (nResult < 0)
347 goto reload;
348 nResult = tas2562_dev_read(pTAS2562, TAS2562_LiveInterruptReg0, &nDevInt1Status);
349 if (nResult >= 0)
350 nResult = tas2562_dev_read(pTAS2562, TAS2562_LiveInterruptReg1, &nDevInt2Status);
351 else
352 goto reload;
353
354 if (((nDevInt1Status & 0xff) != 0) || ((nDevInt2Status & 0x8f) != 0)) {
355 /*in case of INT_OC, INT_UV, INT_OT, INT_BO, INT_CL, INT_CLK1, INT_CLK2*/
356 dev_dbg(pTAS2562->dev, "IRQ critical Error : 0x%x, 0x%x\n",
357 nDevInt1Status, nDevInt2Status);
358
359 if (nDevInt1Status & 0x02) {
360 pTAS2562->mnErrCode |= ERROR_OVER_CURRENT;
361 dev_err(pTAS2562->dev, "SPK over current!\n");
362 } else
363 pTAS2562->mnErrCode &= ~ERROR_OVER_CURRENT;
364
365 if (nDevInt1Status & 0x10) {
366 pTAS2562->mnErrCode |= ERROR_UNDER_VOLTAGE;
367 dev_err(pTAS2562->dev, "VBAT below limiter inflection point!\n");
368 } else
369 pTAS2562->mnErrCode &= ~ERROR_UNDER_VOLTAGE;
370
371 if (nDevInt1Status & 0x04) {
372 pTAS2562->mnErrCode |= ERROR_CLK_HALT;
373 dev_err(pTAS2562->dev, "TDM clock error!\n");
374 } else
375 pTAS2562->mnErrCode &= ~ERROR_CLK_HALT;
376
377 if (nDevInt1Status & 0x01) {
378 pTAS2562->mnErrCode |= ERROR_DIE_OVERTEMP;
379 dev_err(pTAS2562->dev, "die over temperature!\n");
380 } else
381 pTAS2562->mnErrCode &= ~ERROR_DIE_OVERTEMP;
382
383 if (nDevInt1Status & 0x80) {
384 pTAS2562->mnErrCode |= ERROR_BROWNOUT;
385 dev_err(pTAS2562->dev, "limiter mute!\n");
386 } else
387 pTAS2562->mnErrCode &= ~ERROR_BROWNOUT;
388
389 if (nDevInt1Status & 0x40) {
390 pTAS2562->mnErrCode |= ERROR_BROWNOUT;
391 dev_err(pTAS2562->dev, "limiter infinite hold!\n");
392 } else
393 pTAS2562->mnErrCode &= ~ERROR_BROWNOUT;
394 if (nDevInt1Status & 0x20) {
395 pTAS2562->mnErrCode |= ERROR_BROWNOUT;
396 dev_err(pTAS2562->dev, "limiter max attenuation!\n");
397 } else
398 pTAS2562->mnErrCode &= ~ERROR_BROWNOUT;
399 if (nDevInt1Status & 0x04) {
400 pTAS2562->mnErrCode |= ERROR_BROWNOUT;
401 dev_err(pTAS2562->dev, "limiter active!\n");
402 } else
403 pTAS2562->mnErrCode &= ~ERROR_BROWNOUT;
404 if (nDevInt2Status & 0x80) {
405 pTAS2562->mnErrCode |= ERROR_CLK_DET1;
406 dev_err(pTAS2562->dev, "PDM audio data invalid!\n");
407 } else
408 pTAS2562->mnErrCode &= ~ERROR_CLK_DET1;
409
410 if (nDevInt2Status & 0x08) {
411 pTAS2562->mnErrCode |= ERROR_CLK_DET2;
412 dev_err(pTAS2562->dev, "VBAT OVLO flag!\n");
413 } else
414 pTAS2562->mnErrCode &= ~ERROR_CLK_DET2;
415
416 if (nDevInt2Status & 0x04) {
417 pTAS2562->mnErrCode |= ERROR_CLK_DET2;
418 dev_err(pTAS2562->dev, "VBAT UVLO flag!\n");
419 } else
420 pTAS2562->mnErrCode &= ~ERROR_CLK_DET2;
421
422 if (nDevInt2Status & 0x02) {
423 pTAS2562->mnErrCode |= ERROR_CLK_DET2;
424 dev_err(pTAS2562->dev, "VBAT brown out flag!\n");
425 } else
426 pTAS2562->mnErrCode &= ~ERROR_CLK_DET2;
427
428 if (nDevInt2Status & 0x01) {
429 pTAS2562->mnErrCode |= ERROR_CLK_DET2;
430 dev_err(pTAS2562->dev, "PDM clock error!\n");
431 } else
432 pTAS2562->mnErrCode &= ~ERROR_CLK_DET2;
433 goto reload;
434 } else {
435#if 0
436 dev_dbg(pTAS2562->dev, "IRQ status : 0x%x, 0x%x\n",
437 nDevInt1Status, nDevInt2Status);
438 nCounter = 2;
439
440 while (nCounter > 0) {
441 nResult = tas2562_dev_read(pTAS2562,
442 TAS2562_POWER_UP_FLAG_REG, &nDevInt1Status);
443 if (nResult < 0)
444 goto reload;
445
446 if ((nDevInt1Status & 0xc0) == 0xc0)
447 break;
448
449 nCounter--;
450 if (nCounter > 0) {
451 /* in case check pow status just after power on TAS2562 */
452 dev_dbg(pTAS2562->dev, "PowSts B: 0x%x, check again after 10ms\n",
453 nDevInt1Status);
454 msleep(20);
455 }
456 }
457
458 if ((nDevInt1Status & 0xc0) != 0xc0) {
459 dev_err(pTAS2562->dev, "%s, Critical ERROR B[%d]_P[%d]_R[%d]= 0x%x\n",
460 __func__,
461 TAS2562_BOOK_ID(TAS2562_POWER_UP_FLAG_REG),
462 TAS2562_PAGE_ID(TAS2562_POWER_UP_FLAG_REG),
463 TAS2562_PAGE_REG(TAS2562_POWER_UP_FLAG_REG),
464 nDevInt1Status);
465 pTAS2562->mnErrCode |= ERROR_CLASSD_PWR;
466 goto reload;
467 }
468 pTAS2562->mnErrCode &= ~ERROR_CLASSD_PWR;
469#endif
470 }
471
472 nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptMaskReg0, 0xff);
473 if (nResult < 0)
474 goto reload;
475
476 nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptMaskReg1, 0xff);
477 if (nResult < 0)
478 goto reload;
479
480 goto end;
481
482reload:
483 /* hardware reset and reload */
484 //tas2562_LoadConfig(pTAS2562, true);
485#endif
486
487end:
488/*
489 if (!hrtimer_active(&pTAS2562->mtimer)) {
490 dev_dbg(pTAS2562->dev, "%s, start timer\n", __func__);
491 hrtimer_start(&pTAS2562->mtimer,
492 ns_to_ktime((u64)CHECK_PERIOD * NSEC_PER_MSEC),
493 HRTIMER_MODE_REL);
494 }
495*/
496
497#ifdef CONFIG_TAS2562_MISC
498 mutex_unlock(&pTAS2562->file_lock);
499#endif
500
501#ifdef CONFIG_TAS2562_CODEC
502 mutex_unlock(&pTAS2562->codec_lock);
503#endif
504}
505
506static enum hrtimer_restart timer_func(struct hrtimer *timer)
507{
508 struct tas2562_priv *pTAS2562 = container_of(timer,
509 struct tas2562_priv, mtimer);
510
511 if (pTAS2562->mbPowerUp) {
512 if (!delayed_work_pending(&pTAS2562->irq_work))
513 schedule_delayed_work(&pTAS2562->irq_work,
514 msecs_to_jiffies(20));
515 }
516
517 return HRTIMER_NORESTART;
518}
519static inline void irqd_set(struct irq_data *d, unsigned int mask)
520{
521 //Debug Addded/Modified 060356-PP
522 //__irqd_to_state(d) |= mask;
523}
524
525static void irq_state_set_masked(struct irq_desc *desc)
526{
527 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
528}
529
530static void irq_state_set_disabled(struct irq_desc *desc)
531{
532 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
533}
534
535static void irq_shutdown(struct irq_desc *desc)
536{
537 irq_state_set_disabled(desc);
538 desc->depth = 1;
539 if (desc->irq_data.chip->irq_shutdown)
540 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
541 else if (desc->irq_data.chip->irq_disable)
542 desc->irq_data.chip->irq_disable(&desc->irq_data);
543 else
544 desc->irq_data.chip->irq_mask(&desc->irq_data);
545 irq_domain_deactivate_irq(&desc->irq_data);
546 irq_state_set_masked(desc);
547}
548
549static irqreturn_t tas2562_irq_handler(int irq, void *dev_id)
550{
551 struct tas2562_priv *pTAS2562 = (struct tas2562_priv *)dev_id;
552 struct irq_desc *desc = irq_to_desc(irq);
553
554#if 1
555 /* get IRQ status after 100 ms */
556 if (!delayed_work_pending(&pTAS2562->irq_work))
557 schedule_delayed_work(&pTAS2562->irq_work,
558 msecs_to_jiffies(100));
559#endif
560 /* avoid interrupt storm, mask corresponding gic interrupt controller bit*/
561 irq_shutdown(desc);
562 return IRQ_HANDLED;
563}
564
565static int tas2562_runtime_suspend(struct tas2562_priv *pTAS2562)
566{
567 dev_dbg(pTAS2562->dev, "%s\n", __func__);
568
569 pTAS2562->mbRuntimeSuspend = true;
570
571 if (hrtimer_active(&pTAS2562->mtimer)) {
572 dev_dbg(pTAS2562->dev, "cancel die temp timer\n");
573 hrtimer_cancel(&pTAS2562->mtimer);
574 }
575
576 if (delayed_work_pending(&pTAS2562->irq_work)) {
577 dev_dbg(pTAS2562->dev, "cancel IRQ work\n");
578 cancel_delayed_work_sync(&pTAS2562->irq_work);
579 }
580
581 return 0;
582}
583
584static int tas2562_runtime_resume(struct tas2562_priv *pTAS2562)
585{
586 dev_dbg(pTAS2562->dev, "%s\n", __func__);
587
588 if (pTAS2562->mbPowerUp) {
589/* if (!hrtimer_active(&pTAS2562->mtimer)) {
590 dev_dbg(pTAS2562->dev, "%s, start check timer\n", __func__);
591 hrtimer_start(&pTAS2562->mtimer,
592 ns_to_ktime((u64)CHECK_PERIOD * NSEC_PER_MSEC),
593 HRTIMER_MODE_REL);
594 }
595*/
596 }
597
598 pTAS2562->mbRuntimeSuspend = false;
599
600 return 0;
601}
602
603static int tas2562_parse_dt(struct device *dev, struct tas2562_priv *pTAS2562)
604{
605 struct device_node *np = dev->of_node;
606 int rc = 0, ret = 0;
607
608 u32 debounceInfo[2] = { 0, 0 };
609 rc = of_property_read_u32(np, "ti,asi-format", &pTAS2562->mnASIFormat);
610 if (rc) {
611 dev_err(pTAS2562->dev, "Looking up %s property in node %s failed %d\n",
612 "ti,asi-format", np->full_name, rc);
613 } else {
614 dev_dbg(pTAS2562->dev, "ti,asi-format=%d",
615 pTAS2562->mnASIFormat);
616 }
617
618 pTAS2562->mnResetGPIO = of_get_named_gpio(np, "ti,reset-gpio", 0);
619 if (!gpio_is_valid(pTAS2562->mnResetGPIO)) {
620 dev_err(pTAS2562->dev, "Looking up %s property in node %s failed %d\n",
621 "ti,reset-gpio", np->full_name, pTAS2562->mnResetGPIO);
622 } else {
623 dev_dbg(pTAS2562->dev, "ti,reset-gpio=%d",
624 pTAS2562->mnResetGPIO);
625 }
626
627 of_property_read_u32_array(np, "debounce",
628 debounceInfo, ARRAY_SIZE(debounceInfo));
629 gpio_set_debounce(37, debounceInfo[1]);
630 pTAS2562->mnIRQGPIO = of_get_named_gpio(np, "ti,irq-gpio", 0);
631 if (!gpio_is_valid(pTAS2562->mnIRQGPIO)) {
632 dev_err(pTAS2562->dev, "Looking up %s property in node %s failed %d\n",
633 "ti,irq-gpio", np->full_name, pTAS2562->mnIRQGPIO);
634 } else {
635 dev_dbg(pTAS2562->dev, "ti,irq-gpio=%d", pTAS2562->mnIRQGPIO);
636 }
637
638 return ret;
639}
640
641static int tas2562_i2c_probe(struct i2c_client *client,
642 const struct i2c_device_id *id)
643{
644 struct tas2562_priv *pTAS2562;
645 int nResult;
646
647 //struct pinctrl *pinctrl;
648 //struct pinctrl_state *pin_state;
649 dev_info(&client->dev, "%s enter\n", __func__);
650
651 pTAS2562 = devm_kzalloc(&client->dev,
652 sizeof(struct tas2562_priv), GFP_KERNEL);
653 if (pTAS2562 == NULL) {
654 nResult = -ENOMEM;
655 goto end;
656 }
657
658 pTAS2562->dev = &client->dev;
659 i2c_set_clientdata(client, pTAS2562);
660 dev_set_drvdata(&client->dev, pTAS2562);
661
662 pTAS2562->regmap = devm_regmap_init_i2c(client, &tas2562_i2c_regmap);
663 if (IS_ERR(pTAS2562->regmap)) {
664 nResult = PTR_ERR(pTAS2562->regmap);
665 dev_err(&client->dev, "Failed to allocate register map: %d\n",
666 nResult);
667 goto end;
668 }
669#if 0
670pinctrl = devm_pinctrl_get(&client->dev);
671if (IS_ERR(pinctrl)) {
672 dev_err(&client->dev,
673 "Unable to acquire pinctrl: Error = %lu",
674 (unsigned long)pinctrl);
675} else {
676 /* Configure GPIO interrupt pin */
677 pin_state = pinctrl_lookup_state(pinctrl, "ti_int");
678 pinctrl_select_state(pinctrl, pin_state);
679}
680#endif
681/* TODO */
682 if (client->dev.of_node)
683 tas2562_parse_dt(&client->dev, pTAS2562);
684
685 if (gpio_is_valid(pTAS2562->mnResetGPIO)) {
686 nResult = gpio_request(pTAS2562->mnResetGPIO, "TAS2562_RESET");
687 if (nResult) {
688 dev_err(pTAS2562->dev, "%s: Failed to request gpio %d\n",
689 __func__, pTAS2562->mnResetGPIO);
690 nResult = -EINVAL;
691 goto free_gpio;
692 }
693 }
694#if 0
695 if (gpio_is_valid(pTAS2562->mnIRQGPIO)) {
696 nResult = gpio_request(pTAS2562->mnIRQGPIO, "TAS2562-IRQ");
697 if (nResult < 0) {
698 dev_err(pTAS2562->dev, "%s: GPIO %d request error\n",
699 __func__, pTAS2562->mnIRQGPIO);
700 goto free_gpio;
701 }
702 gpio_direction_input(pTAS2562->mnIRQGPIO);
703#endif
704if (gpio_is_valid(pTAS2562->mnIRQGPIO)) {
705 nResult = devm_gpio_request_one(&client->dev, pTAS2562->mnIRQGPIO,
706 GPIOF_DIR_IN, "TAS2562_INT");
707
708 if (nResult < 0) {
709 dev_err(pTAS2562->dev, "%s: GPIO %d request error\n",
710 __func__, pTAS2562->mnIRQGPIO);
711 goto free_gpio;
712 }
713
714 pTAS2562->mnIRQ = gpio_to_irq(pTAS2562->mnIRQGPIO);
715 dev_dbg(pTAS2562->dev, "irq = %d\n", pTAS2562->mnIRQ);
716 nResult =devm_request_threaded_irq(&client->dev, pTAS2562->mnIRQ,
717 NULL, tas2562_irq_handler, IRQF_TRIGGER_FALLING|IRQF_ONESHOT,
718 client->name, pTAS2562);
719 if (nResult < 0) {
720 dev_err(pTAS2562->dev,
721 "request_irq failed, %d\n", nResult);
722 goto free_gpio;
723 }
724 //disable_irq_nosync(pTAS2562->mnIRQ);
725 enable_irq(pTAS2562->mnIRQ);
726 INIT_DELAYED_WORK(&pTAS2562->irq_work, irq_work_routine);
727 }
728
729 pTAS2562->read = tas2562_dev_read;
730 pTAS2562->write = tas2562_dev_write;
731 pTAS2562->bulk_read = tas2562_dev_bulk_read;
732 pTAS2562->bulk_write = tas2562_dev_bulk_write;
733 pTAS2562->update_bits = tas2562_dev_update_bits;
734 pTAS2562->hw_reset = tas2562_hw_reset;
735 pTAS2562->enableIRQ = tas2562_enableIRQ;
736 //pTAS2562->clearIRQ = tas2562_clearIRQ;
737 pTAS2562->runtime_suspend = tas2562_runtime_suspend;
738 pTAS2562->runtime_resume = tas2562_runtime_resume;
739 mutex_init(&pTAS2562->dev_lock);
740 if (nResult < 0)
741 goto destroy_mutex;
742
743 nResult = tas2562_dev_write(pTAS2562, TAS2562_InterruptConfiguration, 0x00);
744 if (nResult < 0)
745 pr_err("Write TAS2562_InterruptConfiguration failed\n");
746#ifdef CONFIG_TAS2562_CODEC
747 mutex_init(&pTAS2562->codec_lock);
748 tas2562_register_codec(pTAS2562);
749#endif
750
751#ifdef CONFIG_TAS2562_MISC
752 mutex_init(&pTAS2562->file_lock);
753 tas2562_register_misc(pTAS2562);
754#endif
755
756 hrtimer_init(&pTAS2562->mtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
757 pTAS2562->mtimer.function = timer_func;
758
759destroy_mutex:
760 if (nResult < 0)
761 mutex_destroy(&pTAS2562->dev_lock);
762
763free_gpio:
764 if (nResult < 0) {
765 if (gpio_is_valid(pTAS2562->mnResetGPIO))
766 gpio_free(pTAS2562->mnResetGPIO);
767 if (gpio_is_valid(pTAS2562->mnIRQGPIO))
768 gpio_free(pTAS2562->mnIRQGPIO);
769 }
770
771end:
772 return nResult;
773}
774
775static int tas2562_i2c_remove(struct i2c_client *client)
776{
777 struct tas2562_priv *pTAS2562 = i2c_get_clientdata(client);
778
779 dev_info(pTAS2562->dev, "%s\n", __func__);
780
781#ifdef CONFIG_TAS2562_CODEC
782 tas2562_deregister_codec(pTAS2562);
783 mutex_destroy(&pTAS2562->codec_lock);
784#endif
785
786#ifdef CONFIG_TAS2562_MISC
787 tas2562_deregister_misc(pTAS2562);
788 mutex_destroy(&pTAS2562->file_lock);
789#endif
790
791 if (gpio_is_valid(pTAS2562->mnResetGPIO))
792 gpio_free(pTAS2562->mnResetGPIO);
793 if (gpio_is_valid(pTAS2562->mnIRQGPIO))
794 gpio_free(pTAS2562->mnIRQGPIO);
795
796 return 0;
797}
798
799
800static const struct i2c_device_id tas2562_i2c_id[] = {
801 { "tas2562", 0},
802 { }
803};
804MODULE_DEVICE_TABLE(i2c, tas2562_i2c_id);
805
806#if defined(CONFIG_OF)
807static const struct of_device_id tas2562_of_match[] = {
808 { .compatible = "ti,tas2562" },
809 {},
810};
811MODULE_DEVICE_TABLE(of, tas2562_of_match);
812#endif
813
814
815static struct i2c_driver tas2562_i2c_driver = {
816 .driver = {
817 .name = "tas2562",
818 .owner = THIS_MODULE,
819#if defined(CONFIG_OF)
820 .of_match_table = of_match_ptr(tas2562_of_match),
821#endif
822 },
823 .probe = tas2562_i2c_probe,
824 .remove = tas2562_i2c_remove,
825 .id_table = tas2562_i2c_id,
826};
827
828module_i2c_driver(tas2562_i2c_driver);
829
830MODULE_AUTHOR("Texas Instruments Inc.");
831MODULE_DESCRIPTION("TAS2562 I2C Smart Amplifier driver");
832MODULE_LICENSE("GPL v2");
833#endif
diff --git a/tas2562.h b/tas2562.h
new file mode 100644
index 0000000..3fd1825
--- /dev/null
+++ b/tas2562.h
@@ -0,0 +1,770 @@
1
2#ifndef __TAS2562_
3#define __TAS2562_
4
5
6/* Book Control Register (available in page0 of each book) */
7#define TAS2562_BOOKCTL_PAGE 0
8#define TAS2562_BOOKCTL_REG 127
9
10#define TAS2562_REG(page, reg) ((page * 128) + reg)
11
12 /* Page */
13#define TAS2562_Page TAS2562_REG(0X0, 0x00)
14#define TAS2562_Page_Page_Mask (0xff << 0)
15
16
17#define TAS2562_BOOK_ID(reg) (reg / (256 * 128))
18
19#define TAS2562_PAGE_ID(reg) ((reg % (256 * 128)) / 128)
20
21#define TAS2562_BOOK_REG(reg) (reg % (256 * 128))
22
23#define TAS2562_PAGE_REG(reg) ((reg % (256 * 128)) % 128)
24
25
26 /* Software Reset */
27#define TAS2562_SoftwareReset TAS2562_REG(0X0, 0x01)
28#define TAS2562_SoftwareReset_SoftwareReset_Mask (0x1 << 0),
29#define TAS2562_SoftwareReset_SoftwareReset_DontReset (0x0 << 0)
30#define TAS2562_SoftwareReset_SoftwareReset_Reset (0x1 << 0)
31
32 /* Power Control */
33#define TAS2562_PowerControl TAS2562_REG(0X0, 0x02)
34#define TAS2562_PowerControl_ISNSPower_Mask (0x1 << 3)
35#define TAS2562_PowerControl_ISNSPower_Active (0x0 << 3)
36#define TAS2562_PowerControl_ISNSPower_PoweredDown (0x1 << 3)
37#define TAS2562_PowerControl_VSNSPower_Mask (0x1 << 2)
38#define TAS2562_PowerControl_VSNSPower_Active (0x0 << 2)
39#define TAS2562_PowerControl_VSNSPower_PoweredDown (0x1 << 2)
40#define TAS2562_PowerControl_OperationalMode10_Mask (0x3 << 0)
41#define TAS2562_PowerControl_OperationalMode10_Active (0x0 << 0)
42#define TAS2562_PowerControl_OperationalMode10_Mute (0x1 << 0)
43#define TAS2562_PowerControl_OperationalMode10_Shutdown (0x2 << 0)
44
45 /* data format */
46#define TAS2562_DATAFORMAT_SHIFT 2
47#define TAS2562_DATAFORMAT_I2S 0x0
48#define TAS2562_DATAFORMAT_DSP 0x1
49#define TAS2562_DATAFORMAT_RIGHT_J 0x2
50#define TAS2562_DATAFORMAT_LEFT_J 0x3
51
52#define TAS2562_DAI_FMT_MASK (0x7 << TAS2562_DATAFORMAT_SHIFT)
53
54 /* Playback Configuration Reg0 */
55#define TAS2562_PlaybackConfigurationReg0 TAS2562_REG(0X0, 0x03)
56#define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Mask (0x1 << 7)
57#define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Pdm0 (0x0 << 7)
58#define TAS2562_PlaybackConfigurationReg0_PDMPinMapping_Pdm1 (0x1 << 7)
59#define TAS2562_PlaybackConfigurationReg0_PlaybackPDMSource_Mask (0x1 << 6)
60#define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Mask (0x1 << 5)
61#define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Pcm (0x0 << 5)
62#define TAS2562_PlaybackConfigurationReg0_PlaybackSource_Pdm (0x1 << 5)
63#define TAS2562_PlaybackConfigurationReg0_AmplifierLevel40_Mask (0x1f << 0)
64
65 /* Playback Configuration Reg1 */
66#define TAS2562_PlaybackConfigurationReg1 TAS2562_REG(0X0, 0x04)
67#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_Mask (0x7 << 0)
68#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_2 (0x1 << 0)
69#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_50 (0x2 << 0)
70#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_100 (0x3 << 0)
71#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_200 (0x4 << 0)
72#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_400 (0x5 << 0)
73#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_800 (0x6 << 0)
74#define TAS2562_PlaybackConfigurationReg1_HPFFrequency20_Bypass (0x0 << 0)
75
76 /* Playback Configuration Reg2 */
77#define TAS2562_PlaybackConfigurationReg2 TAS2562_REG(0X0, 0x05)
78#define TAS2562_PlaybackConfigurationReg2_DVCPCM70_Mask (0xff << 0)
79
80 /* Playback Configuration Reg3 */
81#define TAS2562_PlaybackConfigurationReg3 TAS2562_REG(0X0, 0x06)
82#define TAS2562_PlaybackConfigurationReg3_DVCPDM70_Mask (0xff << 0)
83
84 /* Misc Configuration Reg0 */
85#define TAS2562_MiscConfigurationReg0 TAS2562_REG(0X0, 0x04)
86#define TAS2562_MiscConfigurationReg0_DVCRampRate76_Mask (0x3 << 6)
87#define TAS2562_MiscConfigurationReg0_DVCRampRate76_0_5dbPer1Sample (0x0 << 6)
88#define TAS2562_MiscConfigurationReg0_DVCRampRate76_0_5dbPer4Sample (0x1 << 6)
89#define TAS2562_MiscConfigurationReg0_DVCRampRate76_0_5dbPer8Sample (0x2 << 6)
90#define TAS2562_MiscConfigurationReg0_DVCRampRate76_VolRampDisabled (0x3 << 6)
91#define TAS2562_MiscConfigurationReg0_OCERetry_Mask (0x1 << 5)
92#define TAS2562_MiscConfigurationReg0_OCERetry_DoNotRetry (0x0 << 5)
93#define TAS2562_MiscConfigurationReg0_OCERetry_Retry (0x1 << 5)
94#define TAS2562_MiscConfigurationReg0_OTERetry_Mask (0x1 << 4)
95#define TAS2562_MiscConfigurationReg0_OTERetry_DoNotRetry (0x0 << 4)
96#define TAS2562_MiscConfigurationReg0_OTERetry_Retry (0x1 << 4)
97#define TAS2562_MiscConfigurationReg0_IRQZPull_Mask (0x1 << 3)
98#define TAS2562_MiscConfigurationReg0_IRQZPull_Disabled (0x0 << 3)
99#define TAS2562_MiscConfigurationReg0_IRQZPull_Enabled (0x1 << 3)
100#define TAS2562_MiscConfigurationReg0_AMPSS_Mask (0x1 << 2)
101#define TAS2562_MiscConfigurationReg0_AMPSS_Disabled (0x0 << 2)
102#define TAS2562_MiscConfigurationReg0_AMPSS_Enabled (0x1 << 2)
103
104 /* PDM Input Reg0 */
105#define TAS2562_PDMInputReg0 TAS2562_REG(0X0, 0x08)
106#define TAS2562_PDMInputReg0_ClassDSYNC_Mask (0x1 << 6)
107#define TAS2562_PDMInputReg0_ClassDSYNC_AsyncMode (0x0 << 6)
108#define TAS2562_PDMInputReg0_ClassDSYNC_Retry (0x1 << 6),
109#define TAS2562_PDMInputReg0_PDMRATESW54_Mask (0x3 << 4)
110#define TAS2562_PDMInputReg0_PDMRATED132_Mask (0x3 << 2)
111#define TAS2562_PDMInputReg0_PDMRATED132_2_543_38MHz (0x0 << 2)
112#define TAS2562_PDMInputReg0_PDMRATED132_5_086_76MHz (0x1 << 2)
113#define TAS2562_PDMInputReg0_PDMRATED010_Mask (0x3 << 0)
114#define TAS2562_PDMInputReg0_PDMRATED010_2_543_38MHz (0x0 << 0)
115#define TAS2562_PDMInputReg0_PDMRATED010_5_086_76MHz (0x1 << 0)
116
117 /* PDM Configuration Reg1 */
118#define TAS2562_PDMConfigurationReg1 TAS2562_REG(0X0, 0x09)
119#define TAS2562_PDMConfigurationReg1_PDMEDGED1_Mask (0x1 << 7)
120#define TAS2562_PDMConfigurationReg1_PDMEDGED1_Rising (0x0 << 7)
121#define TAS2562_PDMConfigurationReg1_PDMEDGED1_Falling (0x1 << 7)
122#define TAS2562_PDMConfigurationReg1_PDMEDGED0_Mask (0x1 << 6)
123#define TAS2562_PDMConfigurationReg1_PDMEDGED0_Rising (0x0 << 6)
124#define TAS2562_PDMConfigurationReg1_PDMEDGED0_Falling (0x1 << 6)
125#define TAS2562_PDMConfigurationReg1_PDMSLVD1_Mask (0x1 << 5)
126#define TAS2562_PDMConfigurationReg1_PDMSLVD1_Slave (0x0 << 5)
127#define TAS2562_PDMConfigurationReg1_PDMSLVD1_Master (0x1 << 5)
128#define TAS2562_PDMConfigurationReg1_PDMSLVD0_Mask (0x1 << 4)
129#define TAS2562_PDMConfigurationReg1_PDMSLVD0_Slave (0x0 << 4)
130#define TAS2562_PDMConfigurationReg1_PDMSLVD0_Master (0x1 << 4)
131#define TAS2562_PDMConfigurationReg1_PDMCLKD1_Mask (0x1 << 3)
132#define TAS2562_PDMConfigurationReg1_PDMCLKD1_Pdmck0 (0x0 << 3)
133#define TAS2562_PDMConfigurationReg1_PDMCLKD1_Pdmck1 (0x1 << 3)
134#define TAS2562_PDMConfigurationReg1_PDMCLKD0_Mask (0x1 << 2)
135#define TAS2562_PDMConfigurationReg1_PDMCLKD0_Pdmck0 (0x0 << 2)
136#define TAS2562_PDMConfigurationReg1_PDMCLKD0_Pdmck1 (0x1 << 2)
137#define TAS2562_PDMConfigurationReg1_PDMGATED1_Mask (0x1 << 1)
138#define TAS2562_PDMConfigurationReg1_PDMGATED1_GatedOff (0x0 << 1)
139#define TAS2562_PDMConfigurationReg1_PDMGATED1_Active (0x1 << 1)
140#define TAS2562_PDMConfigurationReg1_PDMGATED0_Mask (0x1 << 0)
141#define TAS2562_PDMConfigurationReg1_PDMGATED0_GatedOff (0x0 << 0)
142#define TAS2562_PDMConfigurationReg1_PDMGATED0_Active (0x1 << 0)
143
144 /* TDM Configuration Reg0 */
145#define TAS2562_TDMConfigurationReg0 TAS2562_REG(0X0, 0x06)
146#define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_Mask (0x1 << 5)
147#define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_48KHz (0x0 << 5)
148#define TAS2562_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz (0x1 << 5)
149#define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Mask (0x1 << 4)
150#define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Disabled (0x1 << 4)
151#define TAS2562_TDMConfigurationReg0_DETECTSAMPRATE_Enabled (0x0 << 4)
152#define TAS2562_TDMConfigurationReg0_SAMPRATE31_Mask (0x7 << 1)
153#define TAS2562_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz (0x4 << 1)
154#define TAS2562_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz (0x5 << 1)
155#define TAS2562_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz (0x6 << 1)
156#define TAS2562_TDMConfigurationReg0_FRAMESTART_Mask (0x1 << 0)
157#define TAS2562_TDMConfigurationReg0_FRAMESTART_LowToHigh (0x0 << 0)
158#define TAS2562_TDMConfigurationReg0_FRAMESTART_HighToLow (0x1 << 0)
159
160 /* TDM Configuration Reg1 */
161#define TAS2562_TDMConfigurationReg1 TAS2562_REG(0X0, 0x07)
162#define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Mask (0x1 << 6)
163#define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Left (0x0 << 6)
164#define TAS2562_TDMConfigurationReg1_RXJUSTIFY_Right (0x1 << 6)
165#define TAS2562_TDMConfigurationReg1_RXOFFSET51_Mask (0x1f << 1)
166#define TAS2562_TDMConfigurationReg1_RXOFFSET51_Shift (1)
167#define TAS2562_TDMConfigurationReg1_RXEDGE_Mask (0x1 << 0)
168#define TAS2562_TDMConfigurationReg1_RXEDGE_Rising (0x0 << 0)
169#define TAS2562_TDMConfigurationReg1_RXEDGE_Falling (0x1 << 0)
170
171 /* TDM Configuration Reg2 */
172#define TAS2562_TDMConfigurationReg2 TAS2562_REG(0X0, 0x08)
173#define TAS2562_TDMConfigurationReg2_RXSCFG54_Mask (0x3 << 4)
174#define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_I2C (0x0 << 4),
175#define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_Left (0x1 << 4),
176#define TAS2562_TDMConfigurationReg2_RXSCFG54_Mono_Right (0x2 << 4)
177#define TAS2562_TDMConfigurationReg2_RXSCFG54_Stereo_DownMix (0x3 << 4)
178#define TAS2562_TDMConfigurationReg2_RXWLEN32_Mask (0x3 << 2)
179#define TAS2562_TDMConfigurationReg2_RXWLEN32_16Bits (0x0 << 2)
180#define TAS2562_TDMConfigurationReg2_RXWLEN32_20Bits (0x1 << 2)
181#define TAS2562_TDMConfigurationReg2_RXWLEN32_24Bits (0x2 << 2)
182#define TAS2562_TDMConfigurationReg2_RXWLEN32_32Bits (0x3 << 2)
183#define TAS2562_TDMConfigurationReg2_RXSLEN10_Mask (0x3 << 0)
184#define TAS2562_TDMConfigurationReg2_RXSLEN10_16Bits (0x0 << 0)
185#define TAS2562_TDMConfigurationReg2_RXSLEN10_24Bits (0x1 << 0)
186#define TAS2562_TDMConfigurationReg2_RXSLEN10_32Bits (0x2 << 0)
187
188 /* TDM Configuration Reg3 */
189#define TAS2562_TDMConfigurationReg3 TAS2562_REG(0X0, 0x09)
190#define TAS2562_TDMConfigurationReg3_RXSLOTRight74_Mask (0xf << 4)
191#define TAS2562_TDMConfigurationReg3_RXSLOTLeft30_Mask (0xf << 0)
192
193 /* TDM Configuration Reg4 */
194#define TAS2562_TDMConfigurationReg4 TAS2562_REG(0X0, 0x0A)
195#define TAS2562_TDMConfigurationReg4_TXKEEPER_Mask (0x1 << 5)
196#define TAS2562_TDMConfigurationReg4_TXKEEPER_Disable (0x0 << 5)
197#define TAS2562_TDMConfigurationReg4_TXKEEPER_Enable (0x1 << 5)
198#define TAS2562_TDMConfigurationReg4_TXFILL_Mask (0x1 << 4)
199#define TAS2562_TDMConfigurationReg4_TXFILL_Transmit0 (0x0 << 4)
200#define TAS2562_TDMConfigurationReg4_TXFILL_TransmitHiz (0x1 << 4)
201#define TAS2562_TDMConfigurationReg4_TXOFFSET31_Mask (0x7 << 1)
202#define TAS2562_TDMConfigurationReg4_TXEDGE_Mask (0x1 << 0)
203#define TAS2562_TDMConfigurationReg4_TXEDGE_Rising (0x0 << 0)
204#define TAS2562_TDMConfigurationReg4_TXEDGE_Falling (0x1 << 0)
205
206 /* TDM Configuration Reg5 */
207#define TAS2562_TDMConfigurationReg5 TAS2562_REG(0X0, 0x0B)
208#define TAS2562_TDMConfigurationReg5_VSNSTX_Mask (0x1 << 6)
209#define TAS2562_TDMConfigurationReg5_VSNSTX_Disable (0x0 << 6),
210#define TAS2562_TDMConfigurationReg5_VSNSTX_Enable (0x1 << 6),
211#define TAS2562_TDMConfigurationReg5_VSNSSLOT50_Mask (0x3f << 0)
212
213 /* TDM Configuration Reg6 */
214#define TAS2562_TDMConfigurationReg6 TAS2562_REG(0X0, 0x0C)
215#define TAS2562_TDMConfigurationReg6_ISNSTX_Mask (0x1 << 6)
216#define TAS2562_TDMConfigurationReg6_ISNSTX_Disable (0x0 << 6),
217#define TAS2562_TDMConfigurationReg6_ISNSTX_Enable (0x1 << 6),
218#define TAS2562_TDMConfigurationReg6_ISNSSLOT50_Mask (0x3f << 0)
219
220 /* TDM Configuration Reg7 */
221#define TAS2562_TDMConfigurationReg7 TAS2562_REG(0X0, 0x11)
222#define TAS2562_TDMConfigurationReg7_PDMTX_Mask (0x1 << 6)
223#define TAS2562_TDMConfigurationReg7_PDMTX_Disable (0x0 << 6)
224#define TAS2562_TDMConfigurationReg7_PDMTX_Enable (0x1 << 6)
225#define TAS2562_TDMConfigurationReg7_PDMSLOT50_Mask (0x3f << 0)
226
227 /* TDM Configuration Reg8 */
228#define TAS2562_TDMConfigurationReg8 TAS2562_REG(0X0, 0x12)
229#define TAS2562_TDMConfigurationReg8_VBATSLEN_Mask (0x1 << 7)
230#define TAS2562_TDMConfigurationReg8_VBATSLEN_8Bits (0x0 << 7)
231#define TAS2562_TDMConfigurationReg8_VBATSLEN_16Bits (0x1 << 7)
232#define TAS2562_TDMConfigurationReg8_VBATTX_Mask (0x1 << 6)
233#define TAS2562_TDMConfigurationReg8_VBATTX_Disable (0x0 << 6)
234#define TAS2562_TDMConfigurationReg8_VBATTX_Enable (0x1 << 6)
235#define TAS2562_TDMConfigurationReg8_VBATSLOT50_Mask (0x3f << 0)
236
237 /* TDM Configuration Reg9 */
238#define TAS2562_TDMConfigurationReg9 TAS2562_REG(0X0, 0x13)
239#define TAS2562_TDMConfigurationReg9_TEMPTX_Mask (0x1 << 6)
240#define TAS2562_TDMConfigurationReg9_TEMPTX_Disable (0x0 << 6)
241#define TAS2562_TDMConfigurationReg9_TEMPTX_Enable (0x1 << 6)
242#define TAS2562_TDMConfigurationReg9_TEMPSLOT50_Mask (0x3f << 0)
243
244 /* TDM Configuration Reg10 */
245#define TAS2562_TDMConfigurationReg10 TAS2562_REG(0X0, 0x14)
246#define TAS2562_TDMConfigurationReg10_GAINTX_Mask (0x1 << 6)
247#define TAS2562_TDMConfigurationReg10_GAINTX_Disable (0x0 << 6)
248#define TAS2562_TDMConfigurationReg10_GAINTX_Enable (0x1 << 6)
249#define TAS2562_TDMConfigurationReg10_GAINSLOT50_Mask (0x3f << 0)
250
251 /* Limiter Configuration Reg0 */
252#define TAS2562_LimiterConfigurationReg0 TAS2562_REG(0X0, 0x15)
253#define TAS2562_LimiterConfigurationReg0_LIMATKST54_Mask (0x3 << 4)
254#define TAS2562_LimiterConfigurationReg0_LIMATKST54_1 (0x2 << 4)
255#define TAS2562_LimiterConfigurationReg0_LIMATKST54_2 (0x3 << 4)
256#define TAS2562_LimiterConfigurationReg0_LIMATKST54_0_25 (0x0 << 4)
257#define TAS2562_LimiterConfigurationReg0_LIMATKST54_0_5 (0x1 << 4)
258#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_Mask (0x7 << 1)
259#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_5 (0x0 << 1)
260#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_10 (0x1 << 1)
261#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_20 (0x2 << 1)
262#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_40 (0x3 << 1)
263#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_80 (0x4 << 1)
264#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_160 (0x5 << 1)
265#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_320 (0x6 << 1)
266#define TAS2562_LimiterConfigurationReg0_LIMATKRT31_640 (0x7 << 1)
267#define TAS2562_LimiterConfigurationReg0_LIMEN_Mask (0x1 << 0)
268#define TAS2562_LimiterConfigurationReg0_LIMEN_Disabled (0x0 << 0)
269#define TAS2562_LimiterConfigurationReg0_LIMEN_Enabled (0x1 << 0)
270
271 /* Limiter Configuration Reg1 */
272#define TAS2562_LimiterConfigurationReg1 TAS2562_REG(0X0, 0x16)
273#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_Mask (0x3 << 6)
274#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_1 (0x2 << 6)
275#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_2 (0x3 << 6)
276#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_0_25 (0x0 << 6)
277#define TAS2562_LimiterConfigurationReg1_LIMRLSST76_0_5 (0x1 << 6)
278#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_Mask (0x7 << 3)
279#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_10 (0x0 << 3)
280#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_50 (0x1 << 3)
281#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_100 (0x2 << 3)
282#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_250 (0x3 << 3)
283#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_500 (0x4 << 3)
284#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_750 (0x5 << 3)
285#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_1000 (0x6 << 3)
286#define TAS2562_LimiterConfigurationReg1_LIMRLSRT53_1500 (0x7 << 3)
287#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_Mask (0x7 << 0)
288#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_0 (0x0 << 0)
289#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_10 (0x1 << 0)
290#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_25 (0x2 << 0)
291#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_50 (0x3 << 0)
292#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_100 (0x4 << 0)
293#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_250 (0x5 << 0)
294#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_500 (0x6 << 0)
295#define TAS2562_LimiterConfigurationReg1_LIMHLDTM20_1000 (0x7 << 0)
296
297 /* Limiter Configuration Reg2 */
298#define TAS2562_LimiterConfigurationReg2 TAS2562_REG(0X0, 0x17)
299#define TAS2562_LimiterConfigurationReg2_LIMMAXATN40_Mask (0x1f << 0)
300
301 /* Limiter Configuration Reg3 */
302#define TAS2562_LimiterConfigurationReg3 TAS2562_REG(0X0, 0x18)
303#define TAS2562_LimiterConfigurationReg3_LIMTHMAX60_Mask (0x7f << 0)
304
305 /* Limiter Configuration Reg4 */
306#define TAS2562_LimiterConfigurationReg4 TAS2562_REG(0X0, 0x19)
307#define TAS2562_LimiterConfigurationReg4_LIMTHMIN60_Mask (0x7f << 0)
308
309 /* Limiter Configuration Reg5 */
310#define TAS2562_LimiterConfigurationReg5 TAS2562_REG(0X0, 0x1A)
311#define TAS2562_LimiterConfigurationReg5_LIMINFPOINT_Mask (0x7f << 0)
312
313 /* Brown Out Prevention Reg0 */
314#define TAS2562_BrownOutPreventionReg0 TAS2562_REG(0X0, 0x1B)
315#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_Mask (0x3 << 4)
316#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_1 (0x0 << 4)
317#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_2 (0x2 << 4)
318#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_4 (0x3 << 4)
319#define TAS2562_BrownOutPreventionReg0_LIMSLOPE54_1_5 (0x1 << 4)
320#define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_Mask (0x1 << 3)
321#define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_DontClear (0x0 << 3)
322#define TAS2562_BrownOutPreventionReg0_BOPHLDCLR_Clear (0x1 << 3)
323#define TAS2562_BrownOutPreventionReg0_BOPINFHLD_Mask (0x1 << 2)
324#define TAS2562_BrownOutPreventionReg0_BOPINFHLD_UseHoldTime (0x0 << 2)
325#define TAS2562_BrownOutPreventionReg0_BOPINFHLD_HoldUntilCleared (0x1 << 2)
326#define TAS2562_BrownOutPreventionReg0_BOPMUTE_Mask (0x1 << 1)
327#define TAS2562_BrownOutPreventionReg0_BOPMUTE_DoNotMute (0x0 << 1)
328#define TAS2562_BrownOutPreventionReg0_BOPMUTE_Mute (0x1 << 1)
329#define TAS2562_BrownOutPreventionReg0_BOPEN_Mask (0x1 << 0)
330#define TAS2562_BrownOutPreventionReg0_BOPEN_Disabled (0x0 << 0)
331#define TAS2562_BrownOutPreventionReg0_BOPEN_Enabled (0x1 << 0)
332
333 /* Brown Out Prevention Reg1 */
334#define TAS2562_BrownOutPreventionReg1 TAS2562_REG(0X0, 0x1C)
335#define TAS2562_BrownOutPreventionReg1_BOPTH70_Mask (0xff << 0)
336
337 /* Brown Out Prevention Reg2 */
338#define TAS2562_BrownOutPreventionReg2 TAS2562_REG(0X0, 0x1D)
339#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_Mask (0x7 << 5)
340#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_5 (0x0 << 5)
341#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_10 (0x1 << 5)
342#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_20 (0x2 << 5)
343#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_40 (0x3 << 5)
344#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_80 (0x4 << 5)
345#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_160 (0x5 << 5)
346#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_320 (0x6 << 5)
347#define TAS2562_BrownOutPreventionReg2_BOPATKRT75_640 (0x7 << 5)
348#define TAS2562_BrownOutPreventionReg2_BOPATKST43_Mask (0x3 << 3)
349#define TAS2562_BrownOutPreventionReg2_BOPATKST43_1 (0x1 << 3)
350#define TAS2562_BrownOutPreventionReg2_BOPATKST43_2 (0x3 << 3)
351#define TAS2562_BrownOutPreventionReg2_BOPATKST43_0_5 (0x0 << 3)
352#define TAS2562_BrownOutPreventionReg2_BOPATKST43_1_5 (0x2 << 3)
353#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_Mask (0x7 << 0)
354#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_0 (0x0 << 0)
355#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_10 (0x1 << 0)
356#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_25 (0x2 << 0)
357#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_50 (0x3 << 0)
358#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_100 (0x4 << 0)
359#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_250 (0x5 << 0)
360#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_500 (0x6 << 0)
361#define TAS2562_BrownOutPreventionReg2_BOPHLDTM20_1000 (0x7 << 0)
362
363 /* ICLA Reg0 */
364#define TAS2562_ICLAReg0 TAS2562_REG(0X0, 0x1E)
365#define TAS2562_ICLAReg0_ICLAUSEMAX_Mask (0x1 << 7)
366#define TAS2562_ICLAReg0_ICLAUSEMAX_Min (0x0 << 7)
367#define TAS2562_ICLAReg0_ICLAUSEMAX_Max (0x1 << 7)
368#define TAS2562_ICLAReg0_ICLASLOT61_Mask (0x3f << 1)
369#define TAS2562_ICLAReg0_ICLAEN_Mask (0x1 << 0)
370#define TAS2562_ICLAReg0_ICLAEN_Disabled (0x0 << 0)
371#define TAS2562_ICLAReg0_ICLAEN_Enabled (0x1 << 0)
372
373 /* ICLA Reg1 */
374#define TAS2562_ICLAReg1 TAS2562_REG(0X0, 0x1F)
375#define TAS2562_ICLAReg1_ICLASEN_Mask (0xff << 0)
376#define TAS2562_ICLAReg1_ICLASLOT_7_Disable (0x0 << 7)
377#define TAS2562_ICLAReg1_ICLASLOT_7_Enable (0x1 << 7)
378#define TAS2562_ICLAReg1_ICLASLOT_6_Disable (0x0 << 6)
379#define TAS2562_ICLAReg1_ICLASLOT_6_Enable (0x1 << 6)
380#define TAS2562_ICLAReg1_ICLASLOT_5_Disable (0x0 << 5)
381#define TAS2562_ICLAReg1_ICLASLOT_5_Enable (0x1 << 5)
382#define TAS2562_ICLAReg1_ICLASLOT_4_Disable (0x0 << 4)
383#define TAS2562_ICLAReg1_ICLASLOT_4_Enable (0x1 << 4)
384#define TAS2562_ICLAReg1_ICLASLOT_3_Disable (0x0 << 3)
385#define TAS2562_ICLAReg1_ICLASLOT_3_Enable (0x1 << 3)
386#define TAS2562_ICLAReg1_ICLASLOT_2_Disable (0x0 << 2)
387#define TAS2562_ICLAReg1_ICLASLOT_2_Enable (0x1 << 2)
388#define TAS2562_ICLAReg1_ICLASLOT_1_Disable (0x0 << 1)
389#define TAS2562_ICLAReg1_ICLASLOT_1_Enable (0x1 << 1)
390#define TAS2562_ICLAReg1_ICLASLOT_0_Disable (0x0 << 0)
391#define TAS2562_ICLAReg1_ICLASLOT_0_Enable (0x1 << 0)
392
393 /* Interrupt Mask Reg0 */
394#define TAS2562_InterruptMaskReg0 TAS2562_REG(0X0, 0x20)
395#define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Mask (0x1 << 7)
396#define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Unmask (0x0 << 7)
397#define TAS2562_InterruptMaskReg0_LIMMUTEINTMASK_Disable (0x1 << 7)
398#define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Mask (0x1 << 6)
399#define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Unmask (0x0 << 6)
400#define TAS2562_InterruptMaskReg0_LIMINFHLDINTMASK_Disable (0x1 << 6)
401#define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Mask (0x1 << 5)
402#define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Unmask (0x0 << 5)
403#define TAS2562_InterruptMaskReg0_LIMMAXATNINTMASK_Disable (0x1 << 5)
404#define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Mask (0x1 << 4)
405#define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Unmask (0x0 << 4)
406#define TAS2562_InterruptMaskReg0_VBATLessthanINFINTMASK_Disable (0x1 << 4)
407#define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Mask (0x1 << 3)
408#define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Unmask (0x0 << 3)
409#define TAS2562_InterruptMaskReg0_LIMActiveFlagINTMASK_Disable (0x1 << 3)
410#define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Mask (0x1 << 2)
411#define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Unmask (0x0 << 2)
412#define TAS2562_InterruptMaskReg0_TDMClockErrorINTMASK_Disable (0x1 << 2)
413#define TAS2562_InterruptMaskReg0_OCEINTMASK_Mask (0x1 << 1)
414#define TAS2562_InterruptMaskReg0_OCEINTMASK_Unmask (0x0 << 1)
415#define TAS2562_InterruptMaskReg0_OCEINTMASK_Disable (0x1 << 1)
416#define TAS2562_InterruptMaskReg0_OTEINTMASK_Mask (0x1 << 0)
417#define TAS2562_InterruptMaskReg0_OTEINTMASK_Unmask (0x0 << 0)
418#define TAS2562_InterruptMaskReg0_OTEINTMASK_Disable (0x1 << 0)
419
420 /* Interrupt Mask Reg1 */
421#define TAS2562_InterruptMaskReg1 TAS2562_REG(0X0, 0x21)
422#define TAS2562_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Mask (0x1 << 7)
423#define TAS2562_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Unmask (0x0 << 7)
424#define TAS2562_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Disable (0x1 << 7)
425#define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Mask (0x1 << 3)
426#define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Unmask (0x0 << 3)
427#define TAS2562_InterruptMaskReg1_VBATOVLOINTMASK_Disable (0x1 << 3)
428#define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Mask (0x1 << 2)
429#define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Unmask (0x0 << 2)
430#define TAS2562_InterruptMaskReg1_VBATUVLOINTMASK_Disable (0x1 << 2)
431#define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Mask (0x1 << 1)
432#define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Unmask (0x0 << 1)
433#define TAS2562_InterruptMaskReg1_BrownOutFlagINTMASK_Disable (0x1 << 1)
434#define TAS2562_InterruptMaskReg1_PDMClockErrorINTMASK_Mask (0x1 << 0)
435#define TAS2562_InterruptMaskReg1_PDMClockErrorINTMASK_Unmask (0x0 << 0)
436#define TAS2562_InterruptMaskReg1_PDMClockErrorINTMASK_Disable (0x1 << 0)
437
438 /* Live-Interrupt Reg0 */
439#define TAS2562_LiveInterruptReg0 TAS2562_REG(0X0, 0x22)
440#define TAS2562_LiveInterruptReg0_LIMMUTE_Mask (0x1 << 7)
441#define TAS2562_LiveInterruptReg0_LIMMUTE_NoInterrupt (0x0 << 7)
442#define TAS2562_LiveInterruptReg0_LIMMUTE_Interrupt (0x1 << 7)
443#define TAS2562_LiveInterruptReg0_LIMINFHLD_Mask (0x1 << 6)
444#define TAS2562_LiveInterruptReg0_LIMINFHLD_NoInterrupt (0x0 << 6)
445#define TAS2562_LiveInterruptReg0_LIMINFHLD_Interrupt (0x1 << 6)
446#define TAS2562_LiveInterruptReg0_LIMMAXATN_Mask (0x1 << 5)
447#define TAS2562_LiveInterruptReg0_LIMMAXATN_NoInterrupt (0x0 << 5)
448#define TAS2562_LiveInterruptReg0_LIMMAXATN_Interrupt (0x1 << 5)
449#define TAS2562_LiveInterruptReg0_VBATLessthanINF_Mask (0x1 << 4)
450#define TAS2562_LiveInterruptReg0_VBATLessthanINF_NoInterrupt (0x0 << 4)
451#define TAS2562_LiveInterruptReg0_VBATLessthanINF_Interrupt (0x1 << 4)
452#define TAS2562_LiveInterruptReg0_LIMActiveFlag_Mask (0x1 << 3)
453#define TAS2562_LiveInterruptReg0_LIMActiveFlag_NoInterrupt (0x0 << 3)
454#define TAS2562_LiveInterruptReg0_LIMActiveFlag_Interrupt (0x1 << 3)
455#define TAS2562_LiveInterruptReg0_TDMClockError_Mask (0x1 << 2)
456#define TAS2562_LiveInterruptReg0_TDMClockError_NoInterrupt (0x0 << 2)
457#define TAS2562_LiveInterruptReg0_TDMClockError_Interrupt (0x1 << 2)
458#define TAS2562_LiveInterruptReg0_OCEFlag_Mask (0x1 << 1)
459#define TAS2562_LiveInterruptReg0_OCEFlag_NoInterrupt (0x0 << 1)
460#define TAS2562_LiveInterruptReg0_OCEFlag_Interrupt (0x1 << 1)
461#define TAS2562_LiveInterruptReg0_OTEFlag_Mask (0x1 << 0)
462#define TAS2562_LiveInterruptReg0_OTEFlag_NoInterrupt (0x0 << 0)
463#define TAS2562_LiveInterruptReg0_OTEFlag_Interrupt (0x1 << 0)
464
465 /* Live-Interrupt Reg1 */
466#define TAS2562_LiveInterruptReg1 TAS2562_REG(0X0, 0x23)
467#define TAS2562_LiveInterruptReg1_PDMAUDDATAINVALID_Mask (0x1 << 7)
468#define TAS2562_LiveInterruptReg1_PDMAUDDATAINVALID_NoInterrupt (0x0 << 7)
469#define TAS2562_LiveInterruptReg1_PDMAUDDATAINVALID_Interrupt (0x1 << 7)
470#define TAS2562_LiveInterruptReg1_VBATOVLO_Mask (0x1 << 3)
471#define TAS2562_LiveInterruptReg1_VBATOVLO_NoInterrupt (0x0 << 3)
472#define TAS2562_LiveInterruptReg1_VBATOVLO_Interrupt (0x1 << 3)
473#define TAS2562_LiveInterruptReg1_VBATUVLO_Mask (0x1 << 2)
474#define TAS2562_LiveInterruptReg1_VBATUVLO_NoInterrupt (0x0 << 2)
475#define TAS2562_LiveInterruptReg1_VBATUVLO_Interrupt (0x1 << 2)
476#define TAS2562_LiveInterruptReg1_BrownOutFlag_Mask (0x1 << 1)
477#define TAS2562_LiveInterruptReg1_BrownOutFlag_NoInterrupt (0x0 << 1)
478#define TAS2562_LiveInterruptReg1_BrownOutFlag_Interrupt (0x1 << 1)
479#define TAS2562_LiveInterruptReg1_PDMClockError_Mask (0x1 << 0)
480#define TAS2562_LiveInterruptReg1_PDMClockError_NoInterrupt (0x0 << 0)
481#define TAS2562_LiveInterruptReg1_PDMClockError_Interrupt (0x1 << 0)
482
483 /* Latched-Interrupt Reg0 */
484#define TAS2562_LatchedInterruptReg0 TAS2562_REG(0X0, 0x24)
485#define TAS2562_LatchedInterruptReg0_LIMMUTESticky_Mask (0x1 << 7)
486#define TAS2562_LatchedInterruptReg0_LIMMUTESticky_NoInterrupt (0x0 << 7)
487#define TAS2562_LatchedInterruptReg0_LIMMUTESticky_Interrupt (0x1 << 7)
488#define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_Mask (0x1 << 6)
489#define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_NoInterrupt (0x0 << 6)
490#define TAS2562_LatchedInterruptReg0_LIMINFHLDSticky_Interrupt (0x1 << 6)
491#define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_Mask (0x1 << 5)
492#define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_NoInterrupt (0x0 << 5)
493#define TAS2562_LatchedInterruptReg0_LIMMAXATNSticky_Interrupt (0x1 << 5)
494#define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_Mask (0x1 << 4)
495#define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_NoInterrupt \
496 (0x0 << 4)
497#define TAS2562_LatchedInterruptReg0_VBATLessthanINFSticky_Interrupt (0x1 << 4)
498#define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_Mask (0x1 << 3)
499#define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_NoInterrupt (0x0 << 3)
500#define TAS2562_LatchedInterruptReg0_LIMActiveFlagSticky_Interrupt (0x1 << 3)
501#define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_Mask (0x1 << 2)
502#define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_NoInterrupt (0x0 << 2)
503#define TAS2562_LatchedInterruptReg0_TDMClockErrorSticky_Interrupt (0x1 << 2)
504#define TAS2562_LatchedInterruptReg0_OCEFlagSticky_Mask (0x1 << 1)
505#define TAS2562_LatchedInterruptReg0_OCEFlagSticky_NoInterrupt (0x0 << 1)
506#define TAS2562_LatchedInterruptReg0_OCEFlagSticky_Interrupt (0x1 << 1)
507#define TAS2562_LatchedInterruptReg0_OTEFlagSticky_Mask (0x1 << 0)
508#define TAS2562_LatchedInterruptReg0_OTEFlagSticky_NoInterrupt (0x0 << 0)
509#define TAS2562_LatchedInterruptReg0_OTEFlagSticky_Interrupt (0x1 << 0)
510
511 /* Latched-Interrupt Reg1 */
512#define TAS2562_LatchedInterruptReg1 TAS2562_REG(0X0, 0x25)
513#define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Mask (0x1 << 7)
514#define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_NoInterrupt \
515 (0x0 << 7)
516#define TAS2562_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Interrupt \
517 (0x1 << 7)
518#define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_Mask (0x1 << 3)
519#define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_NoInterrupt (0x0 << 3)
520#define TAS2562_LatchedInterruptReg1_VBATOVLOSticky_Interrupt (0x1 << 3)
521#define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_Mask (0x1 << 2)
522#define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_NoInterrupt (0x0 << 2)
523#define TAS2562_LatchedInterruptReg1_VBATUVLOSticky_Interrupt (0x1 << 2)
524#define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_Mask (0x1 << 1)
525#define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_NoInterrupt (0x0 << 1)
526#define TAS2562_LatchedInterruptReg1_BrownOutFlagSticky_Interrupt (0x1 << 1)
527#define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_Mask (0x1 << 0)
528#define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_NoInterrupt (0x0 << 0)
529#define TAS2562_LatchedInterruptReg1_PDMClockErrorSticky_Interrupt (0x1 << 0)
530
531 /* VBAT MSB */
532#define TAS2562_VBATMSB TAS2562_REG(0X0, 0x27)
533#define TAS2562_VBATMSB_VBATMSB70_Mask (0xff << 0)
534
535 /* VBAT LSB */
536#define TAS2562_VBATLSB TAS2562_REG(0X0, 0x28)
537#define TAS2562_VBATLSB_VBATLSB74_Mask (0xf << 4)
538
539 /* TEMP MSB */
540#define TAS2562_TEMPMSB TAS2562_REG(0X0, 0x29)
541#define TAS2562_TEMPMSB_TEMPMSB70_Mask (0xff << 0)
542
543 /* TEMP LSB */
544#define TAS2562_TEMPLSB TAS2562_REG(0X0, 0x2A)
545#define TAS2562_TEMPLSB_TEMPLSB74_Mask (0xf << 4)
546
547 /* SDZ Config */
548#define TAS2562_SDZCONFIG TAS2562_REG(0X0, 0x2F)
549#define TAS2562_SDZCONFIG_ICLANONZEROMIN_Mask (0x1 << 4)
550#define TAS2562_SDZCONFIG_ICLANONZEROMIN_Disable (0x0 << 4)
551#define TAS2562_SDZCONFIG_ICLANONZEROMIN_Enable (0x1 << 4)
552#define TAS2562_SDZCONFIG_SDZMODECONF_Mask (0x3 << 2)
553#define TAS2562_SDZCONFIG_SDZMODECONF_ForcedShutdownAfterTimeout (0x0 << 2)
554#define TAS2562_SDZCONFIG_SDZMODECONF_ForceShutdown (0x1 << 2)
555#define TAS2562_SDZCONFIG_SDZMODECONF_NormalShutdown (0x2 << 2)
556#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_Mask (0x3 << 0)
557#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_2ms (0x0 << 0)
558#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_4ms (0x1 << 0)
559#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_6ms (0x2 << 0)
560#define TAS2562_SDZCONFIG_SDZMODETIMEOUT_23p8ms (0x3 << 0)
561
562
563 /* Interrupt Configuration */
564#define TAS2562_InterruptConfiguration TAS2562_REG(0X0, 0x30)
565#define TAS2562_InterruptConfiguration_INTTHRUSW_Mask (0x1 << 2),
566#define TAS2562_InterruptConfiguration_INTTHRUSW_IntOnIRQZ (0x0 << 2)
567#define TAS2562_InterruptConfiguration_INTTHRUSW_IntFor2ms (0x1 << 2)
568#define TAS2562_InterruptConfiguration_PININTConfig10_Mask (0x3 << 0)
569#define TAS2562_InterruptConfiguration_PININTConfig10_AssertOnLiveInterrupts \
570 (0x0 << 0)
571#define \
572TAS2562_InterruptConfiguration_PININTConfig10_AssertOnLatchedInterrupts \
573 (0x1 << 0)
574#define \
575TAS2562_InterruptConfiguration_PININTConfig10_Assert2msOnLiveInterrupts \
576 (0x2 << 0)
577#define \
578TAS2562_InterruptConfiguration_PININTConfig10_Assert2msOnLatchedInterrupts \
579 (0x3 << 0)
580
581 /* Digital Input Pin Pull Down */
582#define TAS2562_DigitalInputPinPullDown TAS2562_REG(0X0, 0x31)
583#define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Mask (0x1 << 7)
584#define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Disabled (0x0 << 7)
585#define TAS2562_DigitalInputPinPullDown_WKPulldownSDOUT_Enabled (0x1 << 7)
586#define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Mask (0x1 << 6)
587#define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Disabled (0x0 << 6)
588#define TAS2562_DigitalInputPinPullDown_WKPulldownSDIN_Enabled (0x1 << 6)
589#define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Mask (0x1 << 5)
590#define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Disabled (0x0 << 5)
591#define TAS2562_DigitalInputPinPullDown_WKPulldownFSYNC_Enabled (0x1 << 5)
592#define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Mask (0x1 << 4)
593#define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Disabled (0x0 << 4)
594#define TAS2562_DigitalInputPinPullDown_WKPulldownSBCLK_Enabled (0x1 << 4)
595#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Mask (0x1 << 3)
596#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Disabled (0x0 << 3)
597#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD0_Enabled (0x1 << 3)
598#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Mask (0x1 << 2)
599#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Disabled (0x0 << 2)
600#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMD1_Enabled (0x1 << 2)
601#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Mask (0x1 << 1)
602#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Disabled (0x0 << 1)
603#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK0_Enabled (0x1 << 1)
604#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Mask (0x1 << 0)
605#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Disabled (0x0 << 0)
606#define TAS2562_DigitalInputPinPullDown_WKPulldownPDMCK1_Enabled (0x1 << 0)
607
608 /* Misc IRQ */
609#define TAS2562_MiscIRQ TAS2562_REG(0X0, 0x32)
610#define TAS2562_MiscIRQ_IRQZREQD_Mask (0x1 << 7)
611#define TAS2562_MiscIRQ_IRQZREQD_ActiveHigh (0x0 << 7)
612#define TAS2562_MiscIRQ_IRQZREQD_ActiveLow (0x1 << 7)
613#define TAS2562_MiscIRQ_IRQZBITBANG_Mask (0x1 << 0)
614#define TAS2562_MiscIRQ_IRQZBITBANG_IRQZInputBuf0 (0x0 << 0)
615#define TAS2562_MiscIRQ_IRQZBITBANG_IRQZInputBuf1 (0x1 << 0)
616
617
618 /* Clock Configuration */
619#define TAS2562_ClockConfiguration TAS2562_REG(0X0, 0x38)
620#define TAS2562_ClockConfiguration_SBCLKtoFS52_Mask (0xf << 2)
621#define TAS2562_ClockConfiguration_SBCLKtoFS52_16 (0x0 << 2)
622#define TAS2562_ClockConfiguration_SBCLKtoFS52_24 (0x1 << 2)
623#define TAS2562_ClockConfiguration_SBCLKtoFS52_32 (0x2 << 2)
624#define TAS2562_ClockConfiguration_SBCLKtoFS52_48 (0x3 << 2)
625#define TAS2562_ClockConfiguration_SBCLKtoFS52_64 (0x4 << 2)
626#define TAS2562_ClockConfiguration_SBCLKtoFS52_96 (0x5 << 2)
627#define TAS2562_ClockConfiguration_SBCLKtoFS52_128 (0x6 << 2)
628#define TAS2562_ClockConfiguration_SBCLKtoFS52_192 (0x7 << 2)
629#define TAS2562_ClockConfiguration_SBCLKtoFS52_256 (0x8 << 2)
630#define TAS2562_ClockConfiguration_SBCLKtoFS52_384 (0x9 << 2)
631#define TAS2562_ClockConfiguration_SBCLKtoFS52_512 (0xa << 2)
632#define TAS2562_ClockConfiguration_DISCLKRateDetect10_Mask (0x3 << 0)
633#define TAS2562_ClockConfiguration_DISCLKRateDetect10_Disabled (0x1 << 0)
634#define TAS2562_ClockConfiguration_DISCLKRateDetect10_Enabled (0x0 << 0)
635
636
637#define TAS2562_BDIVSelection_BCLKMaster TAS2562_REG(0X0, 0x3D)
638#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_Mask (0x3 << 0)
639#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_NDIV2Output (0x0 << 0)
640#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_NDIV1Output (0x1 << 0)
641#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_MCLKOutput (0x2 << 0)
642#define TAS2562_BDIVSelection_BCLKMaster_ClockSource10_PDMCLK1PAD (0x3 << 0)
643
644#define TAS2562_BDIVSelection_HOLDSARUPDATE TAS2562_REG(0X0, 0x41)
645#define TAS2562_BDIVSelection_HOLDSARUPDATE10_Mask (0x1 << 0)
646#define TAS2562_BDIVSelection_HOLDSARUPDATE10_Disabled (0x0 << 0)
647#define TAS2562_BDIVSelection_HOLDSARUPDATE10_Enabled (0x1 << 0)
648
649
650 /* TDM Clock detection monitor */
651#define TAS2562_TDMClockdetectionmonitor TAS2562_REG(0X0, 0x77)
652#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_Mask (0xf << 3)
653#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_16 (0x0 << 3)
654#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_24 (0x1 << 3)
655#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_32 (0x2 << 3)
656#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_48 (0x3 << 3)
657#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_64 (0x4 << 3)
658#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_96 (0x5 << 3)
659#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_128 (0x6 << 3)
660#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_192 (0x7 << 3)
661#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_256 (0x8 << 3)
662#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_384 (0x9 << 3)
663#define TAS2562_TDMClockdetectionmonitor_SBCLKtoFSYNC63_512 (0xf << 3)
664#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_Mask (0x7 << 0),
665#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_8khz (0x0 << 0)
666#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_16khz (0x1 << 0)
667#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_32khz (0x2 << 0)
668#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_48khz (0x3 << 0)
669#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_96khz (0x4 << 0)
670#define TAS2562_TDMClockdetectionmonitor_DetectedSampleRate20_192khz (0x5 << 0)
671
672 /* Revision and PG ID */
673#define TAS2562_RevisionandPGID TAS2562_REG(0X0, 0x7D)
674#define TAS2562_RevisionandPGID_RevisionID74_Mask (0xf << 4)
675#define TAS2562_RevisionandPGID_PGID30_Mask (0xf << 0)
676
677 /* I2C Checksum */
678#define TAS2562_I2CChecksum TAS2562_REG(0X0, 0x7E)
679#define TAS2562_I2CChecksum_I2CChecksum70_Mask (0xff << 0)
680
681 /* Book */
682#define TAS2562_Book TAS2562_REG(0X0, 0x7F)
683#define TAS2562_Book_Book70_Mask (0xff << 0)
684
685
686#define TAS2562_RegisterCount 55
687
688#define ERROR_NONE 0x0000000
689#define ERROR_PLL_ABSENT 0x0000000
690#define ERROR_DEVA_I2C_COMM 0x0000000
691#define ERROR_DEVB_I2C_COMM 0x0000000
692#define ERROR_PRAM_CRCCHK 0x0000000
693#define ERROR_YRAM_CRCCHK 0x0000001
694#define ERROR_CLK_DET2 0x0000002
695#define ERROR_CLK_DET1 0x0000004
696#define ERROR_CLK_LOST 0x0000008
697#define ERROR_BROWNOUT 0x0000010
698#define ERROR_DIE_OVERTEMP 0x0000020
699#define ERROR_CLK_HALT 0x0000040
700#define ERROR_UNDER_VOLTAGE 0x0000080
701#define ERROR_OVER_CURRENT 0x0000100
702#define ERROR_CLASSD_PWR 0x0000200
703#define ERROR_FAILSAFE 0x4000000
704
705struct tas2562_register {
706int book;
707int page;
708int reg;
709};
710
711struct tas2562_dai_cfg {
712unsigned int dai_fmt;
713unsigned int tdm_delay;
714};
715
716struct tas2562_priv {
717struct device *dev;
718struct regmap *regmap;
719struct mutex dev_lock;
720struct delayed_work irq_work;
721struct hrtimer mtimer;
722int mnClkin;
723int mnClkid;
724bool mbPowerUp;
725int mnCurrentBook;
726int mnCurrentPage;
727int mnLoad;
728int mnASIFormat;
729int mnResetGPIO;
730int mnIRQGPIO;
731int mnIRQ;
732bool mbIRQEnable;
733int mnSamplingRate;
734int mnFrameSize;
735int mnPLL;
736int mnPPG;
737//Added 060356-PP
738int mnSlot_width;
739int ch_size;
740int (*read)(struct tas2562_priv *pTAS2562,
741 unsigned int reg, unsigned int *pValue);
742int (*write)(struct tas2562_priv *pTAS2562,
743 unsigned int reg, unsigned int Value);
744int (*bulk_read)(struct tas2562_priv *pTAS2562,
745 unsigned int reg, unsigned char *pData, unsigned int len);
746int (*bulk_write)(struct tas2562_priv *pTAS2562,
747 unsigned int reg, unsigned char *pData, unsigned int len);
748int (*update_bits)(struct tas2562_priv *pTAS2562,
749 unsigned int reg, unsigned int mask, unsigned int value);
750void (*hw_reset)(struct tas2562_priv *pTAS2562);
751void (*clearIRQ)(struct tas2562_priv *pTAS2562);
752void (*enableIRQ)(struct tas2562_priv *pTAS2562, bool enable);
753 /* device is working, but system is suspended */
754int (*runtime_suspend)(struct tas2562_priv *pTAS2562);
755int (*runtime_resume)(struct tas2562_priv *pTAS2562);
756bool mbRuntimeSuspend;
757
758unsigned int mnErrCode;
759#ifdef CONFIG_TAS2562_CODEC
760struct mutex codec_lock;
761#endif
762
763#ifdef CONFIG_TAS2562_MISC
764int mnDBGCmd;
765int mnCurrentReg;
766struct mutex file_lock;
767#endif
768};
769
770#endif /* __TAS2562_ */