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authorTracy Yi2018-01-17 11:29:51 -0600
committerTracy Yi2018-01-17 11:29:51 -0600
commit7282fb414ede64c1d9908cb66239be8ee5feda24 (patch)
tree7524fe13bf9fd0a1d5ec56416b3754c643544178
downloadtas2770sw-android-7282fb414ede64c1d9908cb66239be8ee5feda24.tar.gz
tas2770sw-android-7282fb414ede64c1d9908cb66239be8ee5feda24.tar.xz
tas2770sw-android-7282fb414ede64c1d9908cb66239be8ee5feda24.zip
Initial release
Signed-off-by: Tracy Yi <tracy-yi@ti.com>
-rw-r--r--Kconfig15
-rw-r--r--License text GPLv2.txt339
-rw-r--r--Makefile2
-rw-r--r--dai_link.readme28
-rw-r--r--dts.readme10
-rw-r--r--tas2770-codec.c555
-rw-r--r--tas2770-codec.h31
-rw-r--r--tas2770-regmap.c578
-rw-r--r--tas2770.h742
9 files changed, 2300 insertions, 0 deletions
diff --git a/Kconfig b/Kconfig
new file mode 100644
index 0000000..dfdb762
--- /dev/null
+++ b/Kconfig
@@ -0,0 +1,15 @@
1
2menuconfig SND_SOC_TAS2770
3 tristate "Texas Instruments TAS2770 SmartAmp(R)"
4
5if SND_SOC_TAS2770
6config TAS2770_REGMAP
7 bool "Use of RegMap API"
8
9config TAS2770_CODEC
10 bool "Codec Driver support"
11
12#config TAS2770_MISC
13# bool "Misc Driver support"
14
15endif # SND_SOC_TAS2770
diff --git a/License text GPLv2.txt b/License text GPLv2.txt
new file mode 100644
index 0000000..d159169
--- /dev/null
+++ b/License text GPLv2.txt
@@ -0,0 +1,339 @@
1 GNU GENERAL PUBLIC LICENSE
2 Version 2, June 1991
3
4 Copyright (C) 1989, 1991 Free Software Foundation, Inc.,
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diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..985f2dd
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,2 @@
1snd-soc-tas2770-objs := tas2770-codec.o tas2770-regmap.o
2obj-$(CONFIG_SND_SOC_TAS2770) += snd-soc-tas2770.o
diff --git a/dai_link.readme b/dai_link.readme
new file mode 100644
index 0000000..5381295
--- /dev/null
+++ b/dai_link.readme
@@ -0,0 +1,28 @@
1example for connecting CPU DAI
2
3#if defined(CONFIG_TAS2770_CODEC)
4 {
5 .name = LPASS_BE_PRI_MI2S_RX,
6 .stream_name = "Primary MI2S Hostless Playback",
7 .cpu_dai_name = "msm-dai-q6-mi2s.0",
8 .platform_name = "msm-pcm-routing",
9 .codec_name = "tas2770.3-0041",
10 .codec_dai_name = "tas2770 ASI",
11 .no_pcm = 1,
12 .be_id = MSM_BACKEND_DAI_PRI_MI2S_RX,
13 .be_hw_params_fixup = msm_be_prim_mi2s_hw_params_fixup,
14 .ops = &msm8974_prim_mi2s_be_ops,
15 },
16 {
17 .name = LPASS_BE_PRI_MI2S_TX,
18 .stream_name = "Primary MI2S Hostless Capture",
19 .cpu_dai_name = "msm-dai-q6-mi2s.0",
20 .platform_name = "msm-pcm-routing",
21 .codec_name = "tas2770.3-0041",
22 .codec_dai_name = "tas2770 ASI",
23 .no_pcm = 1,
24 .be_id = MSM_BACKEND_DAI_PRI_MI2S_TX,
25 .be_hw_params_fixup = msm_be_prim_mi2s_hw_params_fixup,
26 .ops = &msm8974_prim_mi2s_be_ops,
27 },
28#endif \ No newline at end of file
diff --git a/dts.readme b/dts.readme
new file mode 100644
index 0000000..2991fb6
--- /dev/null
+++ b/dts.readme
@@ -0,0 +1,10 @@
1example for dts:
2 tas2770@41 {
3 compatible = "ti,tas2770";
4 reg = <0x41>;
5 ti,reset-gpio = <&msmgpio 13 0>;
6 ti,irq-gpio = <&msmgpio 59 0>;
7 ti,asi-format = <0>; /* 0, i2S; 1, DSP; */
8 ti,ppg = <0>; /* 0, 0dB default; 1, enable -2dB */
9 status = "ok";
10 }; \ No newline at end of file
diff --git a/tas2770-codec.c b/tas2770-codec.c
new file mode 100644
index 0000000..23d99c9
--- /dev/null
+++ b/tas2770-codec.c
@@ -0,0 +1,555 @@
1/*
2** =============================================================================
3** Copyright (c) 2016 Texas Instruments Inc.
4**
5** This program is free software; you can redistribute it and/or modify it under
6** the terms of the GNU General Public License as published by the Free Software
7** Foundation; version 2.
8**
9** This program is distributed in the hope that it will be useful, but WITHOUT
10** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
11** FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
12**
13** File:
14** tas2770-codec.c
15**
16** Description:
17** ALSA SoC driver for Texas Instruments TAS2770 High Performance 4W Smart Amplifier
18**
19** =============================================================================
20*/
21
22#ifdef CONFIG_TAS2770_CODEC
23
24#define DEBUG
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/delay.h>
29#include <linux/pm.h>
30#include <linux/i2c.h>
31#include <linux/gpio.h>
32#include <linux/regulator/consumer.h>
33#include <linux/firmware.h>
34#include <linux/regmap.h>
35#include <linux/of.h>
36#include <linux/of_gpio.h>
37#include <linux/slab.h>
38#include <sound/core.h>
39#include <sound/pcm.h>
40#include <sound/pcm_params.h>
41#include <sound/soc.h>
42#include <sound/initval.h>
43#include <sound/tlv.h>
44
45#include "tas2770.h"
46
47
48#define TAS2770_MDELAY 0xFFFFFFFE
49//#define KCONTROL_CODEC
50
51static unsigned int tas2770_codec_read(struct snd_soc_codec *codec, unsigned int reg)
52{
53 struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
54 int nResult = 0;
55 unsigned int value = 0;
56
57 mutex_lock(&pTAS2770->dev_lock);
58
59 nResult = regmap_read(pTAS2770->regmap, reg, &value);
60
61 if (nResult < 0)
62 dev_err(pTAS2770->dev, "%s, ERROR, reg=0x%x, E=%d\n",
63 __func__, reg, nResult);
64 else
65 dev_dbg(pTAS2770->dev, "%s, reg: 0x%x, value: 0x%x\n", __func__, reg, value);
66
67 mutex_unlock(&pTAS2770->dev_lock);
68 return nResult;
69}
70
71
72static int tas2770_codec_write(struct snd_soc_codec *codec, unsigned int reg,
73 unsigned int value)
74{
75 struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
76
77 int nResult = 0;
78
79 mutex_lock(&pTAS2770->dev_lock);
80
81 nResult = regmap_write(pTAS2770->regmap, reg, value);
82 if(nResult < 0)
83 dev_err(pTAS2770->dev, "%s, ERROR, reg=0x%x, E=%d\n",
84 __func__, reg, nResult);
85 else
86 dev_dbg(pTAS2770->dev, "%s, reg: 0x%x, 0x%x\n", __func__, reg, value);
87
88 mutex_unlock(&pTAS2770->dev_lock);
89
90 return nResult;
91
92}
93
94
95static int tas2770_codec_suspend(struct snd_soc_codec *codec)
96{
97 struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
98 int ret = 0;
99
100 mutex_lock(&pTAS2770->codec_lock);
101
102 dev_dbg(pTAS2770->dev, "%s\n", __func__);
103// pTAS2770->runtime_suspend(pTAS2770);
104
105 mutex_unlock(&pTAS2770->codec_lock);
106 return ret;
107}
108
109static int tas2770_codec_resume(struct snd_soc_codec *codec)
110{
111 struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
112 int ret = 0;
113
114 mutex_lock(&pTAS2770->codec_lock);
115
116 dev_dbg(pTAS2770->dev, "%s\n", __func__);
117// pTAS2770->runtime_resume(pTAS2770);
118
119 mutex_unlock(&pTAS2770->codec_lock);
120 return ret;
121}
122
123static const struct snd_kcontrol_new tas2770_asi_controls[] = {
124 SOC_DAPM_SINGLE("Left", TAS2770_TDMConfigurationReg2,
125 4, 1, 0),
126 SOC_DAPM_SINGLE("Right", TAS2770_TDMConfigurationReg2,
127 4, 2, 0),
128 SOC_DAPM_SINGLE("LeftRightDiv2", TAS2770_TDMConfigurationReg2,
129 4, 3, 0),
130};
131
132
133static int tas2770_dac_event(struct snd_soc_dapm_widget *w,
134 struct snd_kcontrol *kcontrol, int event)
135{
136#if 1
137 struct snd_soc_codec *codec = w->codec;
138// struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
139
140 switch (event) {
141 case SND_SOC_DAPM_POST_PMU:
142 snd_soc_update_bits(codec, TAS2770_PowerControl,
143 TAS2770_PowerControl_OperationalMode10_Mask,
144 TAS2770_PowerControl_OperationalMode10_Active);
145 break;
146 case SND_SOC_DAPM_PRE_PMD:
147 snd_soc_update_bits(codec, TAS2770_PowerControl,
148 TAS2770_PowerControl_OperationalMode10_Mask,
149 TAS2770_PowerControl_OperationalMode10_Shutdown);
150 break;
151
152 }
153#endif
154 return 0;
155
156}
157
158static const struct snd_soc_dapm_widget tas2770_dapm_widgets[] = {
159 SND_SOC_DAPM_AIF_IN("ASI1", "ASI1 Playback", 0, SND_SOC_NOPM, 0, 0),
160 SND_SOC_DAPM_MIXER("ASI1 Sel",
161 TAS2770_TDMConfigurationReg2, 4, 0,
162 &tas2770_asi_controls[0],
163 ARRAY_SIZE(tas2770_asi_controls)),
164 SND_SOC_DAPM_DAC_E("DAC", NULL, SND_SOC_NOPM, 0, 0,
165 tas2770_dac_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
166 SND_SOC_DAPM_OUTPUT("OUT")
167
168};
169
170static const struct snd_soc_dapm_route tas2770_audio_map[] = {
171 {"ASI1 Sel", "Left", "ASI1"},
172 {"ASI1 Sel", "Right", "ASI1"},
173 {"ASI1 Sel", "LeftRightDiv2", "ASI1"},
174 {"DAC", NULL, "ASI1 Sel"},
175 {"OUT", NULL, "DAC"},
176};
177
178
179static int tas2770_mute(struct snd_soc_dai *dai, int mute)
180{
181#if 1
182 struct snd_soc_codec *codec = dai->codec;
183 struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
184
185 mutex_lock(&pTAS2770->codec_lock);
186 if(mute) {
187 snd_soc_update_bits(codec, TAS2770_PowerControl,
188 TAS2770_PowerControl_OperationalMode10_Mask,
189 TAS2770_PowerControl_OperationalMode10_Mute);
190 } else {
191 snd_soc_update_bits(codec, TAS2770_PowerControl,
192 TAS2770_PowerControl_OperationalMode10_Mask,
193 TAS2770_PowerControl_OperationalMode10_Active);
194 }
195 mutex_unlock(&pTAS2770->codec_lock);
196#endif
197 return 0;
198}
199
200
201
202static int tas2770_hw_params(struct snd_pcm_substream *substream,
203 struct snd_pcm_hw_params *params,
204 struct snd_soc_dai *dai)
205{
206 struct snd_soc_codec *codec = dai->codec;
207 struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
208 int blr_clk_ratio;
209 int ret = 0;
210
211 dev_dbg(pTAS2770->dev, "%s, format: %d\n", __func__, params_format(params));
212
213 switch(params_format(params)) {
214 case SNDRV_PCM_FORMAT_S16_LE:
215 snd_soc_update_bits(codec,
216 TAS2770_TDMConfigurationReg2,
217 TAS2770_TDMConfigurationReg2_RXWLEN32_Mask |
218 TAS2770_TDMConfigurationReg2_RXSLEN10_Mask,
219 TAS2770_TDMConfigurationReg2_RXWLEN32_16Bits |
220 TAS2770_TDMConfigurationReg2_RXWLEN32_16Bits );
221 pTAS2770->ch_size = 16;
222 break;
223 case SNDRV_PCM_FMTBIT_S24_LE:
224 snd_soc_update_bits(codec,
225 TAS2770_TDMConfigurationReg2,
226 TAS2770_TDMConfigurationReg2_RXWLEN32_Mask |
227 TAS2770_TDMConfigurationReg2_RXSLEN10_Mask,
228 TAS2770_TDMConfigurationReg2_RXWLEN32_24Bits |
229 TAS2770_TDMConfigurationReg2_RXWLEN32_24Bits );
230 pTAS2770->ch_size = 24;
231 break;
232 case SNDRV_PCM_FMTBIT_S32_LE:
233 snd_soc_update_bits(codec,
234 TAS2770_TDMConfigurationReg2,
235 TAS2770_TDMConfigurationReg2_RXWLEN32_Mask |
236 TAS2770_TDMConfigurationReg2_RXSLEN10_Mask,
237 TAS2770_TDMConfigurationReg2_RXWLEN32_32Bits |
238 TAS2770_TDMConfigurationReg2_RXWLEN32_32Bits );
239 pTAS2770->ch_size = 32;
240 break;
241
242 }
243
244 blr_clk_ratio = params_channels(params) * pTAS2770->ch_size;
245 dev_dbg(pTAS2770->dev, "blr_clk_ratio: %d\n", blr_clk_ratio);
246
247 switch(blr_clk_ratio) {
248 case 16:
249 snd_soc_update_bits(codec,
250 TAS2770_ClockConfiguration,
251 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
252 TAS2770_ClockConfiguration_SBCLKtoFS52_16);
253 break;
254 case 24:
255 snd_soc_update_bits(codec,
256 TAS2770_ClockConfiguration,
257 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
258 TAS2770_ClockConfiguration_SBCLKtoFS52_24);
259 break;
260 case 32:
261 snd_soc_update_bits(codec,
262 TAS2770_ClockConfiguration,
263 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
264 TAS2770_ClockConfiguration_SBCLKtoFS52_32);
265 break;
266 case 48:
267 snd_soc_update_bits(codec,
268 TAS2770_ClockConfiguration,
269 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
270 TAS2770_ClockConfiguration_SBCLKtoFS52_48);
271 break;
272 case 64:
273 snd_soc_update_bits(codec,
274 TAS2770_ClockConfiguration,
275 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
276 TAS2770_ClockConfiguration_SBCLKtoFS52_64);
277 break;
278 case 96:
279 snd_soc_update_bits(codec,
280 TAS2770_ClockConfiguration,
281 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
282 TAS2770_ClockConfiguration_SBCLKtoFS52_96);
283 break;
284 case 128:
285 snd_soc_update_bits(codec,
286 TAS2770_ClockConfiguration,
287 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
288 TAS2770_ClockConfiguration_SBCLKtoFS52_128);
289 break;
290 case 192:
291 snd_soc_update_bits(codec,
292 TAS2770_ClockConfiguration,
293 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
294 TAS2770_ClockConfiguration_SBCLKtoFS52_192);
295 break;
296 case 256:
297 snd_soc_update_bits(codec,
298 TAS2770_ClockConfiguration,
299 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
300 TAS2770_ClockConfiguration_SBCLKtoFS52_256);
301 break;
302 case 384:
303 snd_soc_update_bits(codec,
304 TAS2770_ClockConfiguration,
305 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
306 TAS2770_ClockConfiguration_SBCLKtoFS52_384);
307 break;
308 case 512:
309 snd_soc_update_bits(codec,
310 TAS2770_ClockConfiguration,
311 TAS2770_ClockConfiguration_SBCLKtoFS52_Mask,
312 TAS2770_ClockConfiguration_SBCLKtoFS52_512);
313 break;
314 default:
315 dev_err(pTAS2770->dev, "Invalid BCLK to FSYNC ratio\n");
316 ret = -EINVAL;
317 }
318
319 dev_dbg(pTAS2770->dev, "%s, sample rate: %d\n", __func__, params_rate(params));
320 switch(params_rate(params))
321 {
322 case 48000:
323 snd_soc_update_bits(codec,
324 TAS2770_TDMConfigurationReg0,
325 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_Mask,
326 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
327 snd_soc_update_bits(codec,
328 TAS2770_TDMConfigurationReg0,
329 TAS2770_TDMConfigurationReg0_SAMPRATE31_Mask,
330 TAS2770_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz);
331 break;
332 case 44100:
333 snd_soc_update_bits(codec,
334 TAS2770_TDMConfigurationReg0,
335 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_Mask,
336 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
337 snd_soc_update_bits(codec,
338 TAS2770_TDMConfigurationReg0,
339 TAS2770_TDMConfigurationReg0_SAMPRATE31_Mask,
340 TAS2770_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz);
341 break;
342 case 96000:
343 snd_soc_update_bits(codec,
344 TAS2770_TDMConfigurationReg0,
345 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_Mask,
346 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
347 snd_soc_update_bits(codec,
348 TAS2770_TDMConfigurationReg0,
349 TAS2770_TDMConfigurationReg0_SAMPRATE31_Mask,
350 TAS2770_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz);
351 break;
352 case 88200:
353 snd_soc_update_bits(codec,
354 TAS2770_TDMConfigurationReg0,
355 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_Mask,
356 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
357 snd_soc_update_bits(codec,
358 TAS2770_TDMConfigurationReg0,
359 TAS2770_TDMConfigurationReg0_SAMPRATE31_Mask,
360 TAS2770_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz);
361 break;
362 case 19200:
363 snd_soc_update_bits(codec,
364 TAS2770_TDMConfigurationReg0,
365 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_Mask,
366 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_48KHz);
367 snd_soc_update_bits(codec,
368 TAS2770_TDMConfigurationReg0,
369 TAS2770_TDMConfigurationReg0_SAMPRATE31_Mask,
370 TAS2770_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz);
371 break;
372 case 17640:
373 snd_soc_update_bits(codec,
374 TAS2770_TDMConfigurationReg0,
375 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_Mask,
376 TAS2770_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz);
377 snd_soc_update_bits(codec,
378 TAS2770_TDMConfigurationReg0,
379 TAS2770_TDMConfigurationReg0_SAMPRATE31_Mask,
380 TAS2770_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz);
381 break;
382 default:
383 dev_dbg(pTAS2770->dev, "%s, unsupported sample rate\n", __func__);
384
385 }
386 return ret;
387}
388
389static int tas2770_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
390{
391 u8 tdm_rx_start_slot = 0, asi_cfg_1 = 0;
392 struct snd_soc_codec *codec = dai->codec;
393 struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
394 int ret = 0;
395
396 dev_dbg(pTAS2770->dev, "%s, format=0x%x\n", __func__, fmt);
397
398#if 1
399 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
400 case SND_SOC_DAIFMT_CBS_CFS:
401 asi_cfg_1 = 0x00;
402 break;
403 default:
404 dev_err(pTAS2770->dev, "ASI format master is not found\n");
405 ret = -EINVAL;
406 }
407
408 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
409 case SND_SOC_DAIFMT_NB_NF:
410 dev_dbg(pTAS2770->dev, "INV format: NBNF\n");
411 asi_cfg_1 |= TAS2770_TDMConfigurationReg1_RXEDGE_Rising;
412 break;
413 case SND_SOC_DAIFMT_IB_NF:
414 dev_dbg(pTAS2770->dev, "INV format: IBNF\n");
415 asi_cfg_1 |= TAS2770_TDMConfigurationReg1_RXEDGE_Falling;
416 break;
417 default:
418 dev_err(pTAS2770->dev, "ASI format Inverse is not found\n");
419 ret = -EINVAL;
420 }
421
422 snd_soc_update_bits(codec, TAS2770_TDMConfigurationReg1,
423 TAS2770_TDMConfigurationReg1_RXEDGE_Mask,
424 asi_cfg_1);
425
426 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
427 case (SND_SOC_DAIFMT_I2S):
428 tdm_rx_start_slot = 1;
429 break;
430 case (SND_SOC_DAIFMT_DSP_A):
431 case (SND_SOC_DAIFMT_DSP_B):
432 tdm_rx_start_slot = 1;
433 break;
434 case (SND_SOC_DAIFMT_LEFT_J):
435 tdm_rx_start_slot = 0;
436 break;
437 default:
438 dev_err(pTAS2770->dev, "DAI Format is not found, fmt=0x%x\n", fmt);
439 ret = -EINVAL;
440 break;
441 }
442
443 snd_soc_update_bits(codec, TAS2770_TDMConfigurationReg1,
444 TAS2770_TDMConfigurationReg1_RXOFFSET51_Mask,
445 (tdm_rx_start_slot << TAS2770_TDMConfigurationReg1_RXOFFSET51_Shift));
446#endif
447 return ret;
448}
449
450static struct snd_soc_dai_ops tas2770_dai_ops = {
451 .digital_mute = tas2770_mute,
452 .hw_params = tas2770_hw_params,
453 .set_fmt = tas2770_set_dai_fmt,
454};
455
456#define TAS2770_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
457 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
458
459#define TAS2770_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 \
460 SNDRV_PCM_RATE_88200 |\
461 SNDRV_PCM_RATE_96000 |\
462 SNDRV_PCM_RATE_176400 |\
463 SNDRV_PCM_RATE_192000\
464 )
465
466static struct snd_soc_dai_driver tas2770_dai_driver[] = {
467 {
468 .name = "tas2770 ASI1",
469 .id = 0,
470 .playback = {
471 .stream_name = "ASI1 Playback",
472 .channels_min = 2,
473 .channels_max = 2,
474 .rates = SNDRV_PCM_RATE_8000_192000,
475 .formats = TAS2770_FORMATS,
476 },
477 .capture = {
478 .stream_name = "ASI1 Capture",
479 .channels_min = 0,
480 .channels_max = 2,
481 .rates = SNDRV_PCM_RATE_8000_192000,
482 .formats = TAS2770_FORMATS,
483 },
484 .ops = &tas2770_dai_ops,
485 .symmetric_rates = 1,
486 },
487};
488
489static int tas2770_codec_probe(struct snd_soc_codec *codec)
490{
491 struct tas2770_priv *pTAS2770 = snd_soc_codec_get_drvdata(codec);
492
493 dev_err(pTAS2770->dev, "%s\n", __func__);
494
495 return 0;
496}
497
498static int tas2770_codec_remove(struct snd_soc_codec *codec)
499{
500 return 0;
501}
502
503#if 0
504
505/*
506 * DAC digital volumes. From 0 to 31 dB in 1 dB steps
507 */
508static DECLARE_TLV_DB_SCALE(dac_tlv, 0, 100, 0);
509
510static const struct snd_kcontrol_new tas2770_snd_controls[] = {
511 SOC_SINGLE_TLV("DAC Playback Volume", TAS2770_PlaybackConfigurationReg0, 0, 0x1f, 0,
512 dac_tlv),
513// SOC_SINGLE_EXT("TAS2770 PowerCtrl", SND_SOC_NOPM, 0, 0x0001, 0,
514// tas2770_power_ctrl_get, tas2770_power_ctrl_put),
515};
516#endif
517
518static struct snd_soc_codec_driver soc_codec_driver_tas2770 = {
519 .probe = tas2770_codec_probe,
520 .remove = tas2770_codec_remove,
521 .read = tas2770_codec_read,
522 .write = tas2770_codec_write,
523 .suspend = tas2770_codec_suspend,
524 .resume = tas2770_codec_resume,
525// .controls = tas2770_snd_controls,
526// .num_controls = ARRAY_SIZE(tas2770_snd_controls),
527 .dapm_widgets = tas2770_dapm_widgets,
528 .num_dapm_widgets = ARRAY_SIZE(tas2770_dapm_widgets),
529 .dapm_routes = tas2770_audio_map,
530 .num_dapm_routes = ARRAY_SIZE(tas2770_audio_map),
531};
532
533int tas2770_register_codec(struct tas2770_priv *pTAS2770)
534{
535 int nResult = 0;
536
537 dev_info(pTAS2770->dev, "%s, enter\n", __func__);
538 nResult = snd_soc_register_codec(pTAS2770->dev,
539 &soc_codec_driver_tas2770,
540 tas2770_dai_driver, ARRAY_SIZE(tas2770_dai_driver));
541
542 return nResult;
543}
544
545int tas2770_deregister_codec(struct tas2770_priv *pTAS2770)
546{
547 snd_soc_unregister_codec(pTAS2770->dev);
548
549 return 0;
550}
551
552MODULE_AUTHOR("Texas Instruments Inc.");
553MODULE_DESCRIPTION("TAS2770 ALSA SOC Smart Amplifier driver");
554MODULE_LICENSE("GPL v2");
555#endif /* CONFIG_TAS2770_CODEC */
diff --git a/tas2770-codec.h b/tas2770-codec.h
new file mode 100644
index 0000000..8fd4e0b
--- /dev/null
+++ b/tas2770-codec.h
@@ -0,0 +1,31 @@
1/*
2** =============================================================================
3** Copyright (c) 2016 Texas Instruments Inc.
4**
5** This program is free software; you can redistribute it and/or modify it under
6** the terms of the GNU General Public License as published by the Free Software
7** Foundation; version 2.
8**
9** This program is distributed in the hope that it will be useful, but WITHOUT
10** ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
11** FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
12**
13** File:
14** tas2560-codec.h
15**
16** Description:
17** header file for tas2560-codec.c
18**
19** =============================================================================
20*/
21
22#ifndef _TAS2770_CODEC_H
23#define _TAS2770_CODEC_H
24
25#include "tas2770.h"
26
27int tas2770_register_codec(struct tas2770_priv *pTAS2770);
28int tas2770_deregister_codec(struct tas2770_priv *pTAS2770);
29int tas2770_LoadConfig(struct tas2770_priv *pTAS2770, bool bPowerOn);
30
31#endif /* _TAS2560_CODEC_H */
diff --git a/tas2770-regmap.c b/tas2770-regmap.c
new file mode 100644
index 0000000..bb4c5f3
--- /dev/null
+++ b/tas2770-regmap.c
@@ -0,0 +1,578 @@
1/*
2 * ALSA SoC Texas Instruments TAS2770 High Performance 4W Smart Amplifier
3 *
4 * Copyright (C) 2016 Texas Instruments, Inc.
5 *
6 * Author: saiprasad
7 *
8 * This package is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
13 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
14 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
15 *
16 */
17#ifdef CONFIG_TAS2770_REGMAP
18
19#define DEBUG
20#include <linux/module.h>
21#include <linux/moduleparam.h>
22#include <linux/err.h>
23#include <linux/init.h>
24#include <linux/delay.h>
25#include <linux/pm.h>
26#include <linux/i2c.h>
27#include <linux/gpio.h>
28#include <linux/regulator/consumer.h>
29#include <linux/firmware.h>
30#include <linux/regmap.h>
31#include <linux/of.h>
32#include <linux/of_gpio.h>
33#include <linux/slab.h>
34#include <sound/soc.h>
35
36#include "tas2770.h"
37#include "tas2770-codec.h"
38
39static const struct reg_default tas2770_reg_defaults[] = {
40 { TAS2770_Page, 0x00 },
41 { TAS2770_SoftwareReset, 0x00 },
42 { TAS2770_PowerControl, 0x0e },
43 { TAS2770_PlaybackConfigurationReg0, 0x10 },
44 { TAS2770_PlaybackConfigurationReg1, 0x01 },
45 { TAS2770_PlaybackConfigurationReg2, 0x00 },
46 { TAS2770_MiscConfigurationReg0, 0x07 },
47 { TAS2770_TDMConfigurationReg1, 0x02 },
48 { TAS2770_TDMConfigurationReg2, 0x0a },
49 { TAS2770_TDMConfigurationReg3, 0x10 },
50 { TAS2770_InterruptMaskReg0, 0xfc },
51 { TAS2770_InterruptMaskReg1, 0xb1 },
52 { TAS2770_InterruptConfiguration, 0x05 },
53 { TAS2770_MiscIRQ, 0x81 },
54 { TAS2770_ClockConfiguration, 0x0d },
55
56};
57
58static bool tas2770_volatile(struct device *dev, unsigned int reg)
59{
60 switch (reg) {
61 case TAS2770_Page: /* regmap implementation requires this */
62 case TAS2770_SoftwareReset: /* always clears after write */
63 case TAS2770_BrownOutPreventionReg0:/* has a self clearing bit */
64 case TAS2770_LiveInterruptReg0:
65 case TAS2770_LiveInterruptReg1:
66 case TAS2770_LatchedInterruptReg0:/* Sticky interrupt flags */
67 case TAS2770_LatchedInterruptReg1:/* Sticky interrupt flags */
68 case TAS2770_VBATMSB:
69 case TAS2770_VBATLSB:
70 case TAS2770_TEMPMSB:
71 case TAS2770_TEMPLSB:
72 return true;
73 }
74 return false;
75}
76
77static bool tas2770_writeable(struct device *dev, unsigned int reg)
78{
79 switch (reg) {
80 case TAS2770_LiveInterruptReg0:
81 case TAS2770_LiveInterruptReg1:
82 case TAS2770_LatchedInterruptReg0:
83 case TAS2770_LatchedInterruptReg1:
84 case TAS2770_VBATMSB:
85 case TAS2770_VBATLSB:
86 case TAS2770_TEMPMSB:
87 case TAS2770_TEMPLSB:
88 case TAS2770_TDMClockdetectionmonitor:
89 case TAS2770_RevisionandPGID:
90 return false;
91 }
92 return true;
93}
94
95#if 0
96static const struct regmap_range_cfg tas2770_ranges[] = {
97 {
98 .range_min = 0,
99 .range_max = 1 * 128,
100 .selector_reg = TAS2770_Page,
101 .selector_mask = 0xff,
102 .selector_shift = 0,
103 .window_start = 0,
104 .window_len = 128,
105 },
106};
107#endif
108
109static const struct regmap_config tas2770_i2c_regmap = {
110 .reg_bits = 8,
111 .val_bits = 8,
112 .writeable_reg = tas2770_writeable,
113 .volatile_reg = tas2770_volatile,
114 .reg_defaults = tas2770_reg_defaults,
115 .num_reg_defaults = ARRAY_SIZE(tas2770_reg_defaults),
116// .cache_type = REGCACHE_NONE,
117 .cache_type = REGCACHE_RBTREE,
118// .ranges = tas2770_ranges,
119// .num_ranges = ARRAY_SIZE(tas2770_ranges),
120 .max_register = 1 * 128,
121};
122
123
124static void tas2770_hw_reset(struct tas2770_priv *pTAS2770)
125{
126 if (gpio_is_valid(pTAS2770->mnResetGPIO)) {
127 gpio_direction_output(pTAS2770->mnResetGPIO, 0);
128 msleep(5);
129 gpio_direction_output(pTAS2770->mnResetGPIO, 1);
130 msleep(2);
131 }
132
133 pTAS2770->mnCurrentBook = -1;
134 pTAS2770->mnCurrentPage = -1;
135}
136
137void tas2770_clearIRQ(struct tas2770_priv *pTAS2770)
138{
139// unsigned int nValue;
140#if 0
141 int nResult = 0;
142
143 nResult = pTAS2770->read(pTAS2770, TAS2770_FLAGS_1, &nValue);
144 if (nResult >= 0)
145 pTAS2770->read(pTAS2770, TAS2770_FLAGS_2, &nValue);
146#endif
147}
148
149void tas2770_enableIRQ(struct tas2770_priv *pTAS2770, bool enable)
150{
151 if (enable) {
152 if (pTAS2770->mbIRQEnable)
153 return;
154
155 if (gpio_is_valid(pTAS2770->mnIRQGPIO))
156 enable_irq(pTAS2770->mnIRQ);
157
158 schedule_delayed_work(&pTAS2770->irq_work, msecs_to_jiffies(10));
159 pTAS2770->mbIRQEnable = true;
160 } else {
161 if (!pTAS2770->mbIRQEnable)
162 return;
163
164 if (gpio_is_valid(pTAS2770->mnIRQGPIO))
165 disable_irq_nosync(pTAS2770->mnIRQ);
166 pTAS2770->mbIRQEnable = false;
167 }
168}
169
170static void irq_work_routine(struct work_struct *work)
171{
172 struct tas2770_priv *pTAS2770 =
173 container_of(work, struct tas2770_priv, irq_work.work);
174// unsigned int nDevInt1Status = 0, nDevInt2Status = 0;
175// int nCounter = 2;
176// int nResult = 0;
177
178#ifdef CONFIG_TAS2770_CODEC
179 mutex_lock(&pTAS2770->codec_lock);
180#endif
181
182#ifdef CONFIG_TAS2770_MISC
183 mutex_lock(&pTAS2770->file_lock);
184#endif
185 if (pTAS2770->mbRuntimeSuspend) {
186 dev_info(pTAS2770->dev, "%s, Runtime Suspended\n", __func__);
187 goto end;
188 }
189
190 if (!pTAS2770->mbPowerUp) {
191 dev_info(pTAS2770->dev, "%s, device not powered\n", __func__);
192 goto end;
193 }
194
195#if 0
196 nResult = tas2770_dev_write(pTAS2770, TAS2770_INT_GEN_REG, 0x00);
197 if (nResult < 0)
198 goto reload;
199
200 nResult = tas2770_dev_read(pTAS2770, TAS2770_FLAGS_1, &nDevInt1Status);
201 if (nResult >= 0)
202 nResult = tas2770_dev_read(pTAS2770, TAS2770_FLAGS_2, &nDevInt2Status);
203 else
204 goto reload;
205
206 if (((nDevInt1Status & 0xfc) != 0) || ((nDevInt2Status & 0xc0) != 0)) {
207 /* in case of INT_OC, INT_UV, INT_OT, INT_BO, INT_CL, INT_CLK1, INT_CLK2 */
208 dev_dbg(pTAS2770->dev, "IRQ critical Error : 0x%x, 0x%x\n",
209 nDevInt1Status, nDevInt2Status);
210
211 if (nDevInt1Status & 0x80) {
212 pTAS2770->mnErrCode |= ERROR_OVER_CURRENT;
213 dev_err(pTAS2770->dev, "SPK over current!\n");
214 } else
215 pTAS2770->mnErrCode &= ~ERROR_OVER_CURRENT;
216
217 if (nDevInt1Status & 0x40) {
218 pTAS2770->mnErrCode |= ERROR_UNDER_VOLTAGE;
219 dev_err(pTAS2770->dev, "SPK under voltage!\n");
220 } else
221 pTAS2770->mnErrCode &= ~ERROR_UNDER_VOLTAGE;
222
223 if (nDevInt1Status & 0x20) {
224 pTAS2770->mnErrCode |= ERROR_CLK_HALT;
225 dev_err(pTAS2770->dev, "clk halted!\n");
226 } else
227 pTAS2770->mnErrCode &= ~ERROR_CLK_HALT;
228
229 if (nDevInt1Status & 0x10) {
230 pTAS2770->mnErrCode |= ERROR_DIE_OVERTEMP;
231 dev_err(pTAS2770->dev, "die over temperature!\n");
232 } else
233 pTAS2770->mnErrCode &= ~ERROR_DIE_OVERTEMP;
234
235 if (nDevInt1Status & 0x08) {
236 pTAS2770->mnErrCode |= ERROR_BROWNOUT;
237 dev_err(pTAS2770->dev, "brownout!\n");
238 } else
239 pTAS2770->mnErrCode &= ~ERROR_BROWNOUT;
240
241 if (nDevInt1Status & 0x04) {
242 pTAS2770->mnErrCode |= ERROR_CLK_LOST;
243 } else
244 pTAS2770->mnErrCode &= ~ERROR_CLK_LOST;
245
246 if (nDevInt2Status & 0x80) {
247 pTAS2770->mnErrCode |= ERROR_CLK_DET1;
248 dev_err(pTAS2770->dev, "clk detection 1!\n");
249 } else
250 pTAS2770->mnErrCode &= ~ERROR_CLK_DET1;
251
252 if (nDevInt2Status & 0x40) {
253 pTAS2770->mnErrCode |= ERROR_CLK_DET2;
254 dev_err(pTAS2770->dev, "clk detection 2!\n");
255 } else
256 pTAS2770->mnErrCode &= ~ERROR_CLK_DET2;
257
258 goto reload;
259 } else {
260 dev_dbg(pTAS2770->dev, "IRQ status : 0x%x, 0x%x\n",
261 nDevInt1Status, nDevInt2Status);
262 nCounter = 2;
263
264 while (nCounter > 0) {
265 nResult = tas2770_dev_read(pTAS2770, TAS2770_POWER_UP_FLAG_REG, &nDevInt1Status);
266 if (nResult < 0)
267 goto reload;
268
269 if ((nDevInt1Status & 0xc0) == 0xc0)
270 break;
271
272 nCounter--;
273 if (nCounter > 0) {
274 /* in case check pow status just after power on TAS2770 */
275 dev_dbg(pTAS2770->dev, "PowSts B: 0x%x, check again after 10ms\n",
276 nDevInt1Status);
277 msleep(10);
278 }
279 }
280
281 if ((nDevInt1Status & 0xc0) != 0xc0) {
282 dev_err(pTAS2770->dev, "%s, Critical ERROR B[%d]_P[%d]_R[%d]= 0x%x\n",
283 __func__,
284 TAS2770_BOOK_ID(TAS2770_POWER_UP_FLAG_REG),
285 TAS2770_PAGE_ID(TAS2770_POWER_UP_FLAG_REG),
286 TAS2770_PAGE_REG(TAS2770_POWER_UP_FLAG_REG),
287 nDevInt1Status);
288 pTAS2770->mnErrCode |= ERROR_CLASSD_PWR;
289 goto reload;
290 }
291 pTAS2770->mnErrCode &= ~ERROR_CLASSD_PWR;
292 }
293
294 nResult = tas2770_dev_write(pTAS2770, TAS2770_INT_GEN_REG, 0xff);
295 if (nResult < 0)
296 goto reload;
297
298 goto end;
299
300reload:
301 /* hardware reset and reload */
302 tas2770_LoadConfig(pTAS2770, true);
303#endif
304
305end:
306/*
307 if (!hrtimer_active(&pTAS2770->mtimer)) {
308 dev_dbg(pTAS2770->dev, "%s, start timer\n", __func__);
309 hrtimer_start(&pTAS2770->mtimer,
310 ns_to_ktime((u64)CHECK_PERIOD * NSEC_PER_MSEC), HRTIMER_MODE_REL);
311 }
312*/
313
314#ifdef CONFIG_TAS2770_MISC
315 mutex_unlock(&pTAS2770->file_lock);
316#endif
317
318#ifdef CONFIG_TAS2770_CODEC
319 mutex_unlock(&pTAS2770->codec_lock);
320#endif
321}
322
323static enum hrtimer_restart timer_func(struct hrtimer *timer)
324{
325 struct tas2770_priv *pTAS2770 = container_of(timer, struct tas2770_priv, mtimer);
326
327 if (pTAS2770->mbPowerUp) {
328 if (!delayed_work_pending(&pTAS2770->irq_work))
329 schedule_delayed_work(&pTAS2770->irq_work, msecs_to_jiffies(20));
330 }
331
332 return HRTIMER_NORESTART;
333}
334
335static irqreturn_t tas2770_irq_handler(int irq, void *dev_id)
336{
337 struct tas2770_priv *pTAS2770 = (struct tas2770_priv *)dev_id;
338
339 tas2770_enableIRQ(pTAS2770, false);
340
341 /* get IRQ status after 100 ms */
342 if (!delayed_work_pending(&pTAS2770->irq_work))
343 schedule_delayed_work(&pTAS2770->irq_work, msecs_to_jiffies(100));
344
345 return IRQ_HANDLED;
346}
347
348static int tas2770_runtime_suspend(struct tas2770_priv *pTAS2770)
349{
350 dev_dbg(pTAS2770->dev, "%s\n", __func__);
351
352 pTAS2770->mbRuntimeSuspend = true;
353
354 if (hrtimer_active(&pTAS2770->mtimer)) {
355 dev_dbg(pTAS2770->dev, "cancel die temp timer\n");
356 hrtimer_cancel(&pTAS2770->mtimer);
357 }
358
359 if (delayed_work_pending(&pTAS2770->irq_work)) {
360 dev_dbg(pTAS2770->dev, "cancel IRQ work\n");
361 cancel_delayed_work_sync(&pTAS2770->irq_work);
362 }
363
364 return 0;
365}
366
367static int tas2770_runtime_resume(struct tas2770_priv *pTAS2770)
368{
369 dev_dbg(pTAS2770->dev, "%s\n", __func__);
370
371 if (pTAS2770->mbPowerUp) {
372/* if (!hrtimer_active(&pTAS2770->mtimer)) {
373 dev_dbg(pTAS2770->dev, "%s, start check timer\n", __func__);
374 hrtimer_start(&pTAS2770->mtimer,
375 ns_to_ktime((u64)CHECK_PERIOD * NSEC_PER_MSEC), HRTIMER_MODE_REL);
376 }
377*/
378 }
379
380 pTAS2770->mbRuntimeSuspend = false;
381
382 return 0;
383}
384
385int tas2770_parse_dt(struct device *dev, struct tas2770_priv *pTAS2770)
386{
387 struct device_node *np = dev->of_node;
388 int rc = 0, ret = 0;
389
390 rc = of_property_read_u32(np, "ti,asi-format", &pTAS2770->mnASIFormat);
391 if (rc) {
392 dev_err(pTAS2770->dev, "Looking up %s property in node %s failed %d\n",
393 "ti,asi-format", np->full_name, rc);
394 } else {
395 dev_dbg(pTAS2770->dev, "ti,asi-format=%d", pTAS2770->mnASIFormat);
396 }
397
398 pTAS2770->mnResetGPIO = of_get_named_gpio(np, "ti,reset-gpio", 0);
399 if (!gpio_is_valid(pTAS2770->mnResetGPIO)) {
400 dev_err(pTAS2770->dev, "Looking up %s property in node %s failed %d\n",
401 "ti,reset-gpio", np->full_name, pTAS2770->mnResetGPIO);
402 } else {
403 dev_dbg(pTAS2770->dev, "ti,reset-gpio=%d", pTAS2770->mnResetGPIO);
404 }
405
406 pTAS2770->mnIRQGPIO = of_get_named_gpio(np, "ti,irq-gpio", 0);
407 if (!gpio_is_valid(pTAS2770->mnIRQGPIO)) {
408 dev_err(pTAS2770->dev, "Looking up %s property in node %s failed %d\n",
409 "ti,irq-gpio", np->full_name, pTAS2770->mnIRQGPIO);
410 } else {
411 dev_dbg(pTAS2770->dev, "ti,irq-gpio=%d", pTAS2770->mnIRQGPIO);
412 }
413
414 return ret;
415}
416
417static int tas2770_i2c_probe(struct i2c_client *client,
418 const struct i2c_device_id *id)
419{
420 struct tas2770_priv *pTAS2770;
421 int nResult;
422
423 dev_info(&client->dev, "%s enter\n", __func__);
424
425 pTAS2770 = devm_kzalloc(&client->dev, sizeof(struct tas2770_priv), GFP_KERNEL);
426 if (pTAS2770 == NULL) {
427 dev_err(&client->dev, "%s, -ENOMEM \n", __func__);
428 nResult = -ENOMEM;
429 goto end;
430 }
431
432 pTAS2770->dev = &client->dev;
433 i2c_set_clientdata(client, pTAS2770);
434 dev_set_drvdata(&client->dev, pTAS2770);
435
436 pTAS2770->regmap = devm_regmap_init_i2c(client, &tas2770_i2c_regmap);
437 if (IS_ERR(pTAS2770->regmap)) {
438 nResult = PTR_ERR(pTAS2770->regmap);
439 dev_err(&client->dev, "Failed to allocate register map: %d\n",
440 nResult);
441 goto end;
442 }
443
444//TODO
445 if (client->dev.of_node)
446 tas2770_parse_dt(&client->dev, pTAS2770);
447
448 if (gpio_is_valid(pTAS2770->mnResetGPIO)) {
449 nResult = gpio_request(pTAS2770->mnResetGPIO, "TAS2770_RESET");
450 if (nResult) {
451 dev_err(pTAS2770->dev, "%s: Failed to request gpio %d\n", __func__,
452 pTAS2770->mnResetGPIO);
453 nResult = -EINVAL;
454 goto free_gpio;
455 }
456 }
457
458 if (gpio_is_valid(pTAS2770->mnIRQGPIO)) {
459 nResult = gpio_request(pTAS2770->mnIRQGPIO, "TAS2770-IRQ");
460 if (nResult < 0) {
461 dev_err(pTAS2770->dev, "%s: GPIO %d request error\n",
462 __func__, pTAS2770->mnIRQGPIO);
463 goto free_gpio;
464 }
465 gpio_direction_input(pTAS2770->mnIRQGPIO);
466 pTAS2770->mnIRQ = gpio_to_irq(pTAS2770->mnIRQGPIO);
467 dev_dbg(pTAS2770->dev, "irq = %d\n", pTAS2770->mnIRQ);
468 nResult = request_threaded_irq(pTAS2770->mnIRQ, tas2770_irq_handler,
469 NULL, IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
470 client->name, pTAS2770);
471 if (nResult < 0) {
472 dev_err(pTAS2770->dev,
473 "request_irq failed, %d\n", nResult);
474 goto free_gpio;
475 }
476 disable_irq_nosync(pTAS2770->mnIRQ);
477 INIT_DELAYED_WORK(&pTAS2770->irq_work, irq_work_routine);
478 }
479
480 pTAS2770->hw_reset = tas2770_hw_reset;
481 pTAS2770->enableIRQ = tas2770_enableIRQ;
482 pTAS2770->clearIRQ = tas2770_clearIRQ;
483 pTAS2770->runtime_suspend = tas2770_runtime_suspend;
484 pTAS2770->runtime_resume = tas2770_runtime_resume;
485 mutex_init(&pTAS2770->dev_lock);
486
487// nResult = tas2770_LoadConfig(pTAS2770, false);
488 if (nResult < 0)
489 goto destroy_mutex;
490
491#ifdef CONFIG_TAS2770_CODEC
492 mutex_init(&pTAS2770->codec_lock);
493 tas2770_register_codec(pTAS2770);
494#endif
495
496#ifdef CONFIG_TAS2770_MISC
497// mutex_init(&pTAS2770->file_lock);
498// tas2770_register_misc(pTAS2770);
499#endif
500
501 hrtimer_init(&pTAS2770->mtimer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
502 pTAS2770->mtimer.function = timer_func;
503
504destroy_mutex:
505 if (nResult < 0)
506 mutex_destroy(&pTAS2770->dev_lock);
507
508free_gpio:
509 if (nResult < 0) {
510 if (gpio_is_valid(pTAS2770->mnResetGPIO))
511 gpio_free(pTAS2770->mnResetGPIO);
512 if (gpio_is_valid(pTAS2770->mnIRQGPIO))
513 gpio_free(pTAS2770->mnIRQGPIO);
514 }
515
516end:
517 return nResult;
518}
519
520static int tas2770_i2c_remove(struct i2c_client *client)
521{
522 struct tas2770_priv *pTAS2770 = i2c_get_clientdata(client);
523
524 dev_info(pTAS2770->dev, "%s\n", __func__);
525
526#ifdef CONFIG_TAS2770_CODEC
527 tas2770_deregister_codec(pTAS2770);
528 mutex_destroy(&pTAS2770->codec_lock);
529#endif
530
531#ifdef CONFIG_TAS2770_MISC
532// tas2770_deregister_misc(pTAS2770);
533 mutex_destroy(&pTAS2770->file_lock);
534#endif
535
536 if (gpio_is_valid(pTAS2770->mnResetGPIO))
537 gpio_free(pTAS2770->mnResetGPIO);
538 if (gpio_is_valid(pTAS2770->mnIRQGPIO))
539 gpio_free(pTAS2770->mnIRQGPIO);
540
541 return 0;
542}
543
544
545static const struct i2c_device_id tas2770_i2c_id[] = {
546 { "tas2770", 0},
547 { }
548};
549MODULE_DEVICE_TABLE(i2c, tas2770_i2c_id);
550
551#if defined(CONFIG_OF)
552static const struct of_device_id tas2770_of_match[] = {
553 { .compatible = "ti,tas2770" },
554 {},
555};
556MODULE_DEVICE_TABLE(of, tas2770_of_match);
557#endif
558
559
560static struct i2c_driver tas2770_i2c_driver = {
561 .driver = {
562 .name = "tas2770",
563 .owner = THIS_MODULE,
564#if defined(CONFIG_OF)
565 .of_match_table = of_match_ptr(tas2770_of_match),
566#endif
567 },
568 .probe = tas2770_i2c_probe,
569 .remove = tas2770_i2c_remove,
570 .id_table = tas2770_i2c_id,
571};
572
573module_i2c_driver(tas2770_i2c_driver);
574
575MODULE_AUTHOR("Texas Instruments Inc.");
576MODULE_DESCRIPTION("TAS2770 I2C Smart Amplifier driver");
577MODULE_LICENSE("GPL v2");
578#endif
diff --git a/tas2770.h b/tas2770.h
new file mode 100644
index 0000000..a55095c
--- /dev/null
+++ b/tas2770.h
@@ -0,0 +1,742 @@
1
2#ifndef __TAS2770_
3#define __TAS2770_
4
5
6/* Book Control Register (available in page0 of each book) */
7#define TAS2770_BOOKCTL_PAGE 0
8#define TAS2770_BOOKCTL_REG 127
9
10
11#define TAS2770_REG(page, reg) ((page * 128) + reg)
12
13 // Page
14#define TAS2770_Page TAS2770_REG(0X0, 0x00)
15#define TAS2770_Page_Page_Mask (0xff << 0)
16
17 // Software Reset
18#define TAS2770_SoftwareReset TAS2770_REG(0X0, 0x01)
19#define TAS2770_SoftwareReset_SoftwareReset_Mask (0x1 << 0),
20#define TAS2770_SoftwareReset_SoftwareReset_DontReset (0x0 << 0)
21#define TAS2770_SoftwareReset_SoftwareReset_Reset (0x1 << 0)
22
23 // Power Control
24#define TAS2770_PowerControl TAS2770_REG(0X0, 0x02)
25#define TAS2770_PowerControl_ISNSPower_Mask (0x1 << 3)
26#define TAS2770_PowerControl_ISNSPower_Active (0x0 << 3)
27#define TAS2770_PowerControl_ISNSPower_PoweredDown (0x1 << 3),
28#define TAS2770_PowerControl_VSNSPower_Mask (0x1 << 2)
29#define TAS2770_PowerControl_VSNSPower_Active (0x0 << 2)
30#define TAS2770_PowerControl_VSNSPower_PoweredDown (0x1 << 2)
31#define TAS2770_PowerControl_OperationalMode10_Mask (0x3 << 0)
32#define TAS2770_PowerControl_OperationalMode10_Active (0x0 << 0)
33#define TAS2770_PowerControl_OperationalMode10_Mute (0x1 << 0)
34#define TAS2770_PowerControl_OperationalMode10_Shutdown (0x2 << 0)
35
36 //data format
37#define TAS2770_DATAFORMAT_SHIFT 2
38#define TAS2770_DATAFORMAT_I2S 0x0
39#define TAS2770_DATAFORMAT_DSP 0x1
40#define TAS2770_DATAFORMAT_RIGHT_J 0x2
41#define TAS2770_DATAFORMAT_LEFT_J 0x3
42
43#define TAS2770_DAI_FMT_MASK (0x7 << TAS2770_DATAFORMAT_SHIFT)
44
45 // Playback Configuration Reg0
46#define TAS2770_PlaybackConfigurationReg0 TAS2770_REG(0X0, 0x03)
47#define TAS2770_PlaybackConfigurationReg0_PDMPinMapping_Mask (0x1 << 7)
48#define TAS2770_PlaybackConfigurationReg0_PDMPinMapping_Pdm0 (0x0 << 7)
49#define TAS2770_PlaybackConfigurationReg0_PDMPinMapping_Pdm1 (0x1 << 7)
50#define TAS2770_PlaybackConfigurationReg0_PlaybackPDMSource_Mask (0x1 << 6)
51#define TAS2770_PlaybackConfigurationReg0_PlaybackSource_Mask (0x1 << 5)
52#define TAS2770_PlaybackConfigurationReg0_PlaybackSource_Pcm (0x0 << 5)
53#define TAS2770_PlaybackConfigurationReg0_PlaybackSource_Pdm (0x1 << 5)
54#define TAS2770_PlaybackConfigurationReg0_AmplifierLevel40_Mask (0x1f << 0)
55
56 // Playback Configuration Reg1
57#define TAS2770_PlaybackConfigurationReg1 TAS2770_REG(0X0, 0x04)
58#define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_Mask (0x7 << 0)
59#define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_2 (0x1 << 0)
60#define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_50 (0x2 << 0)
61#define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_100 (0x3 << 0)
62#define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_200 (0x4 << 0)
63#define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_400 (0x5 << 0)
64#define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_800 (0x6 << 0)
65#define TAS2770_PlaybackConfigurationReg1_HPFFrequency20_Bypass (0x0 << 0)
66
67 // Playback Configuration Reg2
68#define TAS2770_PlaybackConfigurationReg2 TAS2770_REG(0X0, 0x05)
69#define TAS2770_PlaybackConfigurationReg2_DVCPCM70_Mask (0xff << 0)
70
71 // Playback Configuration Reg3
72#define TAS2770_PlaybackConfigurationReg3 TAS2770_REG(0X0, 0x06)
73#define TAS2770_PlaybackConfigurationReg3_DVCPDM70_Mask (0xff << 0)
74
75 // Misc Configuration Reg0
76#define TAS2770_MiscConfigurationReg0 TAS2770_REG(0X0, 0x07)
77#define TAS2770_MiscConfigurationReg0_DVCRampRate76_Mask (0x3 << 6)
78#define TAS2770_MiscConfigurationReg0_DVCRampRate76_0_5dbPer1Sample (0x0 << 6)
79#define TAS2770_MiscConfigurationReg0_DVCRampRate76_0_5dbPer4Sample (0x1 << 6)
80#define TAS2770_MiscConfigurationReg0_DVCRampRate76_0_5dbPer8Sample (0x2 << 6)
81#define TAS2770_MiscConfigurationReg0_DVCRampRate76_VolRampDisabled (0x3 << 6)
82#define TAS2770_MiscConfigurationReg0_OCERetry_Mask (0x1 << 5)
83#define TAS2770_MiscConfigurationReg0_OCERetry_DoNotRetry (0x0 << 5)
84#define TAS2770_MiscConfigurationReg0_OCERetry_Retry (0x1 << 5)
85#define TAS2770_MiscConfigurationReg0_OTERetry_Mask (0x1 << 4)
86#define TAS2770_MiscConfigurationReg0_OTERetry_DoNotRetry (0x0 << 4)
87#define TAS2770_MiscConfigurationReg0_OTERetry_Retry (0x1 << 4)
88#define TAS2770_MiscConfigurationReg0_IRQZPull_Mask (0x1 << 3)
89#define TAS2770_MiscConfigurationReg0_IRQZPull_Disabled (0x0 << 3)
90#define TAS2770_MiscConfigurationReg0_IRQZPull_Enabled (0x1 << 3)
91#define TAS2770_MiscConfigurationReg0_AMPSS_Mask (0x1 << 2)
92#define TAS2770_MiscConfigurationReg0_AMPSS_Disabled (0x0 << 2)
93#define TAS2770_MiscConfigurationReg0_AMPSS_Enabled (0x1 << 2)
94
95 // PDM Input Reg0
96#define TAS2770_PDMInputReg0 TAS2770_REG(0X0, 0x08)
97#define TAS2770_PDMInputReg0_ClassDSYNC_Mask (0x1 << 6)
98#define TAS2770_PDMInputReg0_ClassDSYNC_AsyncMode (0x0 << 6)
99#define TAS2770_PDMInputReg0_ClassDSYNC_Retry (0x1 << 6),
100#define TAS2770_PDMInputReg0_PDMRATESW54_Mask (0x3 << 4)
101#define TAS2770_PDMInputReg0_PDMRATED132_Mask (0x3 << 2)
102#define TAS2770_PDMInputReg0_PDMRATED132_2_543_38MHz (0x0 << 2)
103#define TAS2770_PDMInputReg0_PDMRATED132_5_086_76MHz (0x1 << 2)
104#define TAS2770_PDMInputReg0_PDMRATED010_Mask (0x3 << 0)
105#define TAS2770_PDMInputReg0_PDMRATED010_2_543_38MHz (0x0 << 0)
106#define TAS2770_PDMInputReg0_PDMRATED010_5_086_76MHz (0x1 << 0)
107
108 // PDM Configuration Reg1
109#define TAS2770_PDMConfigurationReg1 TAS2770_REG(0X0, 0x09)
110#define TAS2770_PDMConfigurationReg1_PDMEDGED1_Mask (0x1 << 7)
111#define TAS2770_PDMConfigurationReg1_PDMEDGED1_Rising (0x0 << 7)
112#define TAS2770_PDMConfigurationReg1_PDMEDGED1_Falling (0x1 << 7)
113#define TAS2770_PDMConfigurationReg1_PDMEDGED0_Mask (0x1 << 6)
114#define TAS2770_PDMConfigurationReg1_PDMEDGED0_Rising (0x0 << 6)
115#define TAS2770_PDMConfigurationReg1_PDMEDGED0_Falling (0x1 << 6)
116#define TAS2770_PDMConfigurationReg1_PDMSLVD1_Mask (0x1 << 5)
117#define TAS2770_PDMConfigurationReg1_PDMSLVD1_Slave (0x0 << 5)
118#define TAS2770_PDMConfigurationReg1_PDMSLVD1_Master (0x1 << 5)
119#define TAS2770_PDMConfigurationReg1_PDMSLVD0_Mask (0x1 << 4)
120#define TAS2770_PDMConfigurationReg1_PDMSLVD0_Slave (0x0 << 4)
121#define TAS2770_PDMConfigurationReg1_PDMSLVD0_Master (0x1 << 4)
122#define TAS2770_PDMConfigurationReg1_PDMCLKD1_Mask (0x1 << 3)
123#define TAS2770_PDMConfigurationReg1_PDMCLKD1_Pdmck0 (0x0 << 3)
124#define TAS2770_PDMConfigurationReg1_PDMCLKD1_Pdmck1 (0x1 << 3)
125#define TAS2770_PDMConfigurationReg1_PDMCLKD0_Mask (0x1 << 2)
126#define TAS2770_PDMConfigurationReg1_PDMCLKD0_Pdmck0 (0x0 << 2)
127#define TAS2770_PDMConfigurationReg1_PDMCLKD0_Pdmck1 (0x1 << 2)
128#define TAS2770_PDMConfigurationReg1_PDMGATED1_Mask (0x1 << 1)
129#define TAS2770_PDMConfigurationReg1_PDMGATED1_GatedOff (0x0 << 1)
130#define TAS2770_PDMConfigurationReg1_PDMGATED1_Active (0x1 << 1)
131#define TAS2770_PDMConfigurationReg1_PDMGATED0_Mask (0x1 << 0)
132#define TAS2770_PDMConfigurationReg1_PDMGATED0_GatedOff (0x0 << 0)
133#define TAS2770_PDMConfigurationReg1_PDMGATED0_Active (0x1 << 0)
134
135 // TDM Configuration Reg0
136#define TAS2770_TDMConfigurationReg0 TAS2770_REG(0X0, 0x0A)
137#define TAS2770_TDMConfigurationReg0_SAMPRATERAMP_Mask (0x1 << 5)
138#define TAS2770_TDMConfigurationReg0_SAMPRATERAMP_48KHz (0x0 << 5)
139#define TAS2770_TDMConfigurationReg0_SAMPRATERAMP_44_1KHz (0x1 << 5)
140#define TAS2770_TDMConfigurationReg0_DETECTSAMPRATE_Mask (0x1 << 4)
141#define TAS2770_TDMConfigurationReg0_DETECTSAMPRATE_Disabled (0x1 << 4)
142#define TAS2770_TDMConfigurationReg0_DETECTSAMPRATE_Enabled (0x0 << 4)
143#define TAS2770_TDMConfigurationReg0_SAMPRATE31_Mask (0x7 << 1)
144#define TAS2770_TDMConfigurationReg0_SAMPRATE31_44_1_48kHz (0x3 << 1)
145#define TAS2770_TDMConfigurationReg0_SAMPRATE31_88_2_96kHz (0x4 << 1)
146#define TAS2770_TDMConfigurationReg0_SAMPRATE31_176_4_192kHz (0x5 << 1)
147#define TAS2770_TDMConfigurationReg0_FRAMESTART_Mask (0x1 << 0)
148#define TAS2770_TDMConfigurationReg0_FRAMESTART_LowToHigh (0x0 << 0)
149#define TAS2770_TDMConfigurationReg0_FRAMESTART_HighToLow (0x1 << 0)
150
151 // TDM Configuration Reg1
152#define TAS2770_TDMConfigurationReg1 TAS2770_REG(0X0, 0x0B)
153#define TAS2770_TDMConfigurationReg1_RXJUSTIFY_Mask (0x1 << 6)
154#define TAS2770_TDMConfigurationReg1_RXJUSTIFY_Left (0x0 << 6)
155#define TAS2770_TDMConfigurationReg1_RXJUSTIFY_Right (0x1 << 6)
156#define TAS2770_TDMConfigurationReg1_RXOFFSET51_Mask (0x1f << 1)
157#define TAS2770_TDMConfigurationReg1_RXOFFSET51_Shift (1)
158#define TAS2770_TDMConfigurationReg1_RXEDGE_Mask (0x1 << 0)
159#define TAS2770_TDMConfigurationReg1_RXEDGE_Rising (0x0 << 0)
160#define TAS2770_TDMConfigurationReg1_RXEDGE_Falling (0x1 << 0)
161
162 // TDM Configuration Reg2
163#define TAS2770_TDMConfigurationReg2 TAS2770_REG(0X0, 0x0C)
164#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mask (0x3 << 4)
165#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_I2C (0x0 << 4),
166#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_Left (0x1 << 4),
167#define TAS2770_TDMConfigurationReg2_RXSCFG54_Mono_Right (0x2 << 4)
168#define TAS2770_TDMConfigurationReg2_RXSCFG54_Stereo_DownMix (0x3 << 4)
169#define TAS2770_TDMConfigurationReg2_RXWLEN32_Mask (0x3 << 2)
170#define TAS2770_TDMConfigurationReg2_RXWLEN32_16Bits (0x0 << 2)
171#define TAS2770_TDMConfigurationReg2_RXWLEN32_20Bits (0x1 << 2)
172#define TAS2770_TDMConfigurationReg2_RXWLEN32_24Bits (0x2 << 2)
173#define TAS2770_TDMConfigurationReg2_RXWLEN32_32Bits (0x3 << 2)
174#define TAS2770_TDMConfigurationReg2_RXSLEN10_Mask (0x3 << 0)
175#define TAS2770_TDMConfigurationReg2_RXSLEN10_16Bits (0x0 << 0)
176#define TAS2770_TDMConfigurationReg2_RXSLEN10_24Bits (0x1 << 0)
177#define TAS2770_TDMConfigurationReg2_RXSLEN10_32Bits (0x2 << 0)
178
179 // TDM Configuration Reg3
180#define TAS2770_TDMConfigurationReg3 TAS2770_REG(0X0, 0x0D)
181#define TAS2770_TDMConfigurationReg3_RXSLOTRight74_Mask (0xf << 4)
182#define TAS2770_TDMConfigurationReg3_RXSLOTLeft30_Mask (0xf << 0)
183
184 // TDM Configuration Reg4
185#define TAS2770_TDMConfigurationReg4 TAS2770_REG(0X0, 0x0E)
186#define TAS2770_TDMConfigurationReg4_TXKEEPER_Mask (0x1 << 5)
187#define TAS2770_TDMConfigurationReg4_TXKEEPER_Disable (0x0 << 5)
188#define TAS2770_TDMConfigurationReg4_TXKEEPER_Enable (0x1 << 5)
189#define TAS2770_TDMConfigurationReg4_TXFILL_Mask (0x1 << 4)
190#define TAS2770_TDMConfigurationReg4_TXFILL_Transmit0 (0x0 << 4)
191#define TAS2770_TDMConfigurationReg4_TXFILL_TransmitHiz (0x1 << 4)
192#define TAS2770_TDMConfigurationReg4_TXOFFSET31_Mask (0x7 << 1)
193#define TAS2770_TDMConfigurationReg4_TXEDGE_Mask (0x1 << 0)
194#define TAS2770_TDMConfigurationReg4_TXEDGE_Rising (0x0 << 0)
195#define TAS2770_TDMConfigurationReg4_TXEDGE_Falling (0x1 << 0)
196
197 // TDM Configuration Reg5
198#define TAS2770_TDMConfigurationReg5 TAS2770_REG(0X0, 0x0F)
199#define TAS2770_TDMConfigurationReg5_VSNSTX_Mask (0x1 << 6)
200#define TAS2770_TDMConfigurationReg5_VSNSTX_Disable (0x0 << 6),
201#define TAS2770_TDMConfigurationReg5_VSNSTX_Enable (0x1 << 6),
202#define TAS2770_TDMConfigurationReg5_VSNSSLOT50_Mask (0x3f << 0)
203
204 // TDM Configuration Reg6
205#define TAS2770_TDMConfigurationReg6 TAS2770_REG(0X0, 0x10)
206#define TAS2770_TDMConfigurationReg6_ISNSTX_Mask (0x1 << 6)
207#define TAS2770_TDMConfigurationReg6_ISNSTX_Disable (0x0 << 6),
208#define TAS2770_TDMConfigurationReg6_ISNSTX_Enable (0x1 << 6),
209#define TAS2770_TDMConfigurationReg6_ISNSSLOT50_Mask (0x3f << 0)
210
211 // TDM Configuration Reg7
212#define TAS2770_TDMConfigurationReg7 TAS2770_REG(0X0, 0x11)
213#define TAS2770_TDMConfigurationReg7_PDMTX_Mask (0x1 << 6)
214#define TAS2770_TDMConfigurationReg7_PDMTX_Disable (0x0 << 6)
215#define TAS2770_TDMConfigurationReg7_PDMTX_Enable (0x1 << 6)
216#define TAS2770_TDMConfigurationReg7_PDMSLOT50_Mask (0x3f << 0)
217
218 // TDM Configuration Reg8
219#define TAS2770_TDMConfigurationReg8 TAS2770_REG(0X0, 0x12)
220#define TAS2770_TDMConfigurationReg8_VBATSLEN_Mask (0x1 << 7)
221#define TAS2770_TDMConfigurationReg8_VBATSLEN_8Bits (0x0 << 7)
222#define TAS2770_TDMConfigurationReg8_VBATSLEN_16Bits (0x1 << 7)
223#define TAS2770_TDMConfigurationReg8_VBATTX_Mask (0x1 << 6)
224#define TAS2770_TDMConfigurationReg8_VBATTX_Disable (0x0 << 6)
225#define TAS2770_TDMConfigurationReg8_VBATTX_Enable (0x1 << 6)
226#define TAS2770_TDMConfigurationReg8_VBATSLOT50_Mask (0x3f << 0)
227
228 // TDM Configuration Reg9
229#define TAS2770_TDMConfigurationReg9 TAS2770_REG(0X0, 0x13)
230#define TAS2770_TDMConfigurationReg9_TEMPTX_Mask (0x1 << 6)
231#define TAS2770_TDMConfigurationReg9_TEMPTX_Disable (0x0 << 6)
232#define TAS2770_TDMConfigurationReg9_TEMPTX_Enable (0x1 << 6)
233#define TAS2770_TDMConfigurationReg9_TEMPSLOT50_Mask (0x3f << 0)
234
235 // TDM Configuration Reg10
236#define TAS2770_TDMConfigurationReg10 TAS2770_REG(0X0, 0x14)
237#define TAS2770_TDMConfigurationReg10_GAINTX_Mask (0x1 << 6)
238#define TAS2770_TDMConfigurationReg10_GAINTX_Disable (0x0 << 6)
239#define TAS2770_TDMConfigurationReg10_GAINTX_Enable (0x1 << 6)
240#define TAS2770_TDMConfigurationReg10_GAINSLOT50_Mask (0x3f << 0)
241
242 // Limiter Configuration Reg0
243#define TAS2770_LimiterConfigurationReg0 TAS2770_REG(0X0, 0x15)
244#define TAS2770_LimiterConfigurationReg0_LIMATKST54_Mask (0x3 << 4)
245#define TAS2770_LimiterConfigurationReg0_LIMATKST54_1 (0x2 << 4)
246#define TAS2770_LimiterConfigurationReg0_LIMATKST54_2 (0x3 << 4)
247#define TAS2770_LimiterConfigurationReg0_LIMATKST54_0_25 (0x0 << 4)
248#define TAS2770_LimiterConfigurationReg0_LIMATKST54_0_5 (0x1 << 4)
249#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_Mask (0x7 << 1)
250#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_5 (0x0 << 1)
251#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_10 (0x1 << 1)
252#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_20 (0x2 << 1)
253#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_40 (0x3 << 1)
254#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_80 (0x4 << 1)
255#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_160 (0x5 << 1)
256#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_320 (0x6 << 1)
257#define TAS2770_LimiterConfigurationReg0_LIMATKRT31_640 (0x7 << 1)
258#define TAS2770_LimiterConfigurationReg0_LIMEN_Mask (0x1 << 0)
259#define TAS2770_LimiterConfigurationReg0_LIMEN_Disabled (0x0 << 0)
260#define TAS2770_LimiterConfigurationReg0_LIMEN_Enabled (0x1 << 0)
261
262 // Limiter Configuration Reg1
263#define TAS2770_LimiterConfigurationReg1 TAS2770_REG(0X0, 0x16)
264#define TAS2770_LimiterConfigurationReg1_LIMRLSST76_Mask (0x3 << 6)
265#define TAS2770_LimiterConfigurationReg1_LIMRLSST76_1 (0x2 << 6)
266#define TAS2770_LimiterConfigurationReg1_LIMRLSST76_2 (0x3 << 6)
267#define TAS2770_LimiterConfigurationReg1_LIMRLSST76_0_25 (0x0 << 6)
268#define TAS2770_LimiterConfigurationReg1_LIMRLSST76_0_5 (0x1 << 6)
269#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_Mask (0x7 << 3)
270#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_10 (0x0 << 3)
271#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_50 (0x1 << 3)
272#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_100 (0x2 << 3)
273#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_250 (0x3 << 3)
274#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_500 (0x4 << 3)
275#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_750 (0x5 << 3)
276#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_1000 (0x6 << 3)
277#define TAS2770_LimiterConfigurationReg1_LIMRLSRT53_1500 (0x7 << 3)
278#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_Mask (0x7 << 0)
279#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_0 (0x0 << 0)
280#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_10 (0x1 << 0)
281#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_25 (0x2 << 0)
282#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_50 (0x3 << 0)
283#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_100 (0x4 << 0)
284#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_250 (0x5 << 0)
285#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_500 (0x6 << 0)
286#define TAS2770_LimiterConfigurationReg1_LIMHLDTM20_1000 (0x7 << 0)
287
288 // Limiter Configuration Reg2
289#define TAS2770_LimiterConfigurationReg2 TAS2770_REG(0X0, 0x17)
290#define TAS2770_LimiterConfigurationReg2_LIMMAXATN40_Mask (0x1f << 0)
291
292 // Limiter Configuration Reg3
293#define TAS2770_LimiterConfigurationReg3 TAS2770_REG(0X0, 0x18)
294#define TAS2770_LimiterConfigurationReg3_LIMTHMAX60_Mask (0x7f << 0)
295
296 // Limiter Configuration Reg4
297#define TAS2770_LimiterConfigurationReg4 TAS2770_REG(0X0, 0x19)
298#define TAS2770_LimiterConfigurationReg4_LIMTHMIN60_Mask (0x7f << 0)
299
300 // Limiter Configuration Reg5
301#define TAS2770_LimiterConfigurationReg5 TAS2770_REG(0X0, 0x1A)
302#define TAS2770_LimiterConfigurationReg5_LIMINFPOINT_Mask (0x7f << 0)
303
304 // Brown Out Prevention Reg0
305#define TAS2770_BrownOutPreventionReg0 TAS2770_REG(0X0, 0x1B)
306#define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_Mask (0x3 << 4)
307#define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_1 (0x0 << 4)
308#define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_2 (0x2 << 4)
309#define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_4 (0x3 << 4)
310#define TAS2770_BrownOutPreventionReg0_LIMSLOPE54_1_5 (0x1 << 4)
311#define TAS2770_BrownOutPreventionReg0_BOPHLDCLR_Mask (0x1 << 3)
312#define TAS2770_BrownOutPreventionReg0_BOPHLDCLR_DontClear (0x0 << 3)
313#define TAS2770_BrownOutPreventionReg0_BOPHLDCLR_Clear (0x1 << 3)
314#define TAS2770_BrownOutPreventionReg0_BOPINFHLD_Mask (0x1 << 2)
315#define TAS2770_BrownOutPreventionReg0_BOPINFHLD_UseHoldTime (0x0 << 2)
316#define TAS2770_BrownOutPreventionReg0_BOPINFHLD_HoldUntilCleared (0x1 << 2)
317#define TAS2770_BrownOutPreventionReg0_BOPMUTE_Mask (0x1 << 1)
318#define TAS2770_BrownOutPreventionReg0_BOPMUTE_DoNotMute (0x0 << 1)
319#define TAS2770_BrownOutPreventionReg0_BOPMUTE_Mute (0x1 << 1)
320#define TAS2770_BrownOutPreventionReg0_BOPEN_Mask (0x1 << 0)
321#define TAS2770_BrownOutPreventionReg0_BOPEN_Disabled (0x0 << 0)
322#define TAS2770_BrownOutPreventionReg0_BOPEN_Enabled (0x1 << 0)
323
324 // Brown Out Prevention Reg1
325#define TAS2770_BrownOutPreventionReg1 TAS2770_REG(0X0, 0x1C)
326#define TAS2770_BrownOutPreventionReg1_BOPTH70_Mask (0xff << 0)
327
328 // Brown Out Prevention Reg2
329#define TAS2770_BrownOutPreventionReg2 TAS2770_REG(0X0, 0x1D)
330#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_Mask (0x7 << 5)
331#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_5 (0x0 << 5)
332#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_10 (0x1 << 5)
333#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_20 (0x2 << 5)
334#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_40 (0x3 << 5)
335#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_80 (0x4 << 5)
336#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_160 (0x5 << 5)
337#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_320 (0x6 << 5)
338#define TAS2770_BrownOutPreventionReg2_BOPATKRT75_640 (0x7 << 5)
339#define TAS2770_BrownOutPreventionReg2_BOPATKST43_Mask (0x3 << 3)
340#define TAS2770_BrownOutPreventionReg2_BOPATKST43_1 (0x1 << 3)
341#define TAS2770_BrownOutPreventionReg2_BOPATKST43_2 (0x3 << 3)
342#define TAS2770_BrownOutPreventionReg2_BOPATKST43_0_5 (0x0 << 3)
343#define TAS2770_BrownOutPreventionReg2_BOPATKST43_1_5 (0x2 << 3)
344#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_Mask (0x7 << 0)
345#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_0 (0x0 << 0)
346#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_10 (0x1 << 0)
347#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_25 (0x2 << 0)
348#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_50 (0x3 << 0)
349#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_100 (0x4 << 0)
350#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_250 (0x5 << 0)
351#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_500 (0x6 << 0)
352#define TAS2770_BrownOutPreventionReg2_BOPHLDTM20_1000 (0x7 << 0)
353
354 // ICLA Reg0
355#define TAS2770_ICLAReg0 TAS2770_REG(0X0, 0x1E)
356#define TAS2770_ICLAReg0_ICLAUSEMAX_Mask (0x1 << 7)
357#define TAS2770_ICLAReg0_ICLAUSEMAX_Min (0x0 << 7)
358#define TAS2770_ICLAReg0_ICLAUSEMAX_Max (0x1 << 7)
359#define TAS2770_ICLAReg0_ICLASLOT61_Mask (0x3f << 1)
360#define TAS2770_ICLAReg0_ICLAEN_Mask (0x1 << 0)
361#define TAS2770_ICLAReg0_ICLAEN_Disabled (0x0 << 0)
362#define TAS2770_ICLAReg0_ICLAEN_Enabled (0x1 << 0)
363
364 // ICLA Reg1
365#define TAS2770_ICLAReg1 TAS2770_REG(0X0, 0x1F)
366#define TAS2770_ICLAReg1_ICLASEN_Mask (0xff << 0)
367#define TAS2770_ICLAReg1_ICLASLOT_7_Disable (0x0 << 7)
368#define TAS2770_ICLAReg1_ICLASLOT_7_Enable (0x1 << 7)
369#define TAS2770_ICLAReg1_ICLASLOT_6_Disable (0x0 << 6)
370#define TAS2770_ICLAReg1_ICLASLOT_6_Enable (0x1 << 6)
371#define TAS2770_ICLAReg1_ICLASLOT_5_Disable (0x0 << 5)
372#define TAS2770_ICLAReg1_ICLASLOT_5_Enable (0x1 << 5)
373#define TAS2770_ICLAReg1_ICLASLOT_4_Disable (0x0 << 4)
374#define TAS2770_ICLAReg1_ICLASLOT_4_Enable (0x1 << 4)
375#define TAS2770_ICLAReg1_ICLASLOT_3_Disable (0x0 << 3)
376#define TAS2770_ICLAReg1_ICLASLOT_3_Enable (0x1 << 3)
377#define TAS2770_ICLAReg1_ICLASLOT_2_Disable (0x0 << 2)
378#define TAS2770_ICLAReg1_ICLASLOT_2_Enable (0x1 << 2)
379#define TAS2770_ICLAReg1_ICLASLOT_1_Disable (0x0 << 1)
380#define TAS2770_ICLAReg1_ICLASLOT_1_Enable (0x1 << 1)
381#define TAS2770_ICLAReg1_ICLASLOT_0_Disable (0x0 << 0)
382#define TAS2770_ICLAReg1_ICLASLOT_0_Enable (0x1 << 0)
383
384 // Interrupt Mask Reg0
385#define TAS2770_InterruptMaskReg0 TAS2770_REG(0X0, 0x20)
386#define TAS2770_InterruptMaskReg0_LIMMUTEINTMASK_Mask (0x1 << 7)
387#define TAS2770_InterruptMaskReg0_LIMMUTEINTMASK_Unmask (0x0 << 7)
388#define TAS2770_InterruptMaskReg0_LIMMUTEINTMASK_Disable (0x1 << 7)
389#define TAS2770_InterruptMaskReg0_LIMINFHLDINTMASK_Mask (0x1 << 6)
390#define TAS2770_InterruptMaskReg0_LIMINFHLDINTMASK_Unmask (0x0 << 6)
391#define TAS2770_InterruptMaskReg0_LIMINFHLDINTMASK_Disable (0x1 << 6)
392#define TAS2770_InterruptMaskReg0_LIMMAXATNINTMASK_Mask (0x1 << 5)
393#define TAS2770_InterruptMaskReg0_LIMMAXATNINTMASK_Unmask (0x0 << 5)
394#define TAS2770_InterruptMaskReg0_LIMMAXATNINTMASK_Disable (0x1 << 5)
395#define TAS2770_InterruptMaskReg0_VBATLessthanINFINTMASK_Mask (0x1 << 4)
396#define TAS2770_InterruptMaskReg0_VBATLessthanINFINTMASK_Unmask (0x0 << 4)
397#define TAS2770_InterruptMaskReg0_VBATLessthanINFINTMASK_Disable (0x1 << 4)
398#define TAS2770_InterruptMaskReg0_LIMActiveFlagINTMASK_Mask (0x1 << 3)
399#define TAS2770_InterruptMaskReg0_LIMActiveFlagINTMASK_Unmask (0x0 << 3)
400#define TAS2770_InterruptMaskReg0_LIMActiveFlagINTMASK_Disable (0x1 << 3)
401#define TAS2770_InterruptMaskReg0_TDMClockErrorINTMASK_Mask (0x1 << 2)
402#define TAS2770_InterruptMaskReg0_TDMClockErrorINTMASK_Unmask (0x0 << 2)
403#define TAS2770_InterruptMaskReg0_TDMClockErrorINTMASK_Disable (0x1 << 2)
404#define TAS2770_InterruptMaskReg0_OCEINTMASK_Mask (0x1 << 1)
405#define TAS2770_InterruptMaskReg0_OCEINTMASK_Unmask (0x0 << 1)
406#define TAS2770_InterruptMaskReg0_OCEINTMASK_Disable (0x1 << 1)
407#define TAS2770_InterruptMaskReg0_OTEINTMASK_Mask (0x1 << 0)
408#define TAS2770_InterruptMaskReg0_OTEINTMASK_Unmask (0x0 << 0)
409#define TAS2770_InterruptMaskReg0_OTEINTMASK_Disable (0x1 << 0)
410
411 // Interrupt Mask Reg1
412#define TAS2770_InterruptMaskReg1 TAS2770_REG(0X0, 0x21)
413#define TAS2770_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Mask (0x1 << 7)
414#define TAS2770_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Unmask (0x0 << 7)
415#define TAS2770_InterruptMaskReg1_PDMAUDDATAINVALIDINTMASK_Disable (0x1 << 7)
416#define TAS2770_InterruptMaskReg1_VBATOVLOINTMASK_Mask (0x1 << 3)
417#define TAS2770_InterruptMaskReg1_VBATOVLOINTMASK_Unmask (0x0 << 3)
418#define TAS2770_InterruptMaskReg1_VBATOVLOINTMASK_Disable (0x1 << 3)
419#define TAS2770_InterruptMaskReg1_VBATUVLOINTMASK_Mask (0x1 << 2)
420#define TAS2770_InterruptMaskReg1_VBATUVLOINTMASK_Unmask (0x0 << 2)
421#define TAS2770_InterruptMaskReg1_VBATUVLOINTMASK_Disable (0x1 << 2)
422#define TAS2770_InterruptMaskReg1_BrownOutFlagINTMASK_Mask (0x1 << 1)
423#define TAS2770_InterruptMaskReg1_BrownOutFlagINTMASK_Unmask (0x0 << 1)
424#define TAS2770_InterruptMaskReg1_BrownOutFlagINTMASK_Disable (0x1 << 1)
425#define TAS2770_InterruptMaskReg1_PDMClockErrorINTMASK_Mask (0x1 << 0)
426#define TAS2770_InterruptMaskReg1_PDMClockErrorINTMASK_Unmask (0x0 << 0)
427#define TAS2770_InterruptMaskReg1_PDMClockErrorINTMASK_Disable (0x1 << 0)
428
429 // Live-Interrupt Reg0
430#define TAS2770_LiveInterruptReg0 TAS2770_REG(0X0, 0x22)
431#define TAS2770_LiveInterruptReg0_LIMMUTE_Mask (0x1 << 7)
432#define TAS2770_LiveInterruptReg0_LIMMUTE_NoInterrupt (0x0 << 7)
433#define TAS2770_LiveInterruptReg0_LIMMUTE_Interrupt (0x1 << 7)
434#define TAS2770_LiveInterruptReg0_LIMINFHLD_Mask (0x1 << 6)
435#define TAS2770_LiveInterruptReg0_LIMINFHLD_NoInterrupt (0x0 << 6)
436#define TAS2770_LiveInterruptReg0_LIMINFHLD_Interrupt (0x1 << 6)
437#define TAS2770_LiveInterruptReg0_LIMMAXATN_Mask (0x1 << 5)
438#define TAS2770_LiveInterruptReg0_LIMMAXATN_NoInterrupt (0x0 << 5)
439#define TAS2770_LiveInterruptReg0_LIMMAXATN_Interrupt (0x1 << 5)
440#define TAS2770_LiveInterruptReg0_VBATLessthanINF_Mask (0x1 << 4)
441#define TAS2770_LiveInterruptReg0_VBATLessthanINF_NoInterrupt (0x0 << 4)
442#define TAS2770_LiveInterruptReg0_VBATLessthanINF_Interrupt (0x1 << 4)
443#define TAS2770_LiveInterruptReg0_LIMActiveFlag_Mask (0x1 << 3)
444#define TAS2770_LiveInterruptReg0_LIMActiveFlag_NoInterrupt (0x0 << 3)
445#define TAS2770_LiveInterruptReg0_LIMActiveFlag_Interrupt (0x1 << 3)
446#define TAS2770_LiveInterruptReg0_TDMClockError_Mask (0x1 << 2)
447#define TAS2770_LiveInterruptReg0_TDMClockError_NoInterrupt (0x0 << 2)
448#define TAS2770_LiveInterruptReg0_TDMClockError_Interrupt (0x1 << 2)
449#define TAS2770_LiveInterruptReg0_OCEFlag_Mask (0x1 << 1)
450#define TAS2770_LiveInterruptReg0_OCEFlag_NoInterrupt (0x0 << 1)
451#define TAS2770_LiveInterruptReg0_OCEFlag_Interrupt (0x1 << 1)
452#define TAS2770_LiveInterruptReg0_OTEFlag_Mask (0x1 << 0)
453#define TAS2770_LiveInterruptReg0_OTEFlag_NoInterrupt (0x0 << 0)
454#define TAS2770_LiveInterruptReg0_OTEFlag_Interrupt (0x1 << 0)
455
456 // Live-Interrupt Reg1
457#define TAS2770_LiveInterruptReg1 TAS2770_REG(0X0, 0x23)
458#define TAS2770_LiveInterruptReg1_PDMAUDDATAINVALID_Mask (0x1 << 7)
459#define TAS2770_LiveInterruptReg1_PDMAUDDATAINVALID_NoInterrupt (0x0 << 7)
460#define TAS2770_LiveInterruptReg1_PDMAUDDATAINVALID_Interrupt (0x1 << 7)
461#define TAS2770_LiveInterruptReg1_VBATOVLO_Mask (0x1 << 3)
462#define TAS2770_LiveInterruptReg1_VBATOVLO_NoInterrupt (0x0 << 3)
463#define TAS2770_LiveInterruptReg1_VBATOVLO_Interrupt (0x1 << 3)
464#define TAS2770_LiveInterruptReg1_VBATUVLO_Mask (0x1 << 2)
465#define TAS2770_LiveInterruptReg1_VBATUVLO_NoInterrupt (0x0 << 2)
466#define TAS2770_LiveInterruptReg1_VBATUVLO_Interrupt (0x1 << 2)
467#define TAS2770_LiveInterruptReg1_BrownOutFlag_Mask (0x1 << 1)
468#define TAS2770_LiveInterruptReg1_BrownOutFlag_NoInterrupt (0x0 << 1)
469#define TAS2770_LiveInterruptReg1_BrownOutFlag_Interrupt (0x1 << 1)
470#define TAS2770_LiveInterruptReg1_PDMClockError_Mask (0x1 << 0)
471#define TAS2770_LiveInterruptReg1_PDMClockError_NoInterrupt (0x0 << 0)
472#define TAS2770_LiveInterruptReg1_PDMClockError_Interrupt (0x1 << 0)
473
474 // Latched-Interrupt Reg0
475#define TAS2770_LatchedInterruptReg0 TAS2770_REG(0X0, 0x24)
476#define TAS2770_LatchedInterruptReg0_LIMMUTESticky_Mask (0x1 << 7)
477#define TAS2770_LatchedInterruptReg0_LIMMUTESticky_NoInterrupt (0x0 << 7)
478#define TAS2770_LatchedInterruptReg0_LIMMUTESticky_Interrupt (0x1 << 7)
479#define TAS2770_LatchedInterruptReg0_LIMINFHLDSticky_Mask (0x1 << 6)
480#define TAS2770_LatchedInterruptReg0_LIMINFHLDSticky_NoInterrupt (0x0 << 6)
481#define TAS2770_LatchedInterruptReg0_LIMINFHLDSticky_Interrupt (0x1 << 6)
482#define TAS2770_LatchedInterruptReg0_LIMMAXATNSticky_Mask (0x1 << 5)
483#define TAS2770_LatchedInterruptReg0_LIMMAXATNSticky_NoInterrupt (0x0 << 5)
484#define TAS2770_LatchedInterruptReg0_LIMMAXATNSticky_Interrupt (0x1 << 5)
485#define TAS2770_LatchedInterruptReg0_VBATLessthanINFSticky_Mask (0x1 << 4)
486#define TAS2770_LatchedInterruptReg0_VBATLessthanINFSticky_NoInterrupt (0x0 << 4)
487#define TAS2770_LatchedInterruptReg0_VBATLessthanINFSticky_Interrupt (0x1 << 4)
488#define TAS2770_LatchedInterruptReg0_LIMActiveFlagSticky_Mask (0x1 << 3)
489#define TAS2770_LatchedInterruptReg0_LIMActiveFlagSticky_NoInterrupt (0x0 << 3)
490#define TAS2770_LatchedInterruptReg0_LIMActiveFlagSticky_Interrupt (0x1 << 3)
491#define TAS2770_LatchedInterruptReg0_TDMClockErrorSticky_Mask (0x1 << 2)
492#define TAS2770_LatchedInterruptReg0_TDMClockErrorSticky_NoInterrupt (0x0 << 2)
493#define TAS2770_LatchedInterruptReg0_TDMClockErrorSticky_Interrupt (0x1 << 2)
494#define TAS2770_LatchedInterruptReg0_OCEFlagSticky_Mask (0x1 << 1)
495#define TAS2770_LatchedInterruptReg0_OCEFlagSticky_NoInterrupt (0x0 << 1)
496#define TAS2770_LatchedInterruptReg0_OCEFlagSticky_Interrupt (0x1 << 1)
497#define TAS2770_LatchedInterruptReg0_OTEFlagSticky_Mask (0x1 << 0)
498#define TAS2770_LatchedInterruptReg0_OTEFlagSticky_NoInterrupt (0x0 << 0)
499#define TAS2770_LatchedInterruptReg0_OTEFlagSticky_Interrupt (0x1 << 0)
500
501 // Latched-Interrupt Reg1
502#define TAS2770_LatchedInterruptReg1 TAS2770_REG(0X0, 0x25)
503#define TAS2770_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Mask (0x1 << 7)
504#define TAS2770_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_NoInterrupt (0x0 << 7)
505#define TAS2770_LatchedInterruptReg1_PDMAUDDATAINVALIDSticky_Interrupt (0x1 << 7)
506#define TAS2770_LatchedInterruptReg1_VBATOVLOSticky_Mask (0x1 << 3)
507#define TAS2770_LatchedInterruptReg1_VBATOVLOSticky_NoInterrupt (0x0 << 3)
508#define TAS2770_LatchedInterruptReg1_VBATOVLOSticky_Interrupt (0x1 << 3)
509#define TAS2770_LatchedInterruptReg1_VBATUVLOSticky_Mask (0x1 << 2)
510#define TAS2770_LatchedInterruptReg1_VBATUVLOSticky_NoInterrupt (0x0 << 2)
511#define TAS2770_LatchedInterruptReg1_VBATUVLOSticky_Interrupt (0x1 << 2)
512#define TAS2770_LatchedInterruptReg1_BrownOutFlagSticky_Mask (0x1 << 1)
513#define TAS2770_LatchedInterruptReg1_BrownOutFlagSticky_NoInterrupt (0x0 << 1)
514#define TAS2770_LatchedInterruptReg1_BrownOutFlagSticky_Interrupt (0x1 << 1)
515#define TAS2770_LatchedInterruptReg1_PDMClockErrorSticky_Mask (0x1 << 0)
516#define TAS2770_LatchedInterruptReg1_PDMClockErrorSticky_NoInterrupt (0x0 << 0)
517#define TAS2770_LatchedInterruptReg1_PDMClockErrorSticky_Interrupt (0x1 << 0)
518
519 // VBAT MSB
520#define TAS2770_VBATMSB TAS2770_REG(0X0, 0x27)
521#define TAS2770_VBATMSB_VBATMSB70_Mask (0xff << 0)
522
523 // VBAT LSB
524#define TAS2770_VBATLSB TAS2770_REG(0X0, 0x28)
525#define TAS2770_VBATLSB_VBATLSB74_Mask (0xf << 4)
526
527 // TEMP MSB
528#define TAS2770_TEMPMSB TAS2770_REG(0X0, 0x29)
529#define TAS2770_TEMPMSB_TEMPMSB70_Mask (0xff << 0)
530
531 // TEMP LSB
532#define TAS2770_TEMPLSB TAS2770_REG(0X0, 0x2A)
533#define TAS2770_TEMPLSB_TEMPLSB74_Mask (0xf << 4)
534
535 // SDZ Config
536#define TAS2770_SDZCONFIG TAS2770_REG(0X0, 0x2F)
537#define TAS2770_SDZCONFIG_ICLANONZEROMIN_Mask (0x1 << 4)
538#define TAS2770_SDZCONFIG_ICLANONZEROMIN_Disable (0x0 << 4)
539#define TAS2770_SDZCONFIG_ICLANONZEROMIN_Enable (0x1 << 4)
540#define TAS2770_SDZCONFIG_SDZMODECONF_Mask (0x3 << 2)
541#define TAS2770_SDZCONFIG_SDZMODECONF_ForcedShutdownAfterTimeout (0x0 << 2)
542#define TAS2770_SDZCONFIG_SDZMODECONF_ForceShutdown (0x1 << 2)
543#define TAS2770_SDZCONFIG_SDZMODECONF_NormalShutdown (0x2 << 2)
544#define TAS2770_SDZCONFIG_SDZMODETIMEOUT_Mask (0x3 << 0)
545#define TAS2770_SDZCONFIG_SDZMODETIMEOUT_2ms (0x0 << 0)
546#define TAS2770_SDZCONFIG_SDZMODETIMEOUT_4ms (0x1 << 0)
547#define TAS2770_SDZCONFIG_SDZMODETIMEOUT_6ms (0x2 << 0)
548#define TAS2770_SDZCONFIG_SDZMODETIMEOUT_23p8ms (0x3 << 0)
549
550
551 // Interrupt Configuration
552#define TAS2770_InterruptConfiguration TAS2770_REG(0X0, 0x30)
553#define TAS2770_InterruptConfiguration_INTTHRUSW_Mask (0x1 << 2),
554#define TAS2770_InterruptConfiguration_INTTHRUSW_IntOnIRQZ (0x0 << 2)
555#define TAS2770_InterruptConfiguration_INTTHRUSW_IntFor2ms (0x1 << 2)
556#define TAS2770_InterruptConfiguration_PININTConfig10_Mask (0x3 << 0)
557#define TAS2770_InterruptConfiguration_PININTConfig10_AssertOnLiveInterrupts (0x0 << 0)
558#define TAS2770_InterruptConfiguration_PININTConfig10_AssertOnLatchedInterrupts (0x1 << 0)
559#define TAS2770_InterruptConfiguration_PININTConfig10_Assert2msOnLiveInterrupts (0x2 << 0)
560#define TAS2770_InterruptConfiguration_PININTConfig10_Assert2msOnLatchedInterrupts (0x3 << 0)
561
562 // Digital Input Pin Pull Down
563#define TAS2770_DigitalInputPinPullDown TAS2770_REG(0X0, 0x31)
564#define TAS2770_DigitalInputPinPullDown_WKPulldownSDOUT_Mask (0x1 << 7)
565#define TAS2770_DigitalInputPinPullDown_WKPulldownSDOUT_Disabled (0x0 << 7)
566#define TAS2770_DigitalInputPinPullDown_WKPulldownSDOUT_Enabled (0x1 << 7)
567#define TAS2770_DigitalInputPinPullDown_WKPulldownSDIN_Mask (0x1 << 6)
568#define TAS2770_DigitalInputPinPullDown_WKPulldownSDIN_Disabled (0x0 << 6)
569#define TAS2770_DigitalInputPinPullDown_WKPulldownSDIN_Enabled (0x1 << 6)
570#define TAS2770_DigitalInputPinPullDown_WKPulldownFSYNC_Mask (0x1 << 5)
571#define TAS2770_DigitalInputPinPullDown_WKPulldownFSYNC_Disabled (0x0 << 5)
572#define TAS2770_DigitalInputPinPullDown_WKPulldownFSYNC_Enabled (0x1 << 5)
573#define TAS2770_DigitalInputPinPullDown_WKPulldownSBCLK_Mask (0x1 << 4)
574#define TAS2770_DigitalInputPinPullDown_WKPulldownSBCLK_Disabled (0x0 << 4)
575#define TAS2770_DigitalInputPinPullDown_WKPulldownSBCLK_Enabled (0x1 << 4)
576#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD0_Mask (0x1 << 3)
577#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD0_Disabled (0x0 << 3)
578#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD0_Enabled (0x1 << 3)
579#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD1_Mask (0x1 << 2)
580#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD1_Disabled (0x0 << 2)
581#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMD1_Enabled (0x1 << 2)
582#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK0_Mask (0x1 << 1)
583#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK0_Disabled (0x0 << 1)
584#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK0_Enabled (0x1 << 1)
585#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK1_Mask (0x1 << 0)
586#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK1_Disabled (0x0 << 0)
587#define TAS2770_DigitalInputPinPullDown_WKPulldownPDMCK1_Enabled (0x1 << 0)
588
589 // Misc IRQ
590#define TAS2770_MiscIRQ TAS2770_REG(0X0, 0x32)
591#define TAS2770_MiscIRQ_IRQZREQD_Mask (0x1 << 7)
592#define TAS2770_MiscIRQ_IRQZREQD_ActiveHigh (0x0 << 7)
593#define TAS2770_MiscIRQ_IRQZREQD_ActiveLow (0x1 << 7)
594#define TAS2770_MiscIRQ_IRQZBITBANG_Mask (0x1 << 0)
595#define TAS2770_MiscIRQ_IRQZBITBANG_IRQZInputBuf0 (0x0 << 0)
596#define TAS2770_MiscIRQ_IRQZBITBANG_IRQZInputBuf1 (0x1 << 0)
597
598
599 // Clock Configuration
600#define TAS2770_ClockConfiguration TAS2770_REG(0X0, 0x3C)
601#define TAS2770_ClockConfiguration_SBCLKtoFS52_Mask (0xf << 2)
602#define TAS2770_ClockConfiguration_SBCLKtoFS52_16 (0x0 << 2)
603#define TAS2770_ClockConfiguration_SBCLKtoFS52_24 (0x1 << 2)
604#define TAS2770_ClockConfiguration_SBCLKtoFS52_32 (0x2 << 2)
605#define TAS2770_ClockConfiguration_SBCLKtoFS52_48 (0x3 << 2)
606#define TAS2770_ClockConfiguration_SBCLKtoFS52_64 (0x4 << 2)
607#define TAS2770_ClockConfiguration_SBCLKtoFS52_96 (0x5 << 2)
608#define TAS2770_ClockConfiguration_SBCLKtoFS52_128 (0x6 << 2)
609#define TAS2770_ClockConfiguration_SBCLKtoFS52_192 (0x7 << 2)
610#define TAS2770_ClockConfiguration_SBCLKtoFS52_256 (0x8 << 2)
611#define TAS2770_ClockConfiguration_SBCLKtoFS52_384 (0x9 << 2)
612#define TAS2770_ClockConfiguration_SBCLKtoFS52_512 (0xa << 2)
613#define TAS2770_ClockConfiguration_DISCLKRateDetect10_Mask (0x3 << 0)
614#define TAS2770_ClockConfiguration_DISCLKRateDetect10_Disabled (0x1 << 0)
615#define TAS2770_ClockConfiguration_DISCLKRateDetect10_Enabled (0x0 << 0)
616
617
618#define TAS2770_BDIVSelection_BCLKMaster TAS2770_REG(0X0, 0x3D)
619#define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_Mask (0x3 << 0)
620#define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_NDIV2Output (0x0 << 0)
621#define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_NDIV1Output (0x1 << 0)
622#define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_MCLKOutput (0x2 << 0)
623#define TAS2770_BDIVSelection_BCLKMaster_ClockSource10_PDMCLK1PAD (0x3 << 0)
624
625#define TAS2770_BDIVSelection_HOLDSARUPDATE TAS2770_REG(0X0, 0x41)
626#define TAS2770_BDIVSelection_HOLDSARUPDATE10_Mask (0x1 << 0)
627#define TAS2770_BDIVSelection_HOLDSARUPDATE10_Disabled (0x0 << 0)
628#define TAS2770_BDIVSelection_HOLDSARUPDATE10_Enabled (0x1 << 0)
629
630
631 // TDM Clock detection monitor
632#define TAS2770_TDMClockdetectionmonitor TAS2770_REG(0X0, 0x77)
633#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_Mask (0xf << 3)
634#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_16 (0x0 << 3)
635#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_24 (0x1 << 3)
636#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_32 (0x2 << 3)
637#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_48 (0x3 << 3)
638#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_64 (0x4 << 3)
639#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_96 (0x5 << 3)
640#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_128 (0x6 << 3)
641#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_192 (0x7 << 3)
642#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_256 (0x8 << 3)
643#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_384 (0x9 << 3)
644#define TAS2770_TDMClockdetectionmonitor_SBCLKtoFSYNC63_512 (0xf << 3)
645#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_Mask (0x7 << 0),
646#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_8khz (0x0 << 0)
647#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_16khz (0x1 << 0)
648#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_32khz (0x2 << 0)
649#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_48khz (0x3 << 0)
650#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_96khz (0x4 << 0)
651#define TAS2770_TDMClockdetectionmonitor_DetectedSampleRate20_192khz (0x5 << 0)
652
653 // Revision and PG ID
654#define TAS2770_RevisionandPGID TAS2770_REG(0X0, 0x7D)
655#define TAS2770_RevisionandPGID_RevisionID74_Mask (0xf << 4)
656#define TAS2770_RevisionandPGID_PGID30_Mask (0xf << 0)
657
658 // I2C Checksum
659#define TAS2770_I2CChecksum TAS2770_REG(0X0, 0x7E)
660#define TAS2770_I2CChecksum_I2CChecksum70_Mask (0xff << 0)
661
662 // Book
663#define TAS2770_Book TAS2770_REG(0X0, 0x7F)
664#define TAS2770_Book_Book70_Mask (0xff << 0)
665
666
667#define TAS2770_RegisterCount 55
668
669
670
671#define ERROR_NONE 0x0000000
672#define ERROR_PLL_ABSENT 0x0000000
673#define ERROR_DEVA_I2C_COMM 0x0000000
674#define ERROR_DEVB_I2C_COMM 0x0000000
675#define ERROR_PRAM_CRCCHK 0x0000000
676#define ERROR_YRAM_CRCCHK 0x0000001
677#define ERROR_CLK_DET2 0x0000002
678#define ERROR_CLK_DET1 0x0000004
679#define ERROR_CLK_LOST 0x0000008
680#define ERROR_BROWNOUT 0x0000010
681#define ERROR_DIE_OVERTEMP 0x0000020
682#define ERROR_CLK_HALT 0x0000040
683#define ERROR_UNDER_VOLTAGE 0x0000080
684#define ERROR_OVER_CURRENT 0x0000100
685#define ERROR_CLASSD_PWR 0x0000200
686#define ERROR_FAILSAFE 0x4000000
687
688struct tas2770_register {
689 int book;
690 int page;
691 int reg;
692};
693
694struct tas2770_dai_cfg {
695 unsigned int dai_fmt;
696 unsigned int tdm_delay;
697};
698
699struct tas2770_priv {
700 struct device *dev;
701 struct regmap *regmap;
702 struct mutex dev_lock;
703 struct delayed_work irq_work;
704 struct hrtimer mtimer;
705 int mnClkin;
706 int mnClkid;
707 bool mbPowerUp;
708 int mnCurrentBook;
709 int mnCurrentPage;
710 int mnLoad;
711 int mnASIFormat;
712 int mnResetGPIO;
713 int mnIRQGPIO;
714 int mnIRQ;
715 bool mbIRQEnable;
716 int mnSamplingRate;
717 int mnFrameSize;
718 int mnPLL;
719 int mnPPG;
720 int ch_size;
721
722 void (*hw_reset)(struct tas2770_priv *pTAS2770);
723 void (*clearIRQ)(struct tas2770_priv *pTAS2770);
724 void (*enableIRQ)(struct tas2770_priv *pTAS2770, bool enable);
725 /* device is working, but system is suspended */
726 int (*runtime_suspend)(struct tas2770_priv *pTAS2770);
727 int (*runtime_resume)(struct tas2770_priv *pTAS2770);
728 bool mbRuntimeSuspend;
729
730 unsigned int mnErrCode;
731#ifdef CONFIG_TAS2770_CODEC
732 struct mutex codec_lock;
733#endif
734
735#ifdef CONFIG_TAS2770_MISC
736 int mnDBGCmd;
737 int mnCurrentReg;
738 struct mutex file_lock;
739#endif
740};
741
742#endif // __TAS2770_