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author | YH Huang | 2015-08-18 02:27:53 -0500 |
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committer | Thierry Reding | 2015-10-06 09:07:29 -0500 |
commit | 3e9e6c28d287a4a2dc62f61cf67654bdae374992 (patch) | |
tree | 9510b939c68a63cdcffa671f89afe0d7664d48f1 /Documentation/devicetree | |
parent | 25ebc9ec162d64ab38a813dac01c5322ebbcfcfa (diff) | |
download | ti-linux-kernel-3e9e6c28d287a4a2dc62f61cf67654bdae374992.tar.gz ti-linux-kernel-3e9e6c28d287a4a2dc62f61cf67654bdae374992.tar.xz ti-linux-kernel-3e9e6c28d287a4a2dc62f61cf67654bdae374992.zip |
dt-bindings: pwm: Add MediaTek display PWM bindings
Document the device-tree binding of MediaTek display PWM. The PWM has
one channel to control the backlight brightness for display. Both the
MT8173 and MT6595 are supported.
Signed-off-by: YH Huang <yh.huang@mediatek.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt new file mode 100644 index 000000000000..f8f59baf6b67 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-mtk-disp.txt | |||
@@ -0,0 +1,42 @@ | |||
1 | MediaTek display PWM controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible: should be "mediatek,<name>-disp-pwm": | ||
5 | - "mediatek,mt8173-disp-pwm": found on mt8173 SoC. | ||
6 | - "mediatek,mt6595-disp-pwm": found on mt6595 SoC. | ||
7 | - reg: physical base address and length of the controller's registers. | ||
8 | - #pwm-cells: must be 2. See pwm.txt in this directory for a description of | ||
9 | the cell format. | ||
10 | - clocks: phandle and clock specifier of the PWM reference clock. | ||
11 | - clock-names: must contain the following: | ||
12 | - "main": clock used to generate PWM signals. | ||
13 | - "mm": sync signals from the modules of mmsys. | ||
14 | - pinctrl-names: Must contain a "default" entry. | ||
15 | - pinctrl-0: One property must exist for each entry in pinctrl-names. | ||
16 | See pinctrl/pinctrl-bindings.txt for details of the property values. | ||
17 | |||
18 | Example: | ||
19 | pwm0: pwm@1401e000 { | ||
20 | compatible = "mediatek,mt8173-disp-pwm", | ||
21 | "mediatek,mt6595-disp-pwm"; | ||
22 | reg = <0 0x1401e000 0 0x1000>; | ||
23 | #pwm-cells = <2>; | ||
24 | clocks = <&mmsys CLK_MM_DISP_PWM026M>, | ||
25 | <&mmsys CLK_MM_DISP_PWM0MM>; | ||
26 | clock-names = "main", "mm"; | ||
27 | pinctrl-names = "default"; | ||
28 | pinctrl-0 = <&disp_pwm0_pins>; | ||
29 | }; | ||
30 | |||
31 | backlight_lcd: backlight_lcd { | ||
32 | compatible = "pwm-backlight"; | ||
33 | pwms = <&pwm0 0 1000000>; | ||
34 | brightness-levels = < | ||
35 | 0 16 32 48 64 80 96 112 | ||
36 | 128 144 160 176 192 208 224 240 | ||
37 | 255 | ||
38 | >; | ||
39 | default-brightness-level = <9>; | ||
40 | power-supply = <&mt6397_vio18_reg>; | ||
41 | enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; | ||
42 | }; | ||