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authorSuman Anna2023-05-25 05:03:43 -0500
committerPraneeth Bajjuri2023-05-25 07:08:50 -0500
commit5afb73d82a014b59462162d960b350b8c58e5ae6 (patch)
treee7a88e936fd3643b709c6d375ff73dfb4eb8f0c7 /arch/arm64/boot/dts/ti/k3-am64-main.dtsi
parent8c915fb37c7ddd3d716bd3bad40c26b7bdfb60f2 (diff)
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arm64: dts: ti: k3-am64-main: Add ICSSG IEP nodes
The ICSSG IP on AM64x SoCs have two Industrial Ethernet Peripherals (IEPs) to manage/generate Industrial Ethernet functions such as time stamping. Each IEP sub-module is sourced from an internal clock mux that can be derived from either of the IP instance's ICSSG_IEP_GCLK or from another internal ICSSG CORE_CLK mux. Add both the IEP nodes for both the ICSSG instances. The IEP clock is currently configured to be derived indirectly from the ICSSG_ICLK running at 250 MHz. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Diffstat (limited to 'arch/arm64/boot/dts/ti/k3-am64-main.dtsi')
-rw-r--r--arch/arm64/boot/dts/ti/k3-am64-main.dtsi24
1 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
index 0d8106fa6fda..640951250c66 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-main.dtsi
@@ -1078,6 +1078,18 @@
1078 }; 1078 };
1079 }; 1079 };
1080 1080
1081 icssg0_iep0: iep@2e000 {
1082 compatible = "ti,am654-icss-iep";
1083 reg = <0x2e000 0x1000>;
1084 clocks = <&icssg0_iepclk_mux>;
1085 };
1086
1087 icssg0_iep1: iep@2f000 {
1088 compatible = "ti,am654-icss-iep";
1089 reg = <0x2f000 0x1000>;
1090 clocks = <&icssg0_iepclk_mux>;
1091 };
1092
1081 icssg0_mii_rt: mii-rt@32000 { 1093 icssg0_mii_rt: mii-rt@32000 {
1082 compatible = "ti,pruss-mii", "syscon"; 1094 compatible = "ti,pruss-mii", "syscon";
1083 reg = <0x32000 0x100>; 1095 reg = <0x32000 0x100>;
@@ -1219,6 +1231,18 @@
1219 }; 1231 };
1220 }; 1232 };
1221 1233
1234 icssg1_iep0: iep@2e000 {
1235 compatible = "ti,am654-icss-iep";
1236 reg = <0x2e000 0x1000>;
1237 clocks = <&icssg1_iepclk_mux>;
1238 };
1239
1240 icssg1_iep1: iep@2f000 {
1241 compatible = "ti,am654-icss-iep";
1242 reg = <0x2f000 0x1000>;
1243 clocks = <&icssg1_iepclk_mux>;
1244 };
1245
1222 icssg1_mii_rt: mii-rt@32000 { 1246 icssg1_mii_rt: mii-rt@32000 {
1223 compatible = "ti,pruss-mii", "syscon"; 1247 compatible = "ti,pruss-mii", "syscon";
1224 reg = <0x32000 0x100>; 1248 reg = <0x32000 0x100>;