1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2019 Texas Instruments Incorporated
%YAML 1.2
---
$id: "http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Texas Instruments AM65x Display Subsystem
maintainers:
- Jyri Sarha <jsarha@ti.com>
- Tomi Valkeinen <tomi.valkeinen@ti.com>
description: |
The AM65x TI Keystone Display SubSystem with two output ports and
two video planes. The first video port supports OLDI and the second
supports DPI format. The fist plane is full video plane with all
features and the second is a "lite plane" without scaling support.
properties:
compatible:
enum:
- ti,am625-dss
- ti,am62a7-dss
- ti,am62p51-dss
- ti,am65x-dss
reg:
description:
Addresses to each DSS memory region described in the SoC's TRM.
items:
- description: common DSS register area
- description: VIDL1 light video plane
- description: VID video plane
- description: OVR1 overlay manager for vp1
- description: OVR2 overlay manager for vp2
- description: VP1 video port 1
- description: VP2 video port 2
- description: common1 DSS register area
reg-names:
items:
- const: common
- const: vidl1
- const: vid
- const: ovr1
- const: ovr2
- const: vp1
- const: vp2
- const: common1
clocks:
items:
- description: fck DSS functional clock
- description: vp1 Video Port 1 pixel clock
- description: vp2 Video Port 2 pixel clock
clock-names:
items:
- const: fck
- const: vp1
- const: vp2
assigned-clocks:
minItems: 1
maxItems: 3
assigned-clock-parents:
minItems: 1
maxItems: 3
interrupts:
maxItems: 1
power-domains:
minItems: 1
maxItems: 3
description: phandle to the associated power domain
dma-coherent:
type: boolean
ports:
$ref: /schemas/graph.yaml#/properties/ports
properties:
port@0:
$ref: /schemas/graph.yaml#/properties/port
description:
For AM625, AM62P51 and AM65x, this maps to DSS OLDI output
port node (OLDI TX 0) forwarded from video port 1.
For AM62A7, this maps to DSS DPI output port node forwarded
from video port 2. (video port 1 remains tied off.)
port@1:
$ref: /schemas/graph.yaml#/properties/port
description:
This maps to DSS DPI output port node forwarded from
video port 2.
port@2:
$ref: /schemas/graph.yaml#/properties/port
description:
For AM625, AM62P51, this maps to DSS OLDI output port node
(OLDI TX 1) forwarded from video port 1.
ti,am65x-oldi-io-ctrl:
$ref: "/schemas/types.yaml#/definitions/phandle"
description:
phandle to syscon device node mapping OLDI IO_CTRL registers.
The mapped range should point to OLDI_DAT0_IO_CTRL, map it and
following OLDI_DAT1_IO_CTRL, OLDI_DAT2_IO_CTRL, OLDI_DAT3_IO_CTRL,
and OLDI_CLK_IO_CTRL registers. This property is needed for OLDI
interface to work.
max-memory-bandwidth:
$ref: /schemas/types.yaml#/definitions/uint32
description:
Input memory (from main memory to dispc) bandwidth limit in
bytes per second
ti,dss-shared-mode:
type: boolean
description:
TI DSS7 supports sharing of display between multiple hosts
as it provides separate register space for display configuration and
unique interrupt line to each host.
One of the host is provided access to the global display
configuration labelled as "common" region of DSS allows that host
exclusive access to global registers of DSS while other host can
configure the display for it's usage using a separate register
space labelled as "common1".
The DSS resources can be partitioned in such a way that one or more
of the video planes are owned by Linux whereas other video planes
can be owned by a remote core.
The video port controlling these planes acts as a shared video port
and it can be configured with write access either by Linux or the
remote core in which case Linux only has read-only access to that
video port.
ti,dss-shared-mode-planes:
description:
The video layer that is owned by processing core running Linux.
The display driver running from Linux has exclusive write access to
this video layer.
$ref: /schemas/types.yaml#/definitions/string
enum: [vidl, vid]
ti,dss-shared-mode-vp:
description:
The video port that is being used in context of processing core
running Linux with display susbsytem being used in shared mode.
This can be owned either by the processing core running Linux in
which case Linux has the write access and the responsibility to
configure this video port and the associated overlay manager or
it can be shared between core running Linux and a remote core
with remote core provided with write access to this video port and
associated overlay managers and remote core configures and drives
this video port also feeding data from one or more of the
video planes owned by Linux, with Linux only having read-only access
to this video port and associated overlay managers.
$ref: /schemas/types.yaml#/definitions/string
enum: [vp1, vp2]
ti,dss-shared-mode-common:
description:
The DSS register region owned by processing core running Linux.
$ref: /schemas/types.yaml#/definitions/string
enum: [common, common1]
ti,dss-shared-mode-vp-owned:
description:
This tells whether processing core running Linux has write access to
the video ports enlisted in ti,dss-shared-mode-vps.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
ti,dss-shared-mode-plane-zorder:
description:
The zorder of the planes owned by Linux.
For the scenario where Linux is not having write access to associated
video port, this field is just for
informational purpose to enumerate the zorder configuration
being used by remote core.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
dependencies:
ti,dss-shared-mode: [ 'ti,dss-shared-mode-planes', 'ti,dss-shared-mode-vp',
'ti,dss-shared-mode-plane-zorder', 'ti,dss-shared-mode-vp-owned']
ti,dss-shared-mode-vp: ['ti,dss-shared-mode', 'ti,dss-shared-mode-planes',
'ti,dss-shared-mode-plane-zorder', 'ti,dss-shared-mode-vp-owned']
ti,dss-shared-mode-planes: ['ti,dss-shared-mode', 'ti,dss-shared-mode-vp',
'ti,dss-shared-mode-plane-zorder', 'ti,dss-shared-mode-vp-owned']
ti,dss-shared-mode-plane-zorder: ['ti,dss-shared-mode-planes', 'ti,dss-shared-mode-vp',
'ti,dss-shared-mode', 'ti,dss-shared-mode-vp-owned']
ti,dss-shared-mode-vp-owned: ['ti,dss-shared-mode-planes', 'ti,dss-shared-mode-vp',
'ti,dss-shared-mode', 'ti,dss-shared-mode-plane-zorder']
allOf:
- if:
properties:
compatible:
contains:
const: ti,am65x-dss
then:
properties:
ports:
properties:
port@2: false
- if:
properties:
compatible:
contains:
const: ti,am62a7-dss
then:
properties:
ports:
properties:
port@1: false
port@2: false
ti,dss-shared-mode-vp:
enum: [vp2]
required:
- compatible
- reg
- reg-names
- clocks
- clock-names
- interrupts
- ports
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/soc/ti,sci_pm_domain.h>
dss: dss@4a00000 {
compatible = "ti,am65x-dss";
reg = <0x04a00000 0x1000>, /* common */
<0x04a02000 0x1000>, /* vidl1 */
<0x04a06000 0x1000>, /* vid */
<0x04a07000 0x1000>, /* ovr1 */
<0x04a08000 0x1000>, /* ovr2 */
<0x04a0a000 0x1000>, /* vp1 */
<0x04a0b000 0x1000>, /* vp2 */
<0x04a01000 0x1000>; /* common1 */
reg-names = "common", "vidl1", "vid",
"ovr1", "ovr2", "vp1", "vp2", "common1";
ti,am65x-oldi-io-ctrl = <&dss_oldi_io_ctrl>;
power-domains = <&k3_pds 67 TI_SCI_PD_EXCLUSIVE>;
clocks = <&k3_clks 67 1>,
<&k3_clks 216 1>,
<&k3_clks 67 2>;
clock-names = "fck", "vp1", "vp2";
interrupts = <GIC_SPI 166 IRQ_TYPE_EDGE_RISING>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
oldi_out0: endpoint {
remote-endpoint = <&lcd_in0>;
};
};
};
};
|
