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Diffstat (limited to 'debian/ti-timl/usr/src/timl/src/common/util/timlUtilMaxPooling.c')
-rw-r--r--debian/ti-timl/usr/src/timl/src/common/util/timlUtilMaxPooling.c129
1 files changed, 129 insertions, 0 deletions
diff --git a/debian/ti-timl/usr/src/timl/src/common/util/timlUtilMaxPooling.c b/debian/ti-timl/usr/src/timl/src/common/util/timlUtilMaxPooling.c
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index 0000000..3ae9bcf
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+++ b/debian/ti-timl/usr/src/timl/src/common/util/timlUtilMaxPooling.c
@@ -0,0 +1,129 @@
1/******************************************************************************/
2/*!
3 * \file timlUtilMaxPooling.c
4 */
5/* Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 *
14 * Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the
17 * distribution.
18 *
19 * Neither the name of Texas Instruments Incorporated nor the names of
20 * its contributors may be used to endorse or promote products derived
21 * from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
26 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
27 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
28 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
29 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 *
35 ******************************************************************************/
36
37
38/*******************************************************************************
39 *
40 * INCLUDES
41 *
42 ******************************************************************************/
43
44#include "../api/timl.h"
45#ifdef TIML_ALT
46#include "../../alt/timlAlt.h"
47#endif
48
49
50/*******************************************************************************/
51/*!
52 * \ingroup util
53 * \brief Max pooling
54 * \param[out] outputMap Output feature map
55 * \param[in] maxIndex Max value index map
56 * \param[in] inputMap Input feature map
57 * \param[in] row Output feature map row
58 * \param[in] col Output feature map col
59 * \param[in] channel Output feature map channel
60 * \param[in] prevRow Previous feature map row
61 * \param[in] prevCol Previous feature map col
62 * \param[in] scaleRow Scaling window row size
63 * \param[in] scaleCol Scaling window col size
64 * \param[in] padUp Upper border padding for the input feature map
65 * \param[in] padLeft Left border padding for the input feature map
66 * \param[in] strideX Window stride in x direction
67 * \param[in] strideY Window stride in y direction
68 * \param[in] phase CNN phase
69 * \param[in] deviceId Device id
70 * \param[in] threadId Thread id
71 * \return Error code
72 */
73/*******************************************************************************/
74
75int timlUtilMaxPooling(float *outputMap, int *maxIndex, float *inputMap, int row, int col, int channel, int prevRow, int prevCol, int scaleRow, int scaleCol, int padUp, int padLeft, int strideX, int strideY, timlUtilPhase phase, int deviceId, int threadId)
76{
77#ifdef TIML_CPU
78 int startRow;
79 int endRow;
80 int startCol;
81 int endCol;
82 int n;
83 int p;
84 int q;
85 int i;
86 int j;
87 float maxVal;
88
89 for (n = 0; n < channel; n++) {
90 for (p = 0; p < row; p++) {
91 for (q = 0; q < col; q++) {
92 maxVal = -FLT_MAX;
93 startRow = p*strideY - padUp;
94 startCol = q*strideX - padLeft;
95 endRow = startRow + scaleRow;
96 endCol = startCol + scaleCol;
97 if (startRow < 0) {
98 startRow = 0;
99 }
100 if (startCol < 0) {
101 startCol = 0;
102 }
103 if (endRow > prevRow) {
104 endRow = prevRow;
105 }
106 if (endCol > prevCol) {
107 endCol = prevCol;
108 }
109
110 for (i = startRow; i < endRow; i++) {
111 for (j = startCol; j < endCol; j++) {
112 // prevLayer->featureMap{n}(i, j)
113 if (inputMap[n*prevRow*prevCol + i*prevCol + j] > maxVal) {
114 maxVal = inputMap[n*prevRow*prevCol + i*prevCol + j];
115 if (phase == Util_Train) {
116 maxIndex[n*row*col + p * col + q] = n*prevRow*prevCol + i*prevCol + j;
117 }
118 }
119 }
120 }
121 outputMap[n*row*col + p*col + q] = maxVal;
122 }
123 }
124 }
125 return 0;
126#elif defined TIML_ALT
127 return timlUtilMaxPoolingAlt(outputMap, maxIndex, inputMap, row, col, channel, prevRow, prevCol, scaleRow, scaleCol, padUp, padLeft, strideX, strideY, phase, deviceId, threadId);
128#endif
129}