diff options
author | Djordje Senicic | 2019-11-27 17:28:14 -0600 |
---|---|---|
committer | Djordje Senicic | 2019-11-27 17:28:14 -0600 |
commit | d1d7b3549ad779b8add205a3713fe8f2d1360f3d (patch) | |
tree | b3b37ce5701406bb9dfb5e2119d31210af85ecb7 | |
parent | ad5191ee43a97e50898256d09315c63699da5f84 (diff) | |
download | tidl-api-d1d7b3549ad779b8add205a3713fe8f2d1360f3d.tar.gz tidl-api-d1d7b3549ad779b8add205a3713fe8f2d1360f3d.tar.xz tidl-api-d1d7b3549ad779b8add205a3713fe8f2d1360f3d.zip |
mcbench: Adjust network heap sizes, so that all test cases can fit into CMEM of 384MB
Signed-off-by: Djordje Senicic <x0157990@ti.com>
-rwxr-xr-x | examples/mcbench/scripts/all_5729.sh | 26 |
1 files changed, 7 insertions, 19 deletions
diff --git a/examples/mcbench/scripts/all_5729.sh b/examples/mcbench/scripts/all_5729.sh index 8ae8305..defec72 100755 --- a/examples/mcbench/scripts/all_5729.sh +++ b/examples/mcbench/scripts/all_5729.sh | |||
@@ -1,26 +1,14 @@ | |||
1 | # Set of TIDL benchmarking test cases for AM5729 SoC, with 2xDSP and 4xEVE | 1 | # Set of TIDL benchmarking test cases for AM5729 SoC, with 2xDSP and 4xEVE |
2 | ./mcbench -g 1 -d 0 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet1.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y | 2 | export TIDL_NETWORK_HEAP_SIZE_EVE=56623104 |
3 | ./mcbench -g 1 -d 2 -e 0 -c ../test/testvecs/config/infer/tidl_config_mobileNet1.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y | 3 | export TIDL_NETWORK_HEAP_SIZE_DSP=56623104 |
4 | ./mcbench -g 1 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
5 | ./mcbench -g 1 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_dense.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
6 | |||
7 | export TIDL_NETWORK_HEAP_SIZE_EVE=67108864 | ||
8 | export TIDL_NETWORK_HEAP_SIZE_DSP=8388608 | ||
4 | ./mcbench -g 2 -d 1 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet1_lg2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y | 9 | ./mcbench -g 2 -d 1 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet1_lg2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y |
5 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet1_lg2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y | 10 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet1_lg2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y |
6 | ./mcbench -g 1 -d 0 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y | ||
7 | ./mcbench -g 1 -d 2 -e 0 -c ../test/testvecs/config/infer/tidl_config_mobileNet2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y | ||
8 | ./mcbench -g 2 -d 1 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet2_lg2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y | ||
9 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet2_lg2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y | 11 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_mobileNet2_lg2.txt -f 50 -i ../test/testvecs/input/preproc_2_224x224_multi.y |
10 | ./mcbench -g 1 -d 0 -e 4 -c ../test/testvecs/config/infer/tidl_config_squeeze1_1.txt -f 50 -i ../test/testvecs/input/preproc_1_227x227_multi.y | ||
11 | ./mcbench -g 1 -d 2 -e 0 -c ../test/testvecs/config/infer/tidl_config_squeeze1_1.txt -f 50 -i ../test/testvecs/input/preproc_1_227x227_multi.y | ||
12 | ./mcbench -g 1 -d 0 -e 4 -c ../test/testvecs/config/infer/tidl_config_inceptionNetv1.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
13 | ./mcbench -g 1 -d 2 -e 0 -c ../test/testvecs/config/infer/tidl_config_inceptionNetv1.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
14 | ./mcbench -g 2 -d 1 -e 4 -c ../test/testvecs/config/infer/tidl_config_inceptionNetv1_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
15 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_inceptionNetv1_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | 12 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_inceptionNetv1_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y |
16 | ./mcbench -g 1 -d 0 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
17 | ./mcbench -g 1 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
18 | ./mcbench -g 2 -d 1 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
19 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | 13 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y |
20 | ./mcbench -g 1 -d 0 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_dense.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
21 | ./mcbench -g 1 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_dense.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
22 | ./mcbench -g 2 -d 1 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_dense_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | ||
23 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_dense_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y | 14 | ./mcbench -g 2 -d 2 -e 4 -c ../test/testvecs/config/infer/tidl_config_j11_v2_dense_lg2.txt -f 50 -i ../test/testvecs/input/preproc_0_224x224_multi.y |
24 | ./mcbench -g 1 -d 0 -e 4 -c ../test/testvecs/config/infer/tidl_config_jseg21_dense.txt -f 50 -i ../test/testvecs/input/000100_1024x512_bgr.y | ||
25 | ./mcbench -g 1 -d 0 -e 4 -c ../test/testvecs/config/infer/tidl_config_jseg21.txt -f 50 -i ../test/testvecs/input/000100_1024x512_bgr.y | ||
26 | ./mcbench -g 2 -d 1 -e 4 -c ../test/testvecs/config/infer/tidl_config_jdetnet.txt -f 50 -i ../test/testvecs/input/preproc_0_768x320_multi.y | ||