1 <counter_set name="L2C-310_cntX">\r
2 <counter name="L2C-310_cnt0"/>\r
3 <counter name="L2C-310_cnt1"/>\r
4 </counter_set>\r
5 <category name="L2C-310" counter_set="L2C-310_cntX" per_cpu="no">\r
6 <event event="0x1" title="L2 Cache" name="CO" description="Eviction, CastOut, of a line from the L2 cache"/>\r
7 <event event="0x2" title="L2 Cache" name="DRH" description="Data read hit"/>\r
8 <event event="0x3" title="L2 Cache" name="DRREQ" description="Data read request"/>\r
9 <event event="0x4" title="L2 Cache" name="DWHIT" description="Data write hit"/>\r
10 <event event="0x5" title="L2 Cache" name="DWREQ" description="Data write request"/>\r
11 <event event="0x6" title="L2 Cache" name="DWTREQ" description="Data write request with write-through attribute"/>\r
12 <event event="0x7" title="L2 Cache" name="IRHIT" description="Instruction read hit"/>\r
13 <event event="0x8" title="L2 Cache" name="IRREQ" description="Instruction read request"/>\r
14 <event event="0x9" title="L2 Cache" name="WA" description="Write allocate"/>\r
15 <event event="0xa" title="L2 Cache" name="IPFALLOC" description="Allocation of a prefetch generated by L2C-310 into the L2 cache"/>\r
16 <event event="0xb" title="L2 Cache" name="EPFHIT" description="Prefetch hint hits in the L2 cache"/>\r
17 <event event="0xc" title="L2 Cache" name="EPFALLOC" description="Prefetch hint allocated into the L2 cache"/>\r
18 <event event="0xd" title="L2 Cache" name="SRRCVD" description="Speculative read received"/>\r
19 <event event="0xe" title="L2 Cache" name="SRCONF" description="Speculative read confirmed"/>\r
20 <event event="0xf" title="L2 Cache" name="EPFRCVD" description="Prefetch hint received"/>\r
21 </category>\r