driver/gator_events_scorpion.c

   1 /**
   2  * Copyright (C) ARM Limited 2011-2012. All rights reserved.
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 #include "gator.h"
  10
  11 // gator_events_perf_pmu.c is used if perf is supported
  12 #if GATOR_NO_PERF_SUPPORT
  13
  14 static const char *pmnc_name;
  15 static int pmnc_counters;
  16
  17 // Per-CPU PMNC: config reg
  18 #define PMNC_E          (1 << 0)        /* Enable all counters */
  19 #define PMNC_P          (1 << 1)        /* Reset all counters */
  20 #define PMNC_C          (1 << 2)        /* Cycle counter reset */
  21 #define PMNC_D          (1 << 3)        /* CCNT counts every 64th cpu cycle */
  22 #define PMNC_X          (1 << 4)        /* Export to ETM */
  23 #define PMNC_DP         (1 << 5)        /* Disable CCNT if non-invasive debug*/
  24 #define PMNC_MASK       0x3f            /* Mask for writable bits */
  25
  26 // ccnt reg
  27 #define CCNT_REG        (1 << 31)
  28
  29 #define CCNT            0
  30 #define CNT0            1
  31 #define CNTMAX          (4+1)
  32
  33 static unsigned long pmnc_enabled[CNTMAX];
  34 static unsigned long pmnc_event[CNTMAX];
  35 static unsigned long pmnc_key[CNTMAX];
  36
  37 static DEFINE_PER_CPU(int[CNTMAX], perfPrev);
  38 static DEFINE_PER_CPU(int[CNTMAX * 2], perfCnt);
  39
  40 enum scorpion_perf_types {
  41         SCORPION_ICACHE_EXPL_INV                = 0x4c,
  42         SCORPION_ICACHE_MISS                    = 0x4d,
  43         SCORPION_ICACHE_ACCESS                  = 0x4e,
  44         SCORPION_ICACHE_CACHEREQ_L2             = 0x4f,
  45         SCORPION_ICACHE_NOCACHE_L2              = 0x50,
  46         SCORPION_HIQUP_NOPED                    = 0x51,
  47         SCORPION_DATA_ABORT                     = 0x52,
  48         SCORPION_IRQ                            = 0x53,
  49         SCORPION_FIQ                            = 0x54,
  50         SCORPION_ALL_EXCPT                      = 0x55,
  51         SCORPION_UNDEF                          = 0x56,
  52         SCORPION_SVC                            = 0x57,
  53         SCORPION_SMC                            = 0x58,
  54         SCORPION_PREFETCH_ABORT                 = 0x59,
  55         SCORPION_INDEX_CHECK                    = 0x5a,
  56         SCORPION_NULL_CHECK                     = 0x5b,
  57         SCORPION_EXPL_ICIALLU                   = 0x5c,
  58         SCORPION_IMPL_ICIALLU                   = 0x5d,
  59         SCORPION_NONICIALLU_BTAC_INV            = 0x5e,
  60         SCORPION_ICIMVAU_IMPL_ICIALLU           = 0x5f,
  61         SCORPION_SPIPE_ONLY_CYCLES              = 0x60,
  62         SCORPION_XPIPE_ONLY_CYCLES              = 0x61,
  63         SCORPION_DUAL_CYCLES                    = 0x62,
  64         SCORPION_DISPATCH_ANY_CYCLES            = 0x63,
  65         SCORPION_FIFO_FULLBLK_CMT               = 0x64,
  66         SCORPION_FAIL_COND_INST                 = 0x65,
  67         SCORPION_PASS_COND_INST                 = 0x66,
  68         SCORPION_ALLOW_VU_CLK                   = 0x67,
  69         SCORPION_VU_IDLE                        = 0x68,
  70         SCORPION_ALLOW_L2_CLK                   = 0x69,
  71         SCORPION_L2_IDLE                        = 0x6a,
  72         SCORPION_DTLB_IMPL_INV_SCTLR_DACR       = 0x6b,
  73         SCORPION_DTLB_EXPL_INV                  = 0x6c,
  74         SCORPION_DTLB_MISS                      = 0x6d,
  75         SCORPION_DTLB_ACCESS                    = 0x6e,
  76         SCORPION_ITLB_MISS                      = 0x6f,
  77         SCORPION_ITLB_IMPL_INV                  = 0x70,
  78         SCORPION_ITLB_EXPL_INV                  = 0x71,
  79         SCORPION_UTLB_D_MISS                    = 0x72,
  80         SCORPION_UTLB_D_ACCESS                  = 0x73,
  81         SCORPION_UTLB_I_MISS                    = 0x74,
  82         SCORPION_UTLB_I_ACCESS                  = 0x75,
  83         SCORPION_UTLB_INV_ASID                  = 0x76,
  84         SCORPION_UTLB_INV_MVA                   = 0x77,
  85         SCORPION_UTLB_INV_ALL                   = 0x78,
  86         SCORPION_S2_HOLD_RDQ_UNAVAIL            = 0x79,
  87         SCORPION_S2_HOLD                        = 0x7a,
  88         SCORPION_S2_HOLD_DEV_OP                 = 0x7b,
  89         SCORPION_S2_HOLD_ORDER                  = 0x7c,
  90         SCORPION_S2_HOLD_BARRIER                = 0x7d,
  91         SCORPION_VIU_DUAL_CYCLE                 = 0x7e,
  92         SCORPION_VIU_SINGLE_CYCLE               = 0x7f,
  93         SCORPION_VX_PIPE_WAR_STALL_CYCLES       = 0x80,
  94         SCORPION_VX_PIPE_WAW_STALL_CYCLES       = 0x81,
  95         SCORPION_VX_PIPE_RAW_STALL_CYCLES       = 0x82,
  96         SCORPION_VX_PIPE_LOAD_USE_STALL         = 0x83,
  97         SCORPION_VS_PIPE_WAR_STALL_CYCLES       = 0x84,
  98         SCORPION_VS_PIPE_WAW_STALL_CYCLES       = 0x85,
  99         SCORPION_VS_PIPE_RAW_STALL_CYCLES       = 0x86,
 100         SCORPION_EXCEPTIONS_INV_OPERATION       = 0x87,
 101         SCORPION_EXCEPTIONS_DIV_BY_ZERO         = 0x88,
 102         SCORPION_COND_INST_FAIL_VX_PIPE         = 0x89,
 103         SCORPION_COND_INST_FAIL_VS_PIPE         = 0x8a,
 104         SCORPION_EXCEPTIONS_OVERFLOW            = 0x8b,
 105         SCORPION_EXCEPTIONS_UNDERFLOW           = 0x8c,
 106         SCORPION_EXCEPTIONS_DENORM              = 0x8d,
 107 #ifdef CONFIG_ARCH_MSM_SCORPIONMP
 108         SCORPIONMP_NUM_BARRIERS                 = 0x8e,
 109         SCORPIONMP_BARRIER_CYCLES               = 0x8f,
 110 #else
 111         SCORPION_BANK_AB_HIT                    = 0x8e,
 112         SCORPION_BANK_AB_ACCESS                 = 0x8f,
 113         SCORPION_BANK_CD_HIT                    = 0x90,
 114         SCORPION_BANK_CD_ACCESS                 = 0x91,
 115         SCORPION_BANK_AB_DSIDE_HIT              = 0x92,
 116         SCORPION_BANK_AB_DSIDE_ACCESS           = 0x93,
 117         SCORPION_BANK_CD_DSIDE_HIT              = 0x94,
 118         SCORPION_BANK_CD_DSIDE_ACCESS           = 0x95,
 119         SCORPION_BANK_AB_ISIDE_HIT              = 0x96,
 120         SCORPION_BANK_AB_ISIDE_ACCESS           = 0x97,
 121         SCORPION_BANK_CD_ISIDE_HIT              = 0x98,
 122         SCORPION_BANK_CD_ISIDE_ACCESS           = 0x99,
 123         SCORPION_ISIDE_RD_WAIT                  = 0x9a,
 124         SCORPION_DSIDE_RD_WAIT                  = 0x9b,
 125         SCORPION_BANK_BYPASS_WRITE              = 0x9c,
 126         SCORPION_BANK_AB_NON_CASTOUT            = 0x9d,
 127         SCORPION_BANK_AB_L2_CASTOUT             = 0x9e,
 128         SCORPION_BANK_CD_NON_CASTOUT            = 0x9f,
 129         SCORPION_BANK_CD_L2_CASTOUT             = 0xa0,
 130 #endif
 131         MSM_MAX_EVT
 132 };
 133
 134 struct scorp_evt {
 135         u32 evt_type;
 136         u32 val;
 137         u8 grp;
 138         u32 evt_type_act;
 139 };
 140
 141 static const struct scorp_evt sc_evt[] = {
 142         {SCORPION_ICACHE_EXPL_INV, 0x80000500, 0, 0x4d},
 143         {SCORPION_ICACHE_MISS, 0x80050000, 0, 0x4e},
 144         {SCORPION_ICACHE_ACCESS, 0x85000000, 0, 0x4f},
 145         {SCORPION_ICACHE_CACHEREQ_L2, 0x86000000, 0, 0x4f},
 146         {SCORPION_ICACHE_NOCACHE_L2, 0x87000000, 0, 0x4f},
 147         {SCORPION_HIQUP_NOPED, 0x80080000, 0, 0x4e},
 148         {SCORPION_DATA_ABORT, 0x8000000a, 0, 0x4c},
 149         {SCORPION_IRQ, 0x80000a00, 0, 0x4d},
 150         {SCORPION_FIQ, 0x800a0000, 0, 0x4e},
 151         {SCORPION_ALL_EXCPT, 0x8a000000, 0, 0x4f},
 152         {SCORPION_UNDEF, 0x8000000b, 0, 0x4c},
 153         {SCORPION_SVC, 0x80000b00, 0, 0x4d},
 154         {SCORPION_SMC, 0x800b0000, 0, 0x4e},
 155         {SCORPION_PREFETCH_ABORT, 0x8b000000, 0, 0x4f},
 156         {SCORPION_INDEX_CHECK, 0x8000000c, 0, 0x4c},
 157         {SCORPION_NULL_CHECK, 0x80000c00, 0, 0x4d},
 158         {SCORPION_EXPL_ICIALLU, 0x8000000d, 0, 0x4c},
 159         {SCORPION_IMPL_ICIALLU, 0x80000d00, 0, 0x4d},
 160         {SCORPION_NONICIALLU_BTAC_INV, 0x800d0000, 0, 0x4e},
 161         {SCORPION_ICIMVAU_IMPL_ICIALLU, 0x8d000000, 0, 0x4f},
 162
 163         {SCORPION_SPIPE_ONLY_CYCLES, 0x80000600, 1, 0x51},
 164         {SCORPION_XPIPE_ONLY_CYCLES, 0x80060000, 1, 0x52},
 165         {SCORPION_DUAL_CYCLES, 0x86000000, 1, 0x53},
 166         {SCORPION_DISPATCH_ANY_CYCLES, 0x89000000, 1, 0x53},
 167         {SCORPION_FIFO_FULLBLK_CMT, 0x8000000d, 1, 0x50},
 168         {SCORPION_FAIL_COND_INST, 0x800d0000, 1, 0x52},
 169         {SCORPION_PASS_COND_INST, 0x8d000000, 1, 0x53},
 170         {SCORPION_ALLOW_VU_CLK, 0x8000000e, 1, 0x50},
 171         {SCORPION_VU_IDLE, 0x80000e00, 1, 0x51},
 172         {SCORPION_ALLOW_L2_CLK, 0x800e0000, 1, 0x52},
 173         {SCORPION_L2_IDLE, 0x8e000000, 1, 0x53},
 174
 175         {SCORPION_DTLB_IMPL_INV_SCTLR_DACR, 0x80000001, 2, 0x54},
 176         {SCORPION_DTLB_EXPL_INV, 0x80000100, 2, 0x55},
 177         {SCORPION_DTLB_MISS, 0x80010000, 2, 0x56},
 178         {SCORPION_DTLB_ACCESS, 0x81000000, 2, 0x57},
 179         {SCORPION_ITLB_MISS, 0x80000200, 2, 0x55},
 180         {SCORPION_ITLB_IMPL_INV, 0x80020000, 2, 0x56},
 181         {SCORPION_ITLB_EXPL_INV, 0x82000000, 2, 0x57},
 182         {SCORPION_UTLB_D_MISS, 0x80000003, 2, 0x54},
 183         {SCORPION_UTLB_D_ACCESS, 0x80000300, 2, 0x55},
 184         {SCORPION_UTLB_I_MISS, 0x80030000, 2, 0x56},
 185         {SCORPION_UTLB_I_ACCESS, 0x83000000, 2, 0x57},
 186         {SCORPION_UTLB_INV_ASID, 0x80000400, 2, 0x55},
 187         {SCORPION_UTLB_INV_MVA, 0x80040000, 2, 0x56},
 188         {SCORPION_UTLB_INV_ALL, 0x84000000, 2, 0x57},
 189         {SCORPION_S2_HOLD_RDQ_UNAVAIL, 0x80000800, 2, 0x55},
 190         {SCORPION_S2_HOLD, 0x88000000, 2, 0x57},
 191         {SCORPION_S2_HOLD_DEV_OP, 0x80000900, 2, 0x55},
 192         {SCORPION_S2_HOLD_ORDER, 0x80090000, 2, 0x56},
 193         {SCORPION_S2_HOLD_BARRIER, 0x89000000, 2, 0x57},
 194
 195         {SCORPION_VIU_DUAL_CYCLE, 0x80000001, 4, 0x5c},
 196         {SCORPION_VIU_SINGLE_CYCLE, 0x80000100, 4, 0x5d},
 197         {SCORPION_VX_PIPE_WAR_STALL_CYCLES, 0x80000005, 4, 0x5c},
 198         {SCORPION_VX_PIPE_WAW_STALL_CYCLES, 0x80000500, 4, 0x5d},
 199         {SCORPION_VX_PIPE_RAW_STALL_CYCLES, 0x80050000, 4, 0x5e},
 200         {SCORPION_VX_PIPE_LOAD_USE_STALL, 0x80000007, 4, 0x5c},
 201         {SCORPION_VS_PIPE_WAR_STALL_CYCLES, 0x80000008, 4, 0x5c},
 202         {SCORPION_VS_PIPE_WAW_STALL_CYCLES, 0x80000800, 4, 0x5d},
 203         {SCORPION_VS_PIPE_RAW_STALL_CYCLES, 0x80080000, 4, 0x5e},
 204         {SCORPION_EXCEPTIONS_INV_OPERATION, 0x8000000b, 4, 0x5c},
 205         {SCORPION_EXCEPTIONS_DIV_BY_ZERO, 0x80000b00, 4, 0x5d},
 206         {SCORPION_COND_INST_FAIL_VX_PIPE, 0x800b0000, 4, 0x5e},
 207         {SCORPION_COND_INST_FAIL_VS_PIPE, 0x8b000000, 4, 0x5f},
 208         {SCORPION_EXCEPTIONS_OVERFLOW, 0x8000000c, 4, 0x5c},
 209         {SCORPION_EXCEPTIONS_UNDERFLOW, 0x80000c00, 4, 0x5d},
 210         {SCORPION_EXCEPTIONS_DENORM, 0x8c000000, 4, 0x5f},
 211
 212 #ifdef CONFIG_ARCH_MSM_SCORPIONMP
 213     {SCORPIONMP_NUM_BARRIERS, 0x80000e00, 3, 0x59},
 214     {SCORPIONMP_BARRIER_CYCLES, 0x800e0000, 3, 0x5a},
 215 #else
 216         {SCORPION_BANK_AB_HIT, 0x80000001, 3, 0x58},
 217         {SCORPION_BANK_AB_ACCESS, 0x80000100, 3, 0x59},
 218         {SCORPION_BANK_CD_HIT, 0x80010000, 3, 0x5a},
 219         {SCORPION_BANK_CD_ACCESS, 0x81000000, 3, 0x5b},
 220         {SCORPION_BANK_AB_DSIDE_HIT, 0x80000002, 3, 0x58},
 221         {SCORPION_BANK_AB_DSIDE_ACCESS, 0x80000200, 3, 0x59},
 222         {SCORPION_BANK_CD_DSIDE_HIT, 0x80020000, 3, 0x5a},
 223         {SCORPION_BANK_CD_DSIDE_ACCESS, 0x82000000, 3, 0x5b},
 224         {SCORPION_BANK_AB_ISIDE_HIT, 0x80000003, 3, 0x58},
 225         {SCORPION_BANK_AB_ISIDE_ACCESS, 0x80000300, 3, 0x59},
 226         {SCORPION_BANK_CD_ISIDE_HIT, 0x80030000, 3, 0x5a},
 227         {SCORPION_BANK_CD_ISIDE_ACCESS, 0x83000000, 3, 0x5b},
 228         {SCORPION_ISIDE_RD_WAIT, 0x80000009, 3, 0x58},
 229         {SCORPION_DSIDE_RD_WAIT, 0x80090000, 3, 0x5a},
 230         {SCORPION_BANK_BYPASS_WRITE, 0x8000000a, 3, 0x58},
 231         {SCORPION_BANK_AB_NON_CASTOUT, 0x8000000c, 3, 0x58},
 232         {SCORPION_BANK_AB_L2_CASTOUT, 0x80000c00, 3, 0x59},
 233         {SCORPION_BANK_CD_NON_CASTOUT, 0x800c0000, 3, 0x5a},
 234         {SCORPION_BANK_CD_L2_CASTOUT, 0x8c000000, 3, 0x5b},
 235 #endif
 236 };
 237
 238 static inline void scorpion_pmnc_write(u32 val)
 239 {
 240         val &= PMNC_MASK;
 241         asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r" (val));
 242 }
 243
 244 static inline u32 scorpion_pmnc_read(void)
 245 {
 246         u32 val;
 247         asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
 248         return val;
 249 }
 250
 251 static inline u32 scorpion_ccnt_read(void)
 252 {
 253         u32 val;
 254         asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
 255         return val;
 256 }
 257
 258 static inline u32 scorpion_cntn_read(void)
 259 {
 260         u32 val;
 261         asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val));
 262         return val;
 263 }
 264
 265 static inline u32 scorpion_pmnc_enable_counter(unsigned int cnt)
 266 {
 267         u32 val;
 268
 269         if (cnt >= CNTMAX) {
 270                 pr_err("gator: CPU%u enabling wrong PMNC counter %d\n", smp_processor_id(), cnt);
 271                 return -1;
 272         }
 273
 274         if (cnt == CCNT)
 275                 val = CCNT_REG;
 276         else
 277                 val = (1 << (cnt - CNT0));
 278
 279         asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val));
 280
 281         return cnt;
 282 }
 283
 284 static inline u32 scorpion_pmnc_disable_counter(unsigned int cnt)
 285 {
 286         u32 val;
 287
 288         if (cnt >= CNTMAX) {
 289                 pr_err("gator: CPU%u disabling wrong PMNC counter %d\n", smp_processor_id(), cnt);
 290                 return -1;
 291         }
 292
 293         if (cnt == CCNT)
 294                 val = CCNT_REG;
 295         else
 296                 val = (1 << (cnt - CNT0));
 297
 298         asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val));
 299
 300         return cnt;
 301 }
 302
 303 static inline int scorpion_pmnc_select_counter(unsigned int cnt)
 304 {
 305         u32 val;
 306
 307         if ((cnt == CCNT) || (cnt >= CNTMAX)) {
 308                 pr_err("gator: CPU%u selecting wrong PMNC counter %d\n", smp_processor_id(), cnt);
 309                 return -1;
 310         }
 311
 312         val = (cnt - CNT0);
 313         asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val));
 314
 315         return cnt;
 316 }
 317
 318 static u32 scorpion_read_lpm0(void)
 319 {
 320         u32 val;
 321         asm volatile("mrc p15, 0, %0, c15, c0, 0" : "=r" (val));
 322         return val;
 323 }
 324
 325 static void scorpion_write_lpm0(u32 val)
 326 {
 327         asm volatile("mcr p15, 0, %0, c15, c0, 0" : : "r" (val));
 328 }
 329
 330 static u32 scorpion_read_lpm1(void)
 331 {
 332         u32 val;
 333         asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r" (val));
 334         return val;
 335 }
 336
 337 static void scorpion_write_lpm1(u32 val)
 338 {
 339         asm volatile("mcr p15, 1, %0, c15, c0, 0" : : "r" (val));
 340 }
 341
 342 static u32 scorpion_read_lpm2(void)
 343 {
 344         u32 val;
 345         asm volatile("mrc p15, 2, %0, c15, c0, 0" : "=r" (val));
 346         return val;
 347 }
 348
 349 static void scorpion_write_lpm2(u32 val)
 350 {
 351         asm volatile("mcr p15, 2, %0, c15, c0, 0" : : "r" (val));
 352 }
 353
 354 static u32 scorpion_read_l2lpm(void)
 355 {
 356         u32 val;
 357         asm volatile("mrc p15, 3, %0, c15, c2, 0" : "=r" (val));
 358         return val;
 359 }
 360
 361 static void scorpion_write_l2lpm(u32 val)
 362 {
 363         asm volatile("mcr p15, 3, %0, c15, c2, 0" : : "r" (val));
 364 }
 365
 366 static u32 scorpion_read_vlpm(void)
 367 {
 368         u32 val;
 369         asm volatile("mrc p10, 7, %0, c11, c0, 0" : "=r" (val));
 370         return val;
 371 }
 372
 373 static void scorpion_write_vlpm(u32 val)
 374 {
 375         asm volatile("mcr p10, 7, %0, c11, c0, 0" : : "r" (val));
 376 }
 377
 378 struct scorpion_access_funcs {
 379         u32 (*read) (void);
 380         void (*write) (u32);
 381 };
 382
 383 struct scorpion_access_funcs scor_func[] = {
 384         {scorpion_read_lpm0, scorpion_write_lpm0},
 385         {scorpion_read_lpm1, scorpion_write_lpm1},
 386         {scorpion_read_lpm2, scorpion_write_lpm2},
 387         {scorpion_read_l2lpm, scorpion_write_l2lpm},
 388         {scorpion_read_vlpm, scorpion_write_vlpm},
 389 };
 390
 391 u32 venum_orig_val;
 392 u32 fp_orig_val;
 393
 394 static void scorpion_pre_vlpm(void)
 395 {
 396         u32 venum_new_val;
 397         u32 fp_new_val;
 398
 399         /* CPACR Enable CP10 access*/
 400         asm volatile("mrc p15, 0, %0, c1, c0, 2" : "=r" (venum_orig_val));
 401         venum_new_val = venum_orig_val | 0x00300000;
 402         asm volatile("mcr p15, 0, %0, c1, c0, 2" : : "r" (venum_new_val));
 403         /* Enable FPEXC */
 404         asm volatile("mrc p10, 7, %0, c8, c0, 0" : "=r" (fp_orig_val));
 405         fp_new_val = fp_orig_val | 0x40000000;
 406         asm volatile("mcr p10, 7, %0, c8, c0, 0" : : "r" (fp_new_val));
 407 }
 408
 409 static void scorpion_post_vlpm(void)
 410 {
 411         /* Restore FPEXC*/
 412         asm volatile("mcr p10, 7, %0, c8, c0, 0" : : "r" (fp_orig_val));
 413         /* Restore CPACR*/
 414         asm volatile("mcr p15, 0, %0, c1, c0, 2" : : "r" (venum_orig_val));
 415 }
 416
 417 #define COLMN0MASK 0x000000ff
 418 #define COLMN1MASK 0x0000ff00
 419 #define COLMN2MASK 0x00ff0000
 420 static u32 scorpion_get_columnmask(u32 setval)
 421 {
 422         if (setval & COLMN0MASK)
 423                 return 0xffffff00;
 424         else if (setval & COLMN1MASK)
 425                 return 0xffff00ff;
 426         else if (setval & COLMN2MASK)
 427                 return 0xff00ffff;
 428         else
 429                 return 0x80ffffff;
 430 }
 431
 432 static void scorpion_evt_setup(u32 gr, u32 setval)
 433 {
 434         u32 val;
 435         if (gr == 4)
 436                 scorpion_pre_vlpm();
 437         val = scorpion_get_columnmask(setval) & scor_func[gr].read();
 438         val = val | setval;
 439         scor_func[gr].write(val);
 440         if (gr == 4)
 441                 scorpion_post_vlpm();
 442 }
 443
 444 static int get_scorpion_evtinfo(unsigned int evt_type, struct scorp_evt *evtinfo)
 445 {
 446         u32 idx;
 447         if ((evt_type < 0x4c) || (evt_type >= MSM_MAX_EVT))
 448                 return 0;
 449         idx = evt_type - 0x4c;
 450         if (sc_evt[idx].evt_type == evt_type) {
 451                 evtinfo->val = sc_evt[idx].val;
 452                 evtinfo->grp = sc_evt[idx].grp;
 453                 evtinfo->evt_type_act = sc_evt[idx].evt_type_act;
 454                 return 1;
 455         }
 456         return 0;
 457 }
 458
 459 static inline void scorpion_pmnc_write_evtsel(unsigned int cnt, u32 val)
 460 {
 461         if (scorpion_pmnc_select_counter(cnt) == cnt) {
 462                 if (val < 0x40) {
 463                         asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
 464                 } else {
 465                         u32 zero = 0;
 466                         struct scorp_evt evtinfo;
 467                         // extract evtinfo.grp and evtinfo.tevt_type_act from val
 468                         if (get_scorpion_evtinfo(val, &evtinfo) == 0) return;
 469                         asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (evtinfo.evt_type_act));
 470                         asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (zero));
 471                         scorpion_evt_setup(evtinfo.grp, val);
 472                 }
 473         }
 474 }
 475
 476 static void scorpion_pmnc_reset_counter(unsigned int cnt)
 477 {
 478         u32 val = 0;
 479
 480         if (cnt == CCNT) {
 481                 scorpion_pmnc_disable_counter(cnt);
 482
 483                 asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (val));
 484
 485                 if (pmnc_enabled[cnt] != 0)
 486                     scorpion_pmnc_enable_counter(cnt);
 487
 488         } else if (cnt >= CNTMAX) {
 489                 pr_err("gator: CPU%u resetting wrong PMNC counter %d\n", smp_processor_id(), cnt);
 490         } else {
 491                 scorpion_pmnc_disable_counter(cnt);
 492
 493                 if (scorpion_pmnc_select_counter(cnt) == cnt)
 494                     asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (val));
 495
 496                 if (pmnc_enabled[cnt] != 0)
 497                     scorpion_pmnc_enable_counter(cnt);
 498         }
 499 }
 500
 501 static int gator_events_scorpion_create_files(struct super_block *sb, struct dentry *root)
 502 {
 503         struct dentry *dir;
 504         int i;
 505
 506         for (i = 0; i < pmnc_counters; i++) {
 507                 char buf[40];
 508                 if (i == 0) {
 509                         snprintf(buf, sizeof buf, "%s_ccnt", pmnc_name);
 510                 } else {
 511                         snprintf(buf, sizeof buf, "%s_cnt%d", pmnc_name, i-1);
 512                 }
 513                 dir = gatorfs_mkdir(sb, root, buf);
 514                 if (!dir) {
 515                         return -1;
 516                 }
 517                 gatorfs_create_ulong(sb, dir, "enabled", &pmnc_enabled[i]);
 518                 gatorfs_create_ro_ulong(sb, dir, "key", &pmnc_key[i]);
 519                 if (i > 0) {
 520                         gatorfs_create_ulong(sb, dir, "event", &pmnc_event[i]);
 521                 }
 522         }
 523
 524         return 0;
 525 }
 526
 527 static int gator_events_scorpion_online(int** buffer)
 528 {
 529         unsigned int cnt, len = 0, cpu = smp_processor_id();
 530
 531         if (scorpion_pmnc_read() & PMNC_E) {
 532                 scorpion_pmnc_write(scorpion_pmnc_read() & ~PMNC_E);
 533         }
 534
 535         /* Initialize & Reset PMNC: C bit and P bit */
 536         scorpion_pmnc_write(PMNC_P | PMNC_C);
 537
 538         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
 539                 unsigned long event;
 540
 541                 per_cpu(perfPrev, smp_processor_id())[cnt] = 0;
 542
 543                 if (!pmnc_enabled[cnt])
 544                         continue;
 545
 546                 // disable counter
 547                 scorpion_pmnc_disable_counter(cnt);
 548
 549                 event = pmnc_event[cnt] & 255;
 550
 551                 // Set event (if destined for PMNx counters), We don't need to set the event if it's a cycle count
 552                 if (cnt != CCNT)
 553                         scorpion_pmnc_write_evtsel(cnt, event);
 554
 555                 // reset counter
 556                 scorpion_pmnc_reset_counter(cnt);
 557
 558                 // Enable counter, do not enable interrupt for this counter
 559                 scorpion_pmnc_enable_counter(cnt);
 560         }
 561
 562         // enable
 563         scorpion_pmnc_write(scorpion_pmnc_read() | PMNC_E);
 564
 565         // read the counters and toss the invalid data, return zero instead
 566         for (cnt = 0; cnt < pmnc_counters; cnt++) {
 567                 if (pmnc_enabled[cnt]) {
 568                         int value;
 569                         if (cnt == CCNT) {
 570                                 value = scorpion_ccnt_read();
 571                         } else if (scorpion_pmnc_select_counter(cnt) == cnt) {
 572                                 value = scorpion_cntn_read();
 573                         } else {
 574                                 value = 0;
 575                         }
 576                         scorpion_pmnc_reset_counter(cnt);
 577                         per_cpu(perfPrev, cpu)[cnt] = 0;
 578                         per_cpu(perfCnt, cpu)[len++] = pmnc_key[cnt];
 579                         per_cpu(perfCnt, cpu)[len++] = 0;
 580                 }
 581         }
 582
 583         if (buffer)
 584                 *buffer = per_cpu(perfCnt, cpu);
 585
 586         return len;
 587 }
 588
 589 static int gator_events_scorpion_offline(int** buffer)
 590 {
 591         scorpion_pmnc_write(scorpion_pmnc_read() & ~PMNC_E);
 592         return 0;
 593 }
 594
 595 static void gator_events_scorpion_stop(void)
 596 {
 597         unsigned int cnt;
 598
 599         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
 600                 pmnc_enabled[cnt] = 0;
 601                 pmnc_event[cnt] = 0;
 602         }
 603 }
 604
 605 static int gator_events_scorpion_read(int **buffer)
 606 {
 607         int cnt, len = 0;
 608         int cpu = smp_processor_id();
 609
 610         for (cnt = 0; cnt < pmnc_counters; cnt++) {
 611                 if (pmnc_enabled[cnt]) {
 612                         int value;
 613                         if (cnt == CCNT) {
 614                                 value = scorpion_ccnt_read();
 615                         } else if (scorpion_pmnc_select_counter(cnt) == cnt) {
 616                                 value = scorpion_cntn_read();
 617                         } else {
 618                                 value = 0;
 619                         }
 620                         scorpion_pmnc_reset_counter(cnt);
 621                         if (value != per_cpu(perfPrev, cpu)[cnt]) {
 622                                 per_cpu(perfPrev, cpu)[cnt] = value;
 623                                 per_cpu(perfCnt, cpu)[len++] = pmnc_key[cnt];
 624                                 per_cpu(perfCnt, cpu)[len++] = value;
 625                         }
 626                 }
 627         }
 628
 629         if (buffer)
 630                 *buffer = per_cpu(perfCnt, cpu);
 631
 632         return len;
 633 }
 634
 635 static struct gator_interface gator_events_scorpion_interface = {
 636         .create_files = gator_events_scorpion_create_files,
 637         .stop = gator_events_scorpion_stop,
 638         .online = gator_events_scorpion_online,
 639         .offline = gator_events_scorpion_offline,
 640         .read = gator_events_scorpion_read,
 641 };
 642
 643 int gator_events_scorpion_init(void)
 644 {
 645         unsigned int cnt;
 646
 647         switch (gator_cpuid()) {
 648         case SCORPION:
 649                 pmnc_name = "Scorpion";
 650                 pmnc_counters = 4;
 651                 break;
 652         case SCORPIONMP:
 653                 pmnc_name = "ScorpionMP";
 654                 pmnc_counters = 4;
 655                 break;
 656         default:
 657                 return -1;
 658         }
 659
 660         pmnc_counters++; // CNT[n] + CCNT
 661
 662         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
 663                 pmnc_enabled[cnt] = 0;
 664                 pmnc_event[cnt] = 0;
 665                 pmnc_key[cnt] = gator_events_get_key();
 666         }
 667
 668         return gator_events_install(&gator_events_scorpion_interface);
 669 }
 670
 671 gator_events_init(gator_events_scorpion_init);
 672
 673 #else
 674 int gator_events_scorpion_init(void)
 675 {
 676         return -1;
 677 }
 678 #endif