gator: ARM DS-5.6 Streamline gator driver
[android-sdk/arm-ds5-gator.git] / gator_events_scorpion.c
1 /**
2  * Copyright (C) ARM Limited 2011. All rights reserved.
3  *
4  * This program is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License version 2 as
6  * published by the Free Software Foundation.
7  */
9 #include "gator.h"
11 #define SCORPION        0xf
12 #define SCORPIONMP      0x2d
14 static const char *pmnc_name;
15 static int pmnc_count;
17 // Per-CPU PMNC: config reg
18 #define PMNC_E          (1 << 0)        /* Enable all counters */
19 #define PMNC_P          (1 << 1)        /* Reset all counters */
20 #define PMNC_C          (1 << 2)        /* Cycle counter reset */
21 #define PMNC_D          (1 << 3)        /* CCNT counts every 64th cpu cycle */
22 #define PMNC_X          (1 << 4)        /* Export to ETM */
23 #define PMNC_DP         (1 << 5)        /* Disable CCNT if non-invasive debug*/
24 #define PMNC_MASK       0x3f            /* Mask for writable bits */
26 // ccnt reg
27 #define CCNT_REG        (1 << 31)
29 #define CCNT            0
30 #define CNT0            1
31 #define CNTMAX          (4+1)
33 static unsigned long pmnc_enabled[CNTMAX];
34 static unsigned long pmnc_event[CNTMAX];
35 static unsigned long pmnc_key[CNTMAX];
37 static DEFINE_PER_CPU(int[CNTMAX], perfPrev);
38 static DEFINE_PER_CPU(int[CNTMAX * 2], perfCnt);
40 enum scorpion_perf_types {
41         SCORPION_ICACHE_EXPL_INV                = 0x4c,
42         SCORPION_ICACHE_MISS                    = 0x4d,
43         SCORPION_ICACHE_ACCESS                  = 0x4e,
44         SCORPION_ICACHE_CACHEREQ_L2             = 0x4f,
45         SCORPION_ICACHE_NOCACHE_L2              = 0x50,
46         SCORPION_HIQUP_NOPED                    = 0x51,
47         SCORPION_DATA_ABORT                     = 0x52,
48         SCORPION_IRQ                            = 0x53,
49         SCORPION_FIQ                            = 0x54,
50         SCORPION_ALL_EXCPT                      = 0x55,
51         SCORPION_UNDEF                          = 0x56,
52         SCORPION_SVC                            = 0x57,
53         SCORPION_SMC                            = 0x58,
54         SCORPION_PREFETCH_ABORT                 = 0x59,
55         SCORPION_INDEX_CHECK                    = 0x5a,
56         SCORPION_NULL_CHECK                     = 0x5b,
57         SCORPION_EXPL_ICIALLU                   = 0x5c,
58         SCORPION_IMPL_ICIALLU                   = 0x5d,
59         SCORPION_NONICIALLU_BTAC_INV            = 0x5e,
60         SCORPION_ICIMVAU_IMPL_ICIALLU           = 0x5f,
61         SCORPION_SPIPE_ONLY_CYCLES              = 0x60,
62         SCORPION_XPIPE_ONLY_CYCLES              = 0x61,
63         SCORPION_DUAL_CYCLES                    = 0x62,
64         SCORPION_DISPATCH_ANY_CYCLES            = 0x63,
65         SCORPION_FIFO_FULLBLK_CMT               = 0x64,
66         SCORPION_FAIL_COND_INST                 = 0x65,
67         SCORPION_PASS_COND_INST                 = 0x66,
68         SCORPION_ALLOW_VU_CLK                   = 0x67,
69         SCORPION_VU_IDLE                        = 0x68,
70         SCORPION_ALLOW_L2_CLK                   = 0x69,
71         SCORPION_L2_IDLE                        = 0x6a,
72         SCORPION_DTLB_IMPL_INV_SCTLR_DACR       = 0x6b,
73         SCORPION_DTLB_EXPL_INV                  = 0x6c,
74         SCORPION_DTLB_MISS                      = 0x6d,
75         SCORPION_DTLB_ACCESS                    = 0x6e,
76         SCORPION_ITLB_MISS                      = 0x6f,
77         SCORPION_ITLB_IMPL_INV                  = 0x70,
78         SCORPION_ITLB_EXPL_INV                  = 0x71,
79         SCORPION_UTLB_D_MISS                    = 0x72,
80         SCORPION_UTLB_D_ACCESS                  = 0x73,
81         SCORPION_UTLB_I_MISS                    = 0x74,
82         SCORPION_UTLB_I_ACCESS                  = 0x75,
83         SCORPION_UTLB_INV_ASID                  = 0x76,
84         SCORPION_UTLB_INV_MVA                   = 0x77,
85         SCORPION_UTLB_INV_ALL                   = 0x78,
86         SCORPION_S2_HOLD_RDQ_UNAVAIL            = 0x79,
87         SCORPION_S2_HOLD                        = 0x7a,
88         SCORPION_S2_HOLD_DEV_OP                 = 0x7b,
89         SCORPION_S2_HOLD_ORDER                  = 0x7c,
90         SCORPION_S2_HOLD_BARRIER                = 0x7d,
91         SCORPION_VIU_DUAL_CYCLE                 = 0x7e,
92         SCORPION_VIU_SINGLE_CYCLE               = 0x7f,
93         SCORPION_VX_PIPE_WAR_STALL_CYCLES       = 0x80,
94         SCORPION_VX_PIPE_WAW_STALL_CYCLES       = 0x81,
95         SCORPION_VX_PIPE_RAW_STALL_CYCLES       = 0x82,
96         SCORPION_VX_PIPE_LOAD_USE_STALL         = 0x83,
97         SCORPION_VS_PIPE_WAR_STALL_CYCLES       = 0x84,
98         SCORPION_VS_PIPE_WAW_STALL_CYCLES       = 0x85,
99         SCORPION_VS_PIPE_RAW_STALL_CYCLES       = 0x86,
100         SCORPION_EXCEPTIONS_INV_OPERATION       = 0x87,
101         SCORPION_EXCEPTIONS_DIV_BY_ZERO         = 0x88,
102         SCORPION_COND_INST_FAIL_VX_PIPE         = 0x89,
103         SCORPION_COND_INST_FAIL_VS_PIPE         = 0x8a,
104         SCORPION_EXCEPTIONS_OVERFLOW            = 0x8b,
105         SCORPION_EXCEPTIONS_UNDERFLOW           = 0x8c,
106         SCORPION_EXCEPTIONS_DENORM              = 0x8d,
107 #ifdef CONFIG_ARCH_MSM_SCORPIONMP
108         SCORPIONMP_NUM_BARRIERS                 = 0x8e,
109         SCORPIONMP_BARRIER_CYCLES               = 0x8f,
110 #else
111         SCORPION_BANK_AB_HIT                    = 0x8e,
112         SCORPION_BANK_AB_ACCESS                 = 0x8f,
113         SCORPION_BANK_CD_HIT                    = 0x90,
114         SCORPION_BANK_CD_ACCESS                 = 0x91,
115         SCORPION_BANK_AB_DSIDE_HIT              = 0x92,
116         SCORPION_BANK_AB_DSIDE_ACCESS           = 0x93,
117         SCORPION_BANK_CD_DSIDE_HIT              = 0x94,
118         SCORPION_BANK_CD_DSIDE_ACCESS           = 0x95,
119         SCORPION_BANK_AB_ISIDE_HIT              = 0x96,
120         SCORPION_BANK_AB_ISIDE_ACCESS           = 0x97,
121         SCORPION_BANK_CD_ISIDE_HIT              = 0x98,
122         SCORPION_BANK_CD_ISIDE_ACCESS           = 0x99,
123         SCORPION_ISIDE_RD_WAIT                  = 0x9a,
124         SCORPION_DSIDE_RD_WAIT                  = 0x9b,
125         SCORPION_BANK_BYPASS_WRITE              = 0x9c,
126         SCORPION_BANK_AB_NON_CASTOUT            = 0x9d,
127         SCORPION_BANK_AB_L2_CASTOUT             = 0x9e,
128         SCORPION_BANK_CD_NON_CASTOUT            = 0x9f,
129         SCORPION_BANK_CD_L2_CASTOUT             = 0xa0,
130 #endif
131         MSM_MAX_EVT
132 };
134 struct scorp_evt {
135         u32 evt_type;
136         u32 val;
137         u8 grp;
138         u32 evt_type_act;
139 };
141 static const struct scorp_evt sc_evt[] = {
142         {SCORPION_ICACHE_EXPL_INV, 0x80000500, 0, 0x4d},
143         {SCORPION_ICACHE_MISS, 0x80050000, 0, 0x4e},
144         {SCORPION_ICACHE_ACCESS, 0x85000000, 0, 0x4f},
145         {SCORPION_ICACHE_CACHEREQ_L2, 0x86000000, 0, 0x4f},
146         {SCORPION_ICACHE_NOCACHE_L2, 0x87000000, 0, 0x4f},
147         {SCORPION_HIQUP_NOPED, 0x80080000, 0, 0x4e},
148         {SCORPION_DATA_ABORT, 0x8000000a, 0, 0x4c},
149         {SCORPION_IRQ, 0x80000a00, 0, 0x4d},
150         {SCORPION_FIQ, 0x800a0000, 0, 0x4e},
151         {SCORPION_ALL_EXCPT, 0x8a000000, 0, 0x4f},
152         {SCORPION_UNDEF, 0x8000000b, 0, 0x4c},
153         {SCORPION_SVC, 0x80000b00, 0, 0x4d},
154         {SCORPION_SMC, 0x800b0000, 0, 0x4e},
155         {SCORPION_PREFETCH_ABORT, 0x8b000000, 0, 0x4f},
156         {SCORPION_INDEX_CHECK, 0x8000000c, 0, 0x4c},
157         {SCORPION_NULL_CHECK, 0x80000c00, 0, 0x4d},
158         {SCORPION_EXPL_ICIALLU, 0x8000000d, 0, 0x4c},
159         {SCORPION_IMPL_ICIALLU, 0x80000d00, 0, 0x4d},
160         {SCORPION_NONICIALLU_BTAC_INV, 0x800d0000, 0, 0x4e},
161         {SCORPION_ICIMVAU_IMPL_ICIALLU, 0x8d000000, 0, 0x4f},
163         {SCORPION_SPIPE_ONLY_CYCLES, 0x80000600, 1, 0x51},
164         {SCORPION_XPIPE_ONLY_CYCLES, 0x80060000, 1, 0x52},
165         {SCORPION_DUAL_CYCLES, 0x86000000, 1, 0x53},
166         {SCORPION_DISPATCH_ANY_CYCLES, 0x89000000, 1, 0x53},
167         {SCORPION_FIFO_FULLBLK_CMT, 0x8000000d, 1, 0x50},
168         {SCORPION_FAIL_COND_INST, 0x800d0000, 1, 0x52},
169         {SCORPION_PASS_COND_INST, 0x8d000000, 1, 0x53},
170         {SCORPION_ALLOW_VU_CLK, 0x8000000e, 1, 0x50},
171         {SCORPION_VU_IDLE, 0x80000e00, 1, 0x51},
172         {SCORPION_ALLOW_L2_CLK, 0x800e0000, 1, 0x52},
173         {SCORPION_L2_IDLE, 0x8e000000, 1, 0x53},
175         {SCORPION_DTLB_IMPL_INV_SCTLR_DACR, 0x80000001, 2, 0x54},
176         {SCORPION_DTLB_EXPL_INV, 0x80000100, 2, 0x55},
177         {SCORPION_DTLB_MISS, 0x80010000, 2, 0x56},
178         {SCORPION_DTLB_ACCESS, 0x81000000, 2, 0x57},
179         {SCORPION_ITLB_MISS, 0x80000200, 2, 0x55},
180         {SCORPION_ITLB_IMPL_INV, 0x80020000, 2, 0x56},
181         {SCORPION_ITLB_EXPL_INV, 0x82000000, 2, 0x57},
182         {SCORPION_UTLB_D_MISS, 0x80000003, 2, 0x54},
183         {SCORPION_UTLB_D_ACCESS, 0x80000300, 2, 0x55},
184         {SCORPION_UTLB_I_MISS, 0x80030000, 2, 0x56},
185         {SCORPION_UTLB_I_ACCESS, 0x83000000, 2, 0x57},
186         {SCORPION_UTLB_INV_ASID, 0x80000400, 2, 0x55},
187         {SCORPION_UTLB_INV_MVA, 0x80040000, 2, 0x56},
188         {SCORPION_UTLB_INV_ALL, 0x84000000, 2, 0x57},
189         {SCORPION_S2_HOLD_RDQ_UNAVAIL, 0x80000800, 2, 0x55},
190         {SCORPION_S2_HOLD, 0x88000000, 2, 0x57},
191         {SCORPION_S2_HOLD_DEV_OP, 0x80000900, 2, 0x55},
192         {SCORPION_S2_HOLD_ORDER, 0x80090000, 2, 0x56},
193         {SCORPION_S2_HOLD_BARRIER, 0x89000000, 2, 0x57},
195         {SCORPION_VIU_DUAL_CYCLE, 0x80000001, 4, 0x5c},
196         {SCORPION_VIU_SINGLE_CYCLE, 0x80000100, 4, 0x5d},
197         {SCORPION_VX_PIPE_WAR_STALL_CYCLES, 0x80000005, 4, 0x5c},
198         {SCORPION_VX_PIPE_WAW_STALL_CYCLES, 0x80000500, 4, 0x5d},
199         {SCORPION_VX_PIPE_RAW_STALL_CYCLES, 0x80050000, 4, 0x5e},
200         {SCORPION_VX_PIPE_LOAD_USE_STALL, 0x80000007, 4, 0x5c},
201         {SCORPION_VS_PIPE_WAR_STALL_CYCLES, 0x80000008, 4, 0x5c},
202         {SCORPION_VS_PIPE_WAW_STALL_CYCLES, 0x80000800, 4, 0x5d},
203         {SCORPION_VS_PIPE_RAW_STALL_CYCLES, 0x80080000, 4, 0x5e},
204         {SCORPION_EXCEPTIONS_INV_OPERATION, 0x8000000b, 4, 0x5c},
205         {SCORPION_EXCEPTIONS_DIV_BY_ZERO, 0x80000b00, 4, 0x5d},
206         {SCORPION_COND_INST_FAIL_VX_PIPE, 0x800b0000, 4, 0x5e},
207         {SCORPION_COND_INST_FAIL_VS_PIPE, 0x8b000000, 4, 0x5f},
208         {SCORPION_EXCEPTIONS_OVERFLOW, 0x8000000c, 4, 0x5c},
209         {SCORPION_EXCEPTIONS_UNDERFLOW, 0x80000c00, 4, 0x5d},
210         {SCORPION_EXCEPTIONS_DENORM, 0x8c000000, 4, 0x5f},
212         {SCORPION_BANK_AB_HIT, 0x80000001, 3, 0x58},
213         {SCORPION_BANK_AB_ACCESS, 0x80000100, 3, 0x59},
214         {SCORPION_BANK_CD_HIT, 0x80010000, 3, 0x5a},
215         {SCORPION_BANK_CD_ACCESS, 0x81000000, 3, 0x5b},
216         {SCORPION_BANK_AB_DSIDE_HIT, 0x80000002, 3, 0x58},
217         {SCORPION_BANK_AB_DSIDE_ACCESS, 0x80000200, 3, 0x59},
218         {SCORPION_BANK_CD_DSIDE_HIT, 0x80020000, 3, 0x5a},
219         {SCORPION_BANK_CD_DSIDE_ACCESS, 0x82000000, 3, 0x5b},
220         {SCORPION_BANK_AB_ISIDE_HIT, 0x80000003, 3, 0x58},
221         {SCORPION_BANK_AB_ISIDE_ACCESS, 0x80000300, 3, 0x59},
222         {SCORPION_BANK_CD_ISIDE_HIT, 0x80030000, 3, 0x5a},
223         {SCORPION_BANK_CD_ISIDE_ACCESS, 0x83000000, 3, 0x5b},
224         {SCORPION_ISIDE_RD_WAIT, 0x80000009, 3, 0x58},
225         {SCORPION_DSIDE_RD_WAIT, 0x80090000, 3, 0x5a},
226         {SCORPION_BANK_BYPASS_WRITE, 0x8000000a, 3, 0x58},
227         {SCORPION_BANK_AB_NON_CASTOUT, 0x8000000c, 3, 0x58},
228         {SCORPION_BANK_AB_L2_CASTOUT, 0x80000c00, 3, 0x59},
229         {SCORPION_BANK_CD_NON_CASTOUT, 0x800c0000, 3, 0x5a},
230         {SCORPION_BANK_CD_L2_CASTOUT, 0x8c000000, 3, 0x5b},
231 };
233 static inline void scorpion_pmnc_write(u32 val)
235         val &= PMNC_MASK;
236         asm volatile("mcr p15, 0, %0, c9, c12, 0" : : "r" (val));
239 static inline u32 scorpion_pmnc_read(void)
241         u32 val;
242         asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r" (val));
243         return val;
246 static inline u32 scorpion_ccnt_read(void)
248         u32 val;
249         asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (val));
250         return val;
253 static inline u32 scorpion_cntn_read(void)
255         u32 val;
256         asm volatile("mrc p15, 0, %0, c9, c13, 2" : "=r" (val));
257         return val;
260 static inline u32 scorpion_pmnc_enable_counter(unsigned int cnt)
262         u32 val;
264         if (cnt >= CNTMAX) {
265                 pr_err("gator: CPU%u enabling wrong PMNC counter %d\n", smp_processor_id(), cnt);
266                 return -1;
267         }
269         if (cnt == CCNT)
270                 val = CCNT_REG;
271         else
272                 val = (1 << (cnt - CNT0));
274         asm volatile("mcr p15, 0, %0, c9, c12, 1" : : "r" (val));
276         return cnt;
279 static inline u32 scorpion_pmnc_disable_counter(unsigned int cnt)
281         u32 val;
283         if (cnt >= CNTMAX) {
284                 pr_err("gator: CPU%u disabling wrong PMNC counter %d\n", smp_processor_id(), cnt);
285                 return -1;
286         }
288         if (cnt == CCNT)
289                 val = CCNT_REG;
290         else
291                 val = (1 << (cnt - CNT0));
293         asm volatile("mcr p15, 0, %0, c9, c12, 2" : : "r" (val));
295         return cnt;
298 static inline int scorpion_pmnc_select_counter(unsigned int cnt)
300         u32 val;
302         if ((cnt == CCNT) || (cnt >= CNTMAX)) {
303                 pr_err("gator: CPU%u selecting wrong PMNC counter %d\n", smp_processor_id(), cnt);
304                 return -1;
305         }
307         val = (cnt - CNT0);
308         asm volatile("mcr p15, 0, %0, c9, c12, 5" : : "r" (val));
310         return cnt;
313 static u32 scorpion_read_lpm0(void)
315         u32 val;
316         asm volatile("mrc p15, 0, %0, c15, c0, 0" : "=r" (val));
317         return val;
320 static void scorpion_write_lpm0(u32 val)
322         asm volatile("mcr p15, 0, %0, c15, c0, 0" : : "r" (val));
325 static u32 scorpion_read_lpm1(void)
327         u32 val;
328         asm volatile("mrc p15, 1, %0, c15, c0, 0" : "=r" (val));
329         return val;
332 static void scorpion_write_lpm1(u32 val)
334         asm volatile("mcr p15, 1, %0, c15, c0, 0" : : "r" (val));
337 static u32 scorpion_read_lpm2(void)
339         u32 val;
340         asm volatile("mrc p15, 2, %0, c15, c0, 0" : "=r" (val));
341         return val;
344 static void scorpion_write_lpm2(u32 val)
346         asm volatile("mcr p15, 2, %0, c15, c0, 0" : : "r" (val));
349 static u32 scorpion_read_l2lpm(void)
351         u32 val;
352         asm volatile("mrc p15, 3, %0, c15, c2, 0" : "=r" (val));
353         return val;
356 static void scorpion_write_l2lpm(u32 val)
358         asm volatile("mcr p15, 3, %0, c15, c2, 0" : : "r" (val));
361 static u32 scorpion_read_vlpm(void)
363         u32 val;
364         asm volatile("mrc p10, 7, %0, c11, c0, 0" : "=r" (val));
365         return val;
368 static void scorpion_write_vlpm(u32 val)
370         asm volatile("mcr p10, 7, %0, c11, c0, 0" : : "r" (val));
373 struct scorpion_access_funcs {
374         u32 (*read) (void);
375         void (*write) (u32);
376 };
378 struct scorpion_access_funcs scor_func[] = {
379         {scorpion_read_lpm0, scorpion_write_lpm0},
380         {scorpion_read_lpm1, scorpion_write_lpm1},
381         {scorpion_read_lpm2, scorpion_write_lpm2},
382         {scorpion_read_l2lpm, scorpion_write_l2lpm},
383         {scorpion_read_vlpm, scorpion_write_vlpm},
384 };
386 u32 venum_orig_val;
387 u32 fp_orig_val;
389 static void scorpion_pre_vlpm(void)
391         u32 venum_new_val;
392         u32 fp_new_val;
394         /* CPACR Enable CP10 access*/
395         asm volatile("mrc p15, 0, %0, c1, c0, 2" : "=r" (venum_orig_val));
396         venum_new_val = venum_orig_val | 0x00300000;
397         asm volatile("mcr p15, 0, %0, c1, c0, 2" : : "r" (venum_new_val));
398         /* Enable FPEXC */
399         asm volatile("mrc p10, 7, %0, c8, c0, 0" : "=r" (fp_orig_val));
400         fp_new_val = fp_orig_val | 0x40000000;
401         asm volatile("mcr p10, 7, %0, c8, c0, 0" : : "r" (fp_new_val));
404 static void scorpion_post_vlpm(void)
406         /* Restore FPEXC*/
407         asm volatile("mcr p10, 7, %0, c8, c0, 0" : : "r" (fp_orig_val));
408         /* Restore CPACR*/
409         asm volatile("mcr p15, 0, %0, c1, c0, 2" : : "r" (venum_orig_val));
412 #define COLMN0MASK 0x000000ff
413 #define COLMN1MASK 0x0000ff00
414 #define COLMN2MASK 0x00ff0000
415 static u32 scorpion_get_columnmask(u32 setval)
417         if (setval & COLMN0MASK)
418                 return 0xffffff00;
419         else if (setval & COLMN1MASK)
420                 return 0xffff00ff;
421         else if (setval & COLMN2MASK)
422                 return 0xff00ffff;
423         else
424                 return 0x80ffffff;
427 static void scorpion_evt_setup(u32 gr, u32 setval)
429         u32 val;
430         if (gr == 4)
431                 scorpion_pre_vlpm();
432         val = scorpion_get_columnmask(setval) & scor_func[gr].read();
433         val = val | setval;
434         scor_func[gr].write(val);
435         if (gr == 4)
436                 scorpion_post_vlpm();
439 static int get_scorpion_evtinfo(unsigned int evt_type, struct scorp_evt *evtinfo)
441         u32 idx;
442         if ((evt_type < 0x4c) || (evt_type >= MSM_MAX_EVT))
443                 return 0;
444         idx = evt_type - 0x4c;
445         if (sc_evt[idx].evt_type == evt_type) {
446                 evtinfo->val = sc_evt[idx].val;
447                 evtinfo->grp = sc_evt[idx].grp;
448                 evtinfo->evt_type_act = sc_evt[idx].evt_type_act;
449                 return 1;
450         }
451         return 0;
454 static inline void scorpion_pmnc_write_evtsel(unsigned int cnt, u32 val)
456         if (scorpion_pmnc_select_counter(cnt) == cnt) {
457                 if (val < 0x40) {
458                         asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (val));
459                 } else {
460                         u32 zero = 0;
461                         struct scorp_evt evtinfo;
462                         // extract evtinfo.grp and evtinfo.tevt_type_act from val
463                         if (get_scorpion_evtinfo(val, &evtinfo) == 0) return;
464                         asm volatile("mcr p15, 0, %0, c9, c13, 1" : : "r" (evtinfo.evt_type_act));
465                         asm volatile("mcr p15, 0, %0, c9, c15, 0" : : "r" (zero));
466                         scorpion_evt_setup(evtinfo.grp, val);
467                 }
468         }
471 static void scorpion_pmnc_reset_counter(unsigned int cnt)
473         u32 val = 0;
475         if (cnt == CCNT) {
476                 scorpion_pmnc_disable_counter(cnt);
478                 asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r" (val));
480                 if (pmnc_enabled[cnt] != 0)
481                     scorpion_pmnc_enable_counter(cnt);
483         } else if (cnt >= CNTMAX) {
484                 pr_err("gator: CPU%u resetting wrong PMNC counter %d\n", smp_processor_id(), cnt);
485         } else {
486                 scorpion_pmnc_disable_counter(cnt);
488                 if (scorpion_pmnc_select_counter(cnt) == cnt)
489                     asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r" (val));
491                 if (pmnc_enabled[cnt] != 0)
492                     scorpion_pmnc_enable_counter(cnt);
493         }
496 static int gator_events_scorpion_create_files(struct super_block *sb, struct dentry *root)
498         struct dentry *dir;
499         int i;
501         for (i = 0; i < pmnc_count; i++) {
502                 char buf[40];
503                 if (i == 0) {
504                         snprintf(buf, sizeof buf, "%s_ccnt", pmnc_name);
505                 } else {
506                         snprintf(buf, sizeof buf, "%s_cnt%d", pmnc_name, i-1);
507                 }
508                 dir = gatorfs_mkdir(sb, root, buf);
509                 if (!dir) {
510                         return -1;
511                 }
512                 gatorfs_create_ulong(sb, dir, "enabled", &pmnc_enabled[i]);
513                 if (i > 0) {
514                         gatorfs_create_ulong(sb, dir, "event", &pmnc_event[i]);
515                 }
516                 gatorfs_create_ro_ulong(sb, dir, "key", &pmnc_key[i]);
517         }
519         return 0;
522 static void gator_events_scorpion_online(void)
524         unsigned int cnt;
526         if (scorpion_pmnc_read() & PMNC_E) {
527                 scorpion_pmnc_write(scorpion_pmnc_read() & ~PMNC_E);
528         }
530         /* Initialize & Reset PMNC: C bit and P bit */
531         scorpion_pmnc_write(PMNC_P | PMNC_C);
533         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
534                 unsigned long event;
536                 per_cpu(perfPrev, smp_processor_id())[cnt] = 0;
538                 if (!pmnc_enabled[cnt])
539                         continue;
541                 // disable counter
542                 scorpion_pmnc_disable_counter(cnt);
544                 event = pmnc_event[cnt] & 255;
546                 // Set event (if destined for PMNx counters), We don't need to set the event if it's a cycle count
547                 if (cnt != CCNT)
548                         scorpion_pmnc_write_evtsel(cnt, event);
550                 // reset counter
551                 scorpion_pmnc_reset_counter(cnt);
553                 // Enable counter, do not enable interrupt for this counter
554                 scorpion_pmnc_enable_counter(cnt);
555         }
557         // enable
558         scorpion_pmnc_write(scorpion_pmnc_read() | PMNC_E);
561 static void gator_events_scorpion_offline(void)
563         scorpion_pmnc_write(scorpion_pmnc_read() & ~PMNC_E);
565         // investigate: need to do the clearpmu() here on each counter?
568 static void gator_events_scorpion_stop(void)
570         unsigned int cnt;
572         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
573                 pmnc_enabled[cnt] = 0;
574                 pmnc_event[cnt] = 0;
575         }
578 static int gator_events_scorpion_read(int **buffer)
580         int cnt, len = 0;
581         int cpu = smp_processor_id();
583         if (!pmnc_count)
584                 return 0;
586         for (cnt = 0; cnt < pmnc_count; cnt++) {
587                 if (pmnc_enabled[cnt]) {
588                         int value;
589                         if (cnt == CCNT) {
590                                 value = scorpion_ccnt_read();
591                         } else if (scorpion_pmnc_select_counter(cnt) == cnt) {
592                                 value = scorpion_cntn_read();
593                         } else {
594                                 value = 0;
595                         }
596                         scorpion_pmnc_reset_counter(cnt);
597                         if (value != per_cpu(perfPrev, cpu)[cnt]) {
598                                 per_cpu(perfPrev, cpu)[cnt] = value;
599                                 per_cpu(perfCnt, cpu)[len++] = pmnc_key[cnt];
600                                 per_cpu(perfCnt, cpu)[len++] = value;
601                         }
602                 }
603         }
605         // update or discard
606         if (buffer)
607                 *buffer = per_cpu(perfCnt, cpu);
609         return len;
612 static struct gator_interface gator_events_scorpion_interface = {
613         .create_files = gator_events_scorpion_create_files,
614         .stop = gator_events_scorpion_stop,
615         .online = gator_events_scorpion_online,
616         .offline = gator_events_scorpion_offline,
617         .read = gator_events_scorpion_read,
618 };
621 static void scorpion_clear_pmuregs(void)
623         scorpion_write_lpm0(0);
624         scorpion_write_lpm1(0);
625         scorpion_write_lpm2(0);
626         scorpion_write_l2lpm(0);
627         scorpion_pre_vlpm();
628         scorpion_write_vlpm(0);
629         scorpion_post_vlpm();
632 int gator_events_scorpion_init(void)
634         unsigned int cnt;
636         switch (gator_cpuid()) {
637         case SCORPION:
638                 pmnc_name = "Scorpion";
639                 pmnc_count = 4;
640                 break;
641         case SCORPIONMP:
642                 pmnc_name = "ScorpionMP";
643                 pmnc_count = 4;
644                 break;
645         default:
646                 return -1;
647         }
649         pmnc_count++; // CNT[n] + CCNT
651         for (cnt = CCNT; cnt < CNTMAX; cnt++) {
652                 pmnc_enabled[cnt] = 0;
653                 pmnc_event[cnt] = 0;
654                 pmnc_key[cnt] = gator_events_get_key();
655         }
657         scorpion_clear_pmuregs();
659         return gator_events_install(&gator_events_scorpion_interface);
661 gator_events_init(gator_events_scorpion_init);