omap5/sgx_src/eurasia_km/services4/include/sgxinfo.h

   1 /*************************************************************************/ /*!
   2 @Title          sgx services structures/functions
   3 @Copyright      Copyright (c) Imagination Technologies Ltd. All Rights Reserved
   4 @Description    inline functions/structures shared across UM and KM services components
   5 @License        Dual MIT/GPLv2
   6
   7 The contents of this file are subject to the MIT license as set out below.
   8
   9 Permission is hereby granted, free of charge, to any person obtaining a copy
  10 of this software and associated documentation files (the "Software"), to deal
  11 in the Software without restriction, including without limitation the rights
  12 to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  13 copies of the Software, and to permit persons to whom the Software is
  14 furnished to do so, subject to the following conditions:
  15
  16 The above copyright notice and this permission notice shall be included in
  17 all copies or substantial portions of the Software.
  18
  19 Alternatively, the contents of this file may be used under the terms of
  20 the GNU General Public License Version 2 ("GPL") in which case the provisions
  21 of GPL are applicable instead of those above.
  22
  23 If you wish to allow use of your version of this file only under the terms of
  24 GPL, and not to allow others to use your version of this file under the terms
  25 of the MIT license, indicate your decision by deleting the provisions above
  26 and replace them with the notice and other provisions required by GPL as set
  27 out in the file called "GPL-COPYING" included in this distribution. If you do
  28 not delete the provisions above, a recipient may use your version of this file
  29 under the terms of either the MIT license or GPL.
  30
  31 This License is also included in this distribution in the file called
  32 "MIT-COPYING".
  33
  34 EXCEPT AS OTHERWISE STATED IN A NEGOTIATED AGREEMENT: (A) THE SOFTWARE IS
  35 PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING
  36 BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR
  37 PURPOSE AND NONINFRINGEMENT; AND (B) IN NO EVENT SHALL THE AUTHORS OR
  38 COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
  39 IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  40 CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  41 */ /**************************************************************************/
  42 #if !defined (__SGXINFO_H__)
  43 #define __SGXINFO_H__
  44
  45 #include "sgxscript.h"
  46 #include "servicesint.h"
  47 #include "services.h"
  48 #if !defined (SUPPORT_SID_INTERFACE)
  49 #include "sgxapi_km.h"
  50 #endif
  51 #include "sgx_mkif_km.h"
  52
  53
  54 #define SGX_MAX_DEV_DATA                        24
  55 #define SGX_MAX_INIT_MEM_HANDLES        18
  56
  57
  58 typedef struct _SGX_BRIDGE_INFO_FOR_SRVINIT
  59 {
  60         IMG_DEV_PHYADDR sPDDevPAddr;
  61         PVRSRV_HEAP_INFO asHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
  62 } SGX_BRIDGE_INFO_FOR_SRVINIT;
  63
  64
  65 typedef enum _SGXMKIF_CMD_TYPE_
  66 {
  67         SGXMKIF_CMD_TA                          = 0,
  68         SGXMKIF_CMD_TRANSFER            = 1,
  69         SGXMKIF_CMD_2D                          = 2,
  70         SGXMKIF_CMD_POWER                       = 3,
  71         SGXMKIF_CMD_CONTEXTSUSPEND      = 4,
  72         SGXMKIF_CMD_CLEANUP                     = 5,
  73         SGXMKIF_CMD_GETMISCINFO         = 6,
  74         SGXMKIF_CMD_PROCESS_QUEUES      = 7,
  75         SGXMKIF_CMD_DATABREAKPOINT      = 8,
  76         SGXMKIF_CMD_SETHWPERFSTATUS     = 9,
  77         SGXMKIF_CMD_FLUSHPDCACHE        = 10,
  78         SGXMKIF_CMD_MAX                         = 11,
  79
  80         SGXMKIF_CMD_FORCE_I32           = -1,
  81
  82 } SGXMKIF_CMD_TYPE;
  83
  84
  85 typedef struct _SGX_BRIDGE_INIT_INFO_
  86 {
  87 #if defined (SUPPORT_SID_INTERFACE)
  88         IMG_SID         hKernelCCBMemInfo;
  89         IMG_SID         hKernelCCBCtlMemInfo;
  90         IMG_SID         hKernelCCBEventKickerMemInfo;
  91         IMG_SID         hKernelSGXHostCtlMemInfo;
  92         IMG_SID         hKernelSGXTA3DCtlMemInfo;
  93 #if defined(FIX_HW_BRN_31272) || defined(FIX_HW_BRN_31780) || defined(FIX_HW_BRN_33920)
  94         IMG_SID         hKernelSGXPTLAWriteBackMemInfo;
  95 #endif
  96         IMG_SID         hKernelSGXMiscMemInfo;
  97 #else
  98         IMG_HANDLE      hKernelCCBMemInfo;
  99         IMG_HANDLE      hKernelCCBCtlMemInfo;
 100         IMG_HANDLE      hKernelCCBEventKickerMemInfo;
 101         IMG_HANDLE      hKernelSGXHostCtlMemInfo;
 102         IMG_HANDLE      hKernelSGXTA3DCtlMemInfo;
 103 #if defined(FIX_HW_BRN_31272) || defined(FIX_HW_BRN_31780) || defined(FIX_HW_BRN_33920)
 104         IMG_HANDLE      hKernelSGXPTLAWriteBackMemInfo;
 105 #endif
 106         IMG_HANDLE      hKernelSGXMiscMemInfo;
 107 #endif
 108
 109         IMG_UINT32      aui32HostKickAddr[SGXMKIF_CMD_MAX];
 110
 111         SGX_INIT_SCRIPTS sScripts;
 112
 113         IMG_UINT32      ui32ClientBuildOptions;
 114         SGX_MISCINFO_STRUCT_SIZES       sSGXStructSizes;
 115
 116 #if defined(SGX_SUPPORT_HWPROFILING)
 117 #if defined (SUPPORT_SID_INTERFACE)
 118         IMG_SID         hKernelHWProfilingMemInfo;
 119 #else
 120         IMG_HANDLE      hKernelHWProfilingMemInfo;
 121 #endif
 122 #endif
 123 #if defined(SUPPORT_SGX_HWPERF)
 124 #if defined (SUPPORT_SID_INTERFACE)
 125         IMG_SID         hKernelHWPerfCBMemInfo;
 126 #else
 127         IMG_HANDLE      hKernelHWPerfCBMemInfo;
 128 #endif
 129 #endif
 130 #if defined (SUPPORT_SID_INTERFACE)
 131         IMG_SID         hKernelTASigBufferMemInfo;
 132         IMG_SID         hKernel3DSigBufferMemInfo;
 133 #else
 134         IMG_HANDLE      hKernelTASigBufferMemInfo;
 135         IMG_HANDLE      hKernel3DSigBufferMemInfo;
 136 #endif
 137
 138 #if defined(FIX_HW_BRN_29702)
 139 #if defined (SUPPORT_SID_INTERFACE)
 140         IMG_SID         hKernelCFIMemInfo;
 141 #else
 142         IMG_HANDLE      hKernelCFIMemInfo;
 143 #endif
 144 #endif
 145 #if defined(FIX_HW_BRN_29823)
 146 #if defined (SUPPORT_SID_INTERFACE)
 147         IMG_SID         hKernelDummyTermStreamMemInfo;
 148 #else
 149         IMG_HANDLE      hKernelDummyTermStreamMemInfo;
 150 #endif
 151 #endif
 152
 153 #if defined(FIX_HW_BRN_31542) || defined(FIX_HW_BRN_36513)
 154 #if defined (SUPPORT_SID_INTERFACE)
 155         IMG_SID hKernelClearClipWAVDMStreamMemInfo;
 156         IMG_SID hKernelClearClipWAIndexStreamMemInfo;
 157         IMG_SID hKernelClearClipWAPDSMemInfo;
 158         IMG_SID hKernelClearClipWAUSEMemInfo;
 159         IMG_SID hKernelClearClipWAParamMemInfo;
 160         IMG_SID hKernelClearClipWAPMPTMemInfo;
 161         IMG_SID hKernelClearClipWATPCMemInfo;
 162         IMG_SID hKernelClearClipWAPSGRgnHdrMemInfo;
 163 #else
 164         IMG_HANDLE hKernelClearClipWAVDMStreamMemInfo;
 165         IMG_HANDLE hKernelClearClipWAIndexStreamMemInfo;
 166         IMG_HANDLE hKernelClearClipWAPDSMemInfo;
 167         IMG_HANDLE hKernelClearClipWAUSEMemInfo;
 168         IMG_HANDLE hKernelClearClipWAParamMemInfo;
 169         IMG_HANDLE hKernelClearClipWAPMPTMemInfo;
 170         IMG_HANDLE hKernelClearClipWATPCMemInfo;
 171         IMG_HANDLE hKernelClearClipWAPSGRgnHdrMemInfo;
 172 #endif
 173 #endif
 174
 175 #if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && defined(FIX_HW_BRN_31559)
 176         IMG_HANDLE      hKernelVDMSnapShotBufferMemInfo;
 177         IMG_HANDLE      hKernelVDMCtrlStreamBufferMemInfo;
 178 #endif
 179 #if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && \
 180         defined(FIX_HW_BRN_33657) && defined(SUPPORT_SECURE_33657_FIX)
 181         IMG_HANDLE      hKernelVDMStateUpdateBufferMemInfo;
 182 #endif
 183 #if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
 184 #if defined (SUPPORT_SID_INTERFACE)
 185         IMG_SID         hKernelEDMStatusBufferMemInfo;
 186 #else
 187         IMG_HANDLE      hKernelEDMStatusBufferMemInfo;
 188 #endif
 189 #endif
 190
 191         IMG_UINT32 ui32EDMTaskReg0;
 192         IMG_UINT32 ui32EDMTaskReg1;
 193
 194         IMG_UINT32 ui32ClkGateCtl;
 195         IMG_UINT32 ui32ClkGateCtl2;
 196         IMG_UINT32 ui32ClkGateStatusReg;
 197         IMG_UINT32 ui32ClkGateStatusMask;
 198 #if defined(SGX_FEATURE_MP)
 199         IMG_UINT32 ui32MasterClkGateStatusReg;
 200         IMG_UINT32 ui32MasterClkGateStatusMask;
 201         IMG_UINT32 ui32MasterClkGateStatus2Reg;
 202         IMG_UINT32 ui32MasterClkGateStatus2Mask;
 203 #endif /* SGX_FEATURE_MP */
 204
 205         IMG_UINT32 ui32CacheControl;
 206
 207         IMG_UINT32      asInitDevData[SGX_MAX_DEV_DATA];
 208 #if defined (SUPPORT_SID_INTERFACE)
 209         IMG_SID         asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
 210 #else
 211         IMG_HANDLE      asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
 212 #endif
 213
 214 } SGX_BRIDGE_INIT_INFO;
 215
 216
 217 typedef struct _SGX_DEVICE_SYNC_LIST_
 218 {
 219         PSGXMKIF_HWDEVICE_SYNC_LIST     psHWDeviceSyncList;
 220
 221 #if defined (SUPPORT_SID_INTERFACE)
 222         IMG_SID                                 hKernelHWSyncListMemInfo;
 223 #else
 224         IMG_HANDLE                              hKernelHWSyncListMemInfo;
 225 #endif
 226         PVRSRV_CLIENT_MEM_INFO  *psHWDeviceSyncListClientMemInfo;
 227         PVRSRV_CLIENT_MEM_INFO  *psAccessResourceClientMemInfo;
 228
 229         volatile IMG_UINT32             *pui32Lock;
 230
 231         struct _SGX_DEVICE_SYNC_LIST_   *psNext;
 232
 233         /* Must be the last variable in the structure */
 234         IMG_UINT32                      ui32NumSyncObjects;
 235 #if defined (SUPPORT_SID_INTERFACE)
 236         IMG_SID                         ahSyncHandles[1];
 237 #else
 238         IMG_HANDLE                      ahSyncHandles[1];
 239 #endif
 240 } SGX_DEVICE_SYNC_LIST, *PSGX_DEVICE_SYNC_LIST;
 241
 242
 243 typedef struct _SGX_INTERNEL_STATUS_UPDATE_
 244 {
 245         CTL_STATUS                              sCtlStatus;
 246 #if defined (SUPPORT_SID_INTERFACE)
 247         IMG_SID                                 hKernelMemInfo;
 248 #else
 249         IMG_HANDLE                              hKernelMemInfo;
 250 #endif
 251 } SGX_INTERNEL_STATUS_UPDATE;
 252
 253
 254 typedef struct _SGX_CCB_KICK_
 255 {
 256         SGXMKIF_COMMAND         sCommand;
 257 #if defined (SUPPORT_SID_INTERFACE)
 258         IMG_SID         hCCBKernelMemInfo;
 259 #else
 260         IMG_HANDLE      hCCBKernelMemInfo;
 261 #endif
 262
 263         IMG_UINT32      ui32NumDstSyncObjects;
 264 #if defined (SUPPORT_SID_INTERFACE)
 265         IMG_SID         hKernelHWSyncListMemInfo;
 266 #else
 267         IMG_HANDLE      hKernelHWSyncListMemInfo;
 268 #endif
 269
 270         /* DST syncs */
 271 #if defined (SUPPORT_SID_INTERFACE)
 272         IMG_SID         *pahDstSyncHandles;
 273 #else
 274         IMG_HANDLE      *pahDstSyncHandles;
 275 #endif
 276
 277         IMG_UINT32      ui32NumTAStatusVals;
 278         IMG_UINT32      ui32Num3DStatusVals;
 279
 280 #if defined(SUPPORT_SGX_NEW_STATUS_VALS)
 281         SGX_INTERNEL_STATUS_UPDATE      asTAStatusUpdate[SGX_MAX_TA_STATUS_VALS];
 282         SGX_INTERNEL_STATUS_UPDATE      as3DStatusUpdate[SGX_MAX_3D_STATUS_VALS];
 283 #else
 284 #if defined (SUPPORT_SID_INTERFACE)
 285         IMG_SID         ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
 286         IMG_SID         ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
 287 #else
 288         IMG_HANDLE      ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
 289         IMG_HANDLE      ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
 290 #endif
 291 #endif
 292
 293         IMG_BOOL        bFirstKickOrResume;
 294 #if defined(NO_HARDWARE) || defined(PDUMP)
 295         IMG_BOOL        bTerminateOrAbort;
 296 #endif
 297         IMG_BOOL        bLastInScene;
 298
 299         /* CCB offset of data structure associated with this kick */
 300         IMG_UINT32      ui32CCBOffset;
 301
 302 #if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS)
 303         /* SRC and DST syncs */
 304         IMG_UINT32      ui32NumTASrcSyncs;
 305 #if defined (SUPPORT_SID_INTERFACE)
 306         IMG_SID         ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
 307 #else
 308         IMG_HANDLE      ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
 309 #endif
 310         IMG_UINT32      ui32NumTADstSyncs;
 311 #if defined (SUPPORT_SID_INTERFACE)
 312         IMG_SID         ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
 313 #else
 314         IMG_HANDLE      ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
 315 #endif
 316         IMG_UINT32      ui32Num3DSrcSyncs;
 317 #if defined (SUPPORT_SID_INTERFACE)
 318         IMG_SID         ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
 319 #else
 320         IMG_HANDLE      ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
 321 #endif
 322 #else
 323         /* SRC syncs */
 324         IMG_UINT32      ui32NumSrcSyncs;
 325 #if defined (SUPPORT_SID_INTERFACE)
 326         IMG_SID         ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS_TA];
 327 #else
 328         IMG_HANDLE      ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS_TA];
 329 #endif
 330 #endif
 331
 332         /* TA/3D dependency data */
 333         IMG_BOOL        bTADependency;
 334 #if defined (SUPPORT_SID_INTERFACE)
 335         IMG_SID         hTA3DSyncInfo;
 336
 337         IMG_SID         hTASyncInfo;
 338         IMG_SID         h3DSyncInfo;
 339 #else
 340         IMG_HANDLE      hTA3DSyncInfo;
 341
 342         IMG_HANDLE      hTASyncInfo;
 343         IMG_HANDLE      h3DSyncInfo;
 344 #endif
 345 #if defined(PDUMP)
 346         IMG_UINT32      ui32CCBDumpWOff;
 347 #endif
 348 #if defined(NO_HARDWARE)
 349         IMG_UINT32      ui32WriteOpsPendingVal;
 350 #endif
 351         IMG_HANDLE      hDevMemContext;
 352 } SGX_CCB_KICK;
 353
 354
 355 /*!
 356  ******************************************************************************
 357  * shared client/kernel device information structure for SGX
 358  *****************************************************************************/
 359 #define SGX_KERNEL_USE_CODE_BASE_INDEX          15
 360
 361
 362 /*!
 363  ******************************************************************************
 364  * Client device information structure for SGX
 365  *****************************************************************************/
 366 typedef struct _SGX_CLIENT_INFO_
 367 {
 368         IMG_UINT32                                      ui32ProcessID;                  /*!< ID of process controlling SGX device */
 369         IMG_VOID                                        *pvProcess;                             /*!< pointer to OS specific 'process' structure */
 370         PVRSRV_MISC_INFO                        sMiscInfo;                              /*!< Misc. Information, inc. SOC specifics */
 371
 372         IMG_UINT32                                      asDevData[SGX_MAX_DEV_DATA];
 373
 374 } SGX_CLIENT_INFO;
 375
 376 /*!
 377  ******************************************************************************
 378  * Internal device information structure for SGX
 379  *****************************************************************************/
 380 typedef struct _SGX_INTERNAL_DEVINFO_
 381 {
 382         IMG_UINT32                      ui32Flags;
 383 #if defined (SUPPORT_SID_INTERFACE)
 384         IMG_SID                         hHostCtlKernelMemInfoHandle;
 385 #else
 386         IMG_HANDLE                      hHostCtlKernelMemInfoHandle;
 387 #endif
 388         IMG_BOOL                        bForcePTOff;
 389 } SGX_INTERNAL_DEVINFO;
 390
 391
 392 typedef struct _SGX_INTERNAL_DEVINFO_KM_
 393 {
 394         IMG_UINT32                      ui32Flags;
 395         IMG_HANDLE                      hHostCtlKernelMemInfoHandle;
 396         IMG_BOOL                        bForcePTOff;
 397 } SGX_INTERNAL_DEVINFO_KM;
 398
 399
 400 #if defined(TRANSFER_QUEUE)
 401 typedef struct _PVRSRV_TRANSFER_SGX_KICK_
 402 {
 403 #if defined (SUPPORT_SID_INTERFACE)
 404         IMG_SID                 hCCBMemInfo;
 405 #else
 406         IMG_HANDLE              hCCBMemInfo;
 407 #endif
 408         IMG_UINT32              ui32SharedCmdCCBOffset;
 409
 410         IMG_DEV_VIRTADDR        sHWTransferContextDevVAddr;
 411
 412 #if defined (SUPPORT_SID_INTERFACE)
 413         IMG_SID                 hTASyncInfo;
 414         IMG_SID                 h3DSyncInfo;
 415 #else
 416         IMG_HANDLE              hTASyncInfo;
 417         IMG_HANDLE              h3DSyncInfo;
 418 #endif
 419
 420         IMG_UINT32              ui32NumSrcSync;
 421 #if defined (SUPPORT_SID_INTERFACE)
 422         IMG_SID                 ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
 423 #else
 424         IMG_HANDLE              ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
 425 #endif
 426
 427         IMG_UINT32              ui32NumDstSync;
 428 #if defined (SUPPORT_SID_INTERFACE)
 429         IMG_SID                 ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
 430 #else
 431         IMG_HANDLE              ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
 432 #endif
 433
 434         IMG_UINT32              ui32Flags;
 435
 436         IMG_UINT32              ui32PDumpFlags;
 437 #if defined(PDUMP)
 438         IMG_UINT32              ui32CCBDumpWOff;
 439 #endif
 440         IMG_HANDLE              hDevMemContext;
 441 } PVRSRV_TRANSFER_SGX_KICK, *PPVRSRV_TRANSFER_SGX_KICK;
 442
 443 #if defined(SGX_FEATURE_2D_HARDWARE)
 444 typedef struct _PVRSRV_2D_SGX_KICK_
 445 {
 446 #if defined (SUPPORT_SID_INTERFACE)
 447         IMG_SID                 hCCBMemInfo;
 448 #else
 449         IMG_HANDLE              hCCBMemInfo;
 450 #endif
 451         IMG_UINT32              ui32SharedCmdCCBOffset;
 452
 453         IMG_DEV_VIRTADDR        sHW2DContextDevVAddr;
 454
 455         IMG_UINT32              ui32NumSrcSync;
 456 #if defined (SUPPORT_SID_INTERFACE)
 457         IMG_SID                 ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
 458
 459         /* need to be able to check reads and writes on dest, and update writes */
 460         IMG_SID                 hDstSyncInfo;
 461
 462         /* need to be able to check reads and writes on TA ops, and update writes */
 463         IMG_SID                 hTASyncInfo;
 464
 465         /* need to be able to check reads and writes on 2D ops, and update writes */
 466         IMG_SID                 h3DSyncInfo;
 467 #else
 468         IMG_HANDLE              ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
 469
 470         /* need to be able to check reads and writes on dest, and update writes */
 471         IMG_HANDLE              hDstSyncInfo;
 472
 473         /* need to be able to check reads and writes on TA ops, and update writes */
 474         IMG_HANDLE              hTASyncInfo;
 475
 476         /* need to be able to check reads and writes on 2D ops, and update writes */
 477         IMG_HANDLE              h3DSyncInfo;
 478 #endif
 479
 480         IMG_UINT32              ui32PDumpFlags;
 481 #if defined(PDUMP)
 482         IMG_UINT32              ui32CCBDumpWOff;
 483 #endif
 484         IMG_HANDLE              hDevMemContext;
 485 } PVRSRV_2D_SGX_KICK, *PPVRSRV_2D_SGX_KICK;
 486 #endif  /* defined(SGX_FEATURE_2D_HARDWARE) */
 487 #endif  /* defined(TRANSFER_QUEUE) */
 488
 489
 490 #endif /* __SGXINFO_H__ */
 491 /******************************************************************************
 492  End of file (sgxinfo.h)
 493 ******************************************************************************/