[android-sdk/device-ti-proprietary-open.git] / jacinto6 / sgx_src / eurasia_km / services4 / include / sgxinfo.h
diff --git a/jacinto6/sgx_src/eurasia_km/services4/include/sgxinfo.h b/jacinto6/sgx_src/eurasia_km/services4/include/sgxinfo.h
index 3f888cb32525f52c47c4b352bc07f80d4113d1ba..7ffdbc7fb375647bf9d462dc8a66789bbfe88d0a 100644 (file)
#include "sgxscript.h"
#include "servicesint.h"
#include "services.h"
-#if !defined (SUPPORT_SID_INTERFACE)
#include "sgxapi_km.h"
-#endif
#include "sgx_mkif_km.h"
typedef struct _SGX_BRIDGE_INIT_INFO_
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelCCBMemInfo;
- IMG_SID hKernelCCBCtlMemInfo;
- IMG_SID hKernelCCBEventKickerMemInfo;
- IMG_SID hKernelSGXHostCtlMemInfo;
- IMG_SID hKernelSGXTA3DCtlMemInfo;
-#if defined(FIX_HW_BRN_31272) || defined(FIX_HW_BRN_31780) || defined(FIX_HW_BRN_33920)
- IMG_SID hKernelSGXPTLAWriteBackMemInfo;
-#endif
- IMG_SID hKernelSGXMiscMemInfo;
-#else
IMG_HANDLE hKernelCCBMemInfo;
IMG_HANDLE hKernelCCBCtlMemInfo;
IMG_HANDLE hKernelCCBEventKickerMemInfo;
IMG_HANDLE hKernelSGXPTLAWriteBackMemInfo;
#endif
IMG_HANDLE hKernelSGXMiscMemInfo;
-#endif
IMG_UINT32 aui32HostKickAddr[SGXMKIF_CMD_MAX];
SGX_MISCINFO_STRUCT_SIZES sSGXStructSizes;
#if defined(SGX_SUPPORT_HWPROFILING)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelHWProfilingMemInfo;
-#else
IMG_HANDLE hKernelHWProfilingMemInfo;
#endif
-#endif
#if defined(SUPPORT_SGX_HWPERF)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelHWPerfCBMemInfo;
-#else
IMG_HANDLE hKernelHWPerfCBMemInfo;
#endif
-#endif
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelTASigBufferMemInfo;
- IMG_SID hKernel3DSigBufferMemInfo;
-#else
IMG_HANDLE hKernelTASigBufferMemInfo;
IMG_HANDLE hKernel3DSigBufferMemInfo;
-#endif
-#if defined(FIX_HW_BRN_29702)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelCFIMemInfo;
-#else
- IMG_HANDLE hKernelCFIMemInfo;
-#endif
-#endif
-#if defined(FIX_HW_BRN_29823)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelDummyTermStreamMemInfo;
-#else
- IMG_HANDLE hKernelDummyTermStreamMemInfo;
-#endif
-#endif
#if defined(FIX_HW_BRN_31542) || defined(FIX_HW_BRN_36513)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelClearClipWAVDMStreamMemInfo;
- IMG_SID hKernelClearClipWAIndexStreamMemInfo;
- IMG_SID hKernelClearClipWAPDSMemInfo;
- IMG_SID hKernelClearClipWAUSEMemInfo;
- IMG_SID hKernelClearClipWAParamMemInfo;
- IMG_SID hKernelClearClipWAPMPTMemInfo;
- IMG_SID hKernelClearClipWATPCMemInfo;
- IMG_SID hKernelClearClipWAPSGRgnHdrMemInfo;
-#else
IMG_HANDLE hKernelClearClipWAVDMStreamMemInfo;
IMG_HANDLE hKernelClearClipWAIndexStreamMemInfo;
IMG_HANDLE hKernelClearClipWAPDSMemInfo;
IMG_HANDLE hKernelClearClipWATPCMemInfo;
IMG_HANDLE hKernelClearClipWAPSGRgnHdrMemInfo;
#endif
-#endif
#if defined(SGX_FEATURE_VDM_CONTEXT_SWITCH) && \
defined(FIX_HW_BRN_33657) && defined(SUPPORT_SECURE_33657_FIX)
IMG_HANDLE hKernelVDMStateUpdateBufferMemInfo;
#endif
#if defined(PVRSRV_USSE_EDM_STATUS_DEBUG)
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelEDMStatusBufferMemInfo;
-#else
IMG_HANDLE hKernelEDMStatusBufferMemInfo;
-#endif
#endif
IMG_UINT32 ui32EDMTaskReg0;
IMG_UINT32 ui32CacheControl;
IMG_UINT32 asInitDevData[SGX_MAX_DEV_DATA];
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
-#else
IMG_HANDLE asInitMemHandles[SGX_MAX_INIT_MEM_HANDLES];
-#endif
} SGX_BRIDGE_INIT_INFO;
{
PSGXMKIF_HWDEVICE_SYNC_LIST psHWDeviceSyncList;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelHWSyncListMemInfo;
-#else
IMG_HANDLE hKernelHWSyncListMemInfo;
-#endif
PVRSRV_CLIENT_MEM_INFO *psHWDeviceSyncListClientMemInfo;
PVRSRV_CLIENT_MEM_INFO *psAccessResourceClientMemInfo;
/* Must be the last variable in the structure */
IMG_UINT32 ui32NumSyncObjects;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahSyncHandles[1];
-#else
IMG_HANDLE ahSyncHandles[1];
-#endif
} SGX_DEVICE_SYNC_LIST, *PSGX_DEVICE_SYNC_LIST;
typedef struct _SGX_INTERNEL_STATUS_UPDATE_
{
CTL_STATUS sCtlStatus;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelMemInfo;
-#else
IMG_HANDLE hKernelMemInfo;
-#endif
} SGX_INTERNEL_STATUS_UPDATE;
typedef struct _SGX_CCB_KICK_
{
SGXMKIF_COMMAND sCommand;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hCCBKernelMemInfo;
-#else
IMG_HANDLE hCCBKernelMemInfo;
-#endif
IMG_UINT32 ui32NumDstSyncObjects;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hKernelHWSyncListMemInfo;
-#else
IMG_HANDLE hKernelHWSyncListMemInfo;
-#endif
/* DST syncs */
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID *pahDstSyncHandles;
-#else
IMG_HANDLE *pahDstSyncHandles;
-#endif
IMG_UINT32 ui32NumTAStatusVals;
IMG_UINT32 ui32Num3DStatusVals;
#if defined(SUPPORT_SGX_NEW_STATUS_VALS)
SGX_INTERNEL_STATUS_UPDATE asTAStatusUpdate[SGX_MAX_TA_STATUS_VALS];
SGX_INTERNEL_STATUS_UPDATE as3DStatusUpdate[SGX_MAX_3D_STATUS_VALS];
-#else
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
- IMG_SID ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
#else
IMG_HANDLE ahTAStatusSyncInfo[SGX_MAX_TA_STATUS_VALS];
IMG_HANDLE ah3DStatusSyncInfo[SGX_MAX_3D_STATUS_VALS];
-#endif
#endif
IMG_BOOL bFirstKickOrResume;
#if defined(SUPPORT_SGX_GENERALISED_SYNCOBJECTS)
/* SRC and DST syncs */
IMG_UINT32 ui32NumTASrcSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
-#else
IMG_HANDLE ahTASrcKernelSyncInfo[SGX_MAX_TA_SRC_SYNCS];
-#endif
IMG_UINT32 ui32NumTADstSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
-#else
IMG_HANDLE ahTADstKernelSyncInfo[SGX_MAX_TA_DST_SYNCS];
-#endif
IMG_UINT32 ui32Num3DSrcSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
-#else
IMG_HANDLE ah3DSrcKernelSyncInfo[SGX_MAX_3D_SRC_SYNCS];
-#endif
#else
/* SRC syncs */
IMG_UINT32 ui32NumSrcSyncs;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS_TA];
-#else
IMG_HANDLE ahSrcKernelSyncInfo[SGX_MAX_SRC_SYNCS_TA];
-#endif
#endif
/* TA/3D dependency data */
IMG_BOOL bTADependency;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hTA3DSyncInfo;
-
- IMG_SID hTASyncInfo;
- IMG_SID h3DSyncInfo;
-#else
IMG_HANDLE hTA3DSyncInfo;
IMG_HANDLE hTASyncInfo;
IMG_HANDLE h3DSyncInfo;
-#endif
#if defined(PDUMP)
IMG_UINT32 ui32CCBDumpWOff;
#endif
IMG_UINT32 ui32WriteOpsPendingVal;
#endif
IMG_HANDLE hDevMemContext;
+ IMG_DEV_VIRTADDR sHWRTDataSetDevAddr;
+ IMG_DEV_VIRTADDR sHWRTDataDevAddr;
+ IMG_UINT32 ui32FrameNum;
+#if defined(SUPPORT_PVRSRV_ANDROID_SYSTRACE)
+ IMG_BOOL bIsFirstKick;
+#endif
} SGX_CCB_KICK;
typedef struct _SGX_INTERNAL_DEVINFO_
{
IMG_UINT32 ui32Flags;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hHostCtlKernelMemInfoHandle;
-#else
IMG_HANDLE hHostCtlKernelMemInfoHandle;
-#endif
IMG_BOOL bForcePTOff;
} SGX_INTERNAL_DEVINFO;
#if defined(TRANSFER_QUEUE)
typedef struct _PVRSRV_TRANSFER_SGX_KICK_
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hCCBMemInfo;
-#else
IMG_HANDLE hCCBMemInfo;
-#endif
IMG_UINT32 ui32SharedCmdCCBOffset;
IMG_DEV_VIRTADDR sHWTransferContextDevVAddr;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hTASyncInfo;
- IMG_SID h3DSyncInfo;
-#else
IMG_HANDLE hTASyncInfo;
IMG_HANDLE h3DSyncInfo;
-#endif
IMG_UINT32 ui32NumSrcSync;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
-#else
IMG_HANDLE ahSrcSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
-#endif
IMG_UINT32 ui32NumDstSync;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
-#else
IMG_HANDLE ahDstSyncInfo[SGX_MAX_TRANSFER_SYNC_OPS];
-#endif
IMG_UINT32 ui32Flags;
IMG_UINT32 ui32CCBDumpWOff;
#endif
IMG_HANDLE hDevMemContext;
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ /* Android >JB MR1 doesn't use ahSrcSyncInfo for synchronization */
+ IMG_INT iFenceFd;
+#endif
} PVRSRV_TRANSFER_SGX_KICK, *PPVRSRV_TRANSFER_SGX_KICK;
#if defined(SGX_FEATURE_2D_HARDWARE)
typedef struct _PVRSRV_2D_SGX_KICK_
{
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID hCCBMemInfo;
-#else
IMG_HANDLE hCCBMemInfo;
-#endif
IMG_UINT32 ui32SharedCmdCCBOffset;
IMG_DEV_VIRTADDR sHW2DContextDevVAddr;
IMG_UINT32 ui32NumSrcSync;
-#if defined (SUPPORT_SID_INTERFACE)
- IMG_SID ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
-
- /* need to be able to check reads and writes on dest, and update writes */
- IMG_SID hDstSyncInfo;
-
- /* need to be able to check reads and writes on TA ops, and update writes */
- IMG_SID hTASyncInfo;
-
- /* need to be able to check reads and writes on 2D ops, and update writes */
- IMG_SID h3DSyncInfo;
-#else
IMG_HANDLE ahSrcSyncInfo[SGX_MAX_2D_SRC_SYNC_OPS];
/* need to be able to check reads and writes on dest, and update writes */
/* need to be able to check reads and writes on 2D ops, and update writes */
IMG_HANDLE h3DSyncInfo;
-#endif
IMG_UINT32 ui32PDumpFlags;
#if defined(PDUMP)
IMG_UINT32 ui32CCBDumpWOff;
#endif
IMG_HANDLE hDevMemContext;
+#if defined(PVR_ANDROID_NATIVE_WINDOW_HAS_SYNC)
+ /* Android >JB MR1 doesn't use ahSrcSyncInfo for synchronization */
+ IMG_INT iFenceFd;
+#endif
} PVRSRV_2D_SGX_KICK, *PPVRSRV_2D_SGX_KICK;
#endif /* defined(SGX_FEATURE_2D_HARDWARE) */
#endif /* defined(TRANSFER_QUEUE) */