android-sdk/kernel-audio.git
7 years agoHACK: ARM: DRA7XX: ETH: Use n_latch in pcf8575 to drive P10 for ETH0 master
Praveen Rao [Thu, 8 Aug 2013 18:47:43 +0000 (14:47 -0400)]
HACK: ARM: DRA7XX: ETH: Use n_latch in pcf8575 to drive P10 for ETH0

Use n_latch to hack the pcf8575 driver to "drive P10" to not hold ETH0
in reset.

Description: nETH_RST is a pin that controls the phy reset -> this was
the core of the issue -> we have pcf8575 GPIO expander on i2c1 whose
P10(ETH0) and P11(ETH1) hold or release the ETH from reset. On the very
first write by Display Panel driver (which rightly control's it's own
GPIO expander pin P15), all other pins are written as 0 -> since this is
the first write(by panel), this is precisely when pcf8575 starts to
drive the signal -> at this point the default pulls are overridden by
pcf8575's pulls. As ETH driver does not drive it's pin, the ETH0_RST is
driven low, holding Ethernet in reset.

Nishanth Menon helped in isolatng this issue.

REVISIT: This is a ethernet driver bug and has to be fixed properly post
release.

Change-Id: I45ddb1202761f052f8a8a04faf14b841da5af2ec
Signed-off-by: Praveen Rao <prao@ti.com>
7 years agoarm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM
Praveen Rao [Thu, 8 Aug 2013 18:37:35 +0000 (14:37 -0400)]
arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVM

Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active
and sleep states and enable them in board evm dts file.

Change-Id: I5524a2d4c2713388ba59da75fa6e90b27c100fc1
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[Resolved merge conflict and rebased on 3.8 kernel.
This patch is based on
http://git.ti.com/cgit/cgit.cgi/~mugunthanvnm/ti-linux-kernel/mugunth-connectivity-linux-feature-tree.git/commit/?h=dra7-3.11-rc3-cpsw&id=8da845bd7fbab68b4899d5a6477e70a34748f6c6
]
Update the pinmux configuration for CPSW and MDIO by removing the
macro definitons to match the 3.8 implementation.
Signed-off-by: Praveen Rao <prao@ti.com>
7 years agoarm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx
Mugunthan V N [Tue, 9 Jul 2013 14:49:45 +0000 (20:19 +0530)]
arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xx

Add CPSW and MDIO related device tree data for DRA7XX and made as status
disabled. Phy-id, pinmux for active and sleep state needs to be added in
board dts files and enable the CPSW device.

Change-Id: Ia8c6f8ec8eff0d66e0d05f4a6e1ce174a725b2fd
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
[Resolved merge conflict and rebased to 3.8 kernel]
Updated the CPSW and MDIO related device tree data with correct device
address offset and also to remove marco defines which caused compilation error
seen as below:
Error: arch/arm/boot/dts/dra7.dtsi:701.22-23 syntax error
FATAL ERROR: Unable to parse input tree
Signed-off-by: Praveen Rao <prao@ti.com>
7 years agoarm: dra7xx: Add hwmod data for MDIO and CPSW
Mugunthan V N [Tue, 9 Jul 2013 14:49:42 +0000 (20:19 +0530)]
arm: dra7xx: Add hwmod data for MDIO and CPSW

Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC

Change-Id: I9652c4956025335b3cdf3831bbd87ce104a80f65
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Update the hwmod data for CPSW and MDIO to added addr space and irq
info hwmod data.
Signed-off-by: Praveen Rao <prao@ti.com>
7 years agodrivers: net: cpsw: Add support for new CPSW IP version
Mugunthan V N [Tue, 9 Jul 2013 14:49:41 +0000 (20:19 +0530)]
drivers: net: cpsw: Add support for new CPSW IP version

The new IP version has a minor changes and the offsets are same as the
previous version, so adding new IP version support in the driver.

Change-Id: I19274d09b25be8acc3db3cdd74346aa79989f46a
Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Felipe Balbi <balbi@ti.com>
[Added change-id for gerrit]
Signed-off-by: Praveen Rao <prao@ti.com>
7 years agoARM: dts: dra7: Enable OPP_OD 1.5Ghz
Praneeth Bajjuri [Fri, 9 Aug 2013 21:47:54 +0000 (16:47 -0500)]
ARM: dts: dra7: Enable OPP_OD 1.5Ghz

OPP_OD Can be enabled on trimmed and poly fixed DRA7xx samples.

to identify poly-fixed trim samples:
[dieID: 0x4AE0C20C], [FT_Rev bits 15:8] >= 5.

This enables 1.5 Ghz for dra7xxx mpu.

Change-Id: If92bff1889de54cf51bedde3ebe8f1c9b17a7657
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agodefconfig: omap2plus: input: Enable atmel_mxt_ts touch driver
Praneeth Bajjuri [Fri, 9 Aug 2013 21:35:49 +0000 (16:35 -0500)]
defconfig: omap2plus: input: Enable atmel_mxt_ts touch driver

Enable Atmel MXT244 touch screen driver for dra7-evm

Change-Id: I8332c0cd677fdfd0c83e5f9c7ebf6275a9db49c2
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoARM: dts: dra7-evm: Add DT entry for Atmel MXT244 touch driver
Sundar Raman [Wed, 7 Aug 2013 19:10:53 +0000 (14:10 -0500)]
ARM: dts: dra7-evm: Add DT entry for Atmel MXT244 touch driver

This patch adds DT entry for atmel MXT244 touch driver (atmel_mxt_ts).
The device is on i2c1 and with address 0x4a. Platform configuration data
and interrupts data is added inside dra7-evm.dts file. Pinctrl for
Wakeup2 irq pin, which is used for touchscreen interrupt, has also been
updated

Change-Id: Icfb2f9e9655febaa40e6f6b3b7334462eb8e056a
Signed-off-by: Sundar Raman <a0393242@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
7 years agoInput: atmel_mxt_ts: Add device tree support
Sundar Raman [Wed, 7 Aug 2013 18:57:48 +0000 (13:57 -0500)]
Input: atmel_mxt_ts: Add device tree support

Add device tree support for Atmel touch driver. All platform
specific data is now read from dts files and parsed inside the
driver.

NOTE: Provision for supplying config data for controller is
given from board specific dts file since the driver no longer
configures these values for different firmware revisions,
after this commit: 71749f5c66e797a39600dae9de58aab3858dc488

Change-Id: Ic88bc62246e2465d527410e6fef78b301d681628
Signed-off-by: Sundar Raman <sunds@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
7 years agoInput: atmel_mxt_ts: switch to using devm_kzalloc
Nishanth Menon [Thu, 8 Aug 2013 19:48:49 +0000 (14:48 -0500)]
Input: atmel_mxt_ts: switch to using devm_kzalloc

Using managed allocation helps us simplify our probe and cleanup.

Change-Id: I239ddefb4a07c92c902f5460e6da7f0663a877c2
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sundar Raman <sunds@ti.com>
7 years agoInput: atmel_mxt_ts: switch to using devm_request_threaded_irq
Nishanth Menon [Thu, 8 Aug 2013 19:44:19 +0000 (14:44 -0500)]
Input: atmel_mxt_ts: switch to using devm_request_threaded_irq

Using managed request irq helps us simplify our probe and cleanup
a lot.

Change-Id: Ibe5a5b76b072e56414699798ea63ed8dd7f45c89
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Sundar Raman <sunds@ti.com>
7 years agousb: dwc3: host: Change platform device ID for xhci-hcd to AUTO
Vivek Gautam [Fri, 25 Jan 2013 11:22:02 +0000 (16:52 +0530)]
usb: dwc3: host: Change platform device ID for xhci-hcd to AUTO

Multiple dwc3 controllers will try to allocate multiple xhci-hcd
interfaces.
Changing platform device IDs from NONE to AUTO to support
such cases.

upstream-status:: https//git.kernel.org/cgit/linux/kernel/git/torvalds/
linux.git/commit/?id=52758bcb7c12bede2a81849dee13f1edcd44e1c1

Change-Id: Iaaf38e258c28ead10cff51b993f378a6fc3f5679
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
7 years agousb: host: xhci: Enable XHCI_SPURIOUS_SUCCESS for all controllers with xhci 1.0
George Cherian [Wed, 31 Jul 2013 08:59:19 +0000 (14:29 +0530)]
usb: host: xhci: Enable XHCI_SPURIOUS_SUCCESS for all controllers with xhci 1.0

Xhci controllers with hci_version > 0.96 gives spurious success events on short packet completion.
During webcam capture the "ERROR Transfer event TRB DMA ptr not part of current TD" was observed.
The same application works fine with synopsis controllers hci_version 0.96.
The same Issue is seen with Intel Pantherpoint xhci controller. So enabling this quirk in xhci_gen_setup if
controller verion is greater than 0.96.
For xhci-pci move the quirk to much generic place xhci_gen_setup.

Note from Sarah:
The xHCI 1.0 spec changed how hardware handles short packets.  The HW
will notify SW of the TRB where the short packet occurred, and it will
also give a successful status for the last TRB in a TD (the one with the
IOC flag set).  On the second successful status, that warning will be
triggered in the driver.

Software is now supposed to not assume the TD is not completed until it
gets that last successful status.  That means we have a slight race
condition, although it should have little practical impact.  This patch
papers over that issue.

It's on my long-term to-do list to fix this race condition, but it is a
much more involved patch that will probably be too big for stable.  This
patch is needed for stable to avoid serious log spam.

This patch should be backported to kernels as old as 3.0, that
contain the commit ad808333d8201d53075a11bc8dd83b81f3d68f0b "Intel xhci:
Ignore spurious successful event."

The patch will have to be modified for kernels older than 3.2, since
that kernel added the xhci_gen_setup function for xhci platform devices.
The correct conflict resolution for kernels older than 3.2 is to set
XHCI_SPURIOUS_SUCCESS in xhci_pci_quirks for all xHCI 1.0 hosts.

upstream-status: http://marc.info/?l=linux-usb&m=137265657724242&w=2

Change-Id: I4f5b93a6031118facd971985e40c77280e53ffe3
Signed-off-by: George Cherian <george.cherian@ti.com>
Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com>
[backported to 3.8]
Signed-off-by: Ravi Babu <ravibabu@ti.com>
7 years agoASoC: davinci-mcasp: Mute transmit data during stop
Misael Lopez Cruz [Thu, 8 Aug 2013 06:23:07 +0000 (01:23 -0500)]
ASoC: davinci-mcasp: Mute transmit data during stop

Reset of the state machine, serializer and frame sync generator can
occur in the middle of a slot, making the transmit pin go to its
inactive state. It can cause discontinuities that may lead to glitches.
The discontinuities can be more abrupt for audio samples with negative
values.

Muting the transmit data by masking out all its bits can prevent this
problem. A delay is required to ensure at least one slot uses the new
bit mask, the worst case (longest slot) is for 8kHz, mono (125 us).

Change-Id: I812ac674d1c9a3905086a966e0ec4795374f333a
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: dts: dra7: Set cpufreq transition latency value
Ranganath Krishnan [Fri, 26 Jul 2013 00:24:29 +0000 (19:24 -0500)]
ARM: dts: dra7: Set cpufreq transition latency value

Without clock-latency initialization, default value of (2^32 -1)
is taken. Because of the too long transition latency, ondemand
governor fails and the cpufreq governor fallback to performance
governor.

With this change, ondemand governor can be enabled by default for DRA7.
clock-latency value referenced from  omap5 (TBD: to be instrumented and
use the actual value at later point of time)

Change-Id: I2fa2e53088ba7e7f8f8509a8005b81ee593b55a7
Signed-off-by: Ranganath Krishnan <ranganath@ti.com>
7 years agoARM: dts: dra7-evm: Primary card as always-on
Misael Lopez Cruz [Tue, 9 Jul 2013 06:43:20 +0000 (01:43 -0500)]
ARM: dts: dra7-evm: Primary card as always-on

Power resources are not a concern in dra7-evm context so keeping primary
card as always-on to reduce audio artifacts.

Change-Id: I1ba906d8716922e63a8622acefbc2cea498875b6
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: DRA7: dra7-evm: Add support for always on
Misael Lopez Cruz [Tue, 30 Jul 2013 20:27:03 +0000 (15:27 -0500)]
ASoC: DRA7: dra7-evm: Add support for always on

There are environments where power resources are not a concern, but having
the best quality in terms of artifacts is more important. For those scenarios,
allow keeping the analog codecs always on, set via DT. This is achieved by
simply using a very high pmdown_time value.

Change-Id: I91bda710096427a9d5ec4c998eea40efb87ff123
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: dts: dra7-evm: Add tlv320aic3x capture settle time
Misael Lopez Cruz [Wed, 24 Jul 2013 21:28:24 +0000 (16:28 -0500)]
ARM: dts: dra7-evm: Add tlv320aic3x capture settle time

Add a capture settle time to reduce the pop noise in capture path of DRA7EVM,
the pop noise lasts around 30-40ms.

Change-Id: Idde7aec70e95354f25544aad3429050630259cc0
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: tlv320aic3x: Add ADC settle time
Misael Lopez Cruz [Wed, 24 Jul 2013 21:00:44 +0000 (16:00 -0500)]
ASoC: tlv320aic3x: Add ADC settle time

There are artifacts during capture route start (e.g. caused by bias or even
ADC power-on itsef) that cannot be removed through DAPM or with CODEC's
facilities. A settle time is added to account for these artifacts.

--
similar to:
commit: 07ca81d43d5c7ed7be2e164e0f85631c1938be30
Author: Gabriel M. Beddingfield <gabrbedd@ti.com>
ASoC: twl6040: Let amics settle after biasing
--

Change-Id: Iba12c014b8e088d2a4346a1cf34884be40959ac9
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: tlv320aic3x: Add output driver pop reduction controls
Misael Lopez Cruz [Mon, 8 Jul 2013 08:52:30 +0000 (03:52 -0500)]
ASoC: tlv320aic3x: Add output driver pop reduction controls

Output driver has two parameters that can be configured to reduce
pop noise: power-on delay and ramp-up step time. Two new kcontrols
have been added to set these parameters.

Change-Id: Icb9963ce046adb81bf31997a037c404178e18f71
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: tlv320aic3x: Connect Line1R-LADC and Line1L-RADC
Misael Lopez Cruz [Fri, 26 Jul 2013 00:10:08 +0000 (19:10 -0500)]
ASoC: tlv320aic3x: Connect Line1R-LADC and Line1L-RADC

'Left Line1R Mux' and 'Right Line1L Mux' were not connected in the audio
map of the CODEC, hence changing the kcontrols associated with them had
no effect.

Change-Id: I6060e6415e742e9145c2c17fe7e4d7b3fe7c1c1a
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: dts: dra7: Add McASP interrupts
Misael Lopez Cruz [Fri, 2 Aug 2013 17:06:54 +0000 (12:06 -0500)]
ARM: dts: dra7: Add McASP interrupts

Add interrupts information to McASP3 and McASP6 nodes. These IRQ numbers
also need configured in the IRQ crossbar.

Change-Id: Ic4f1409e9f54a4705ef45f727dfed5b2757ed96b
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: DRA7: dra7-evm: Remove crossbar hacks
Misael Lopez Cruz [Fri, 2 Aug 2013 16:45:25 +0000 (11:45 -0500)]
ASoC: DRA7: dra7-evm: Remove crossbar hacks

Partially remove DMA crossbar hack done by "ASoC: DRA7: dra7-evm: HACK: Set
McASP DMA reqs in sDMA crossbar". The sDMA reqs in DRA7xx hwmod are kept.

Change-Id: I99ffe54e83a09b3003df5b07c5621565a1d9aed4
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: OMAP: omap2plus_defconfig: disable USB debug flags
Vishal Mahaveer [Mon, 22 Jul 2013 23:36:58 +0000 (18:36 -0500)]
ARM: OMAP: omap2plus_defconfig: disable USB debug flags

Disable USB debug flags from omap2plus_defconfig

Change-Id: Icfa01952faae6992d5bfc97ce8ae27f79f977e3c
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
7 years agoARM: omap2plus_defconfig: Enable dra7-evm sound support
Misael Lopez Cruz [Sun, 7 Jul 2013 05:18:47 +0000 (00:18 -0500)]
ARM: omap2plus_defconfig: Enable dra7-evm sound support

Enable ALSA and dra7-evm sound support as built-in features.

Change-Id: I3d00f20e7aeeee3a6d298183969de21e32d264b8
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: dts: dra7-evm: Add HDMI sound node
Misael Lopez Cruz [Mon, 1 Jul 2013 23:33:50 +0000 (18:33 -0500)]
ARM: dts: dra7-evm: Add HDMI sound node

Add HDMI audio node.

Change-Id: I220e56b5a45716a7f7d6bd0b32df102f16746d16
Signed-off-by: Dandawate Saket <dsaket@ti.com>
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoOMAPDSS: HDMI: Fix GPA Channel Setting and Channel Allocation for 6-Channels
Angela Stegmaier [Wed, 3 Jul 2013 15:47:30 +0000 (10:47 -0500)]
OMAPDSS: HDMI: Fix GPA Channel Setting and Channel Allocation for 6-Channels

Enable channels 0 to 5 in GPA configuration (GP_CONF1) for the
6 channels case. This fixes an issue where the Audio Sample Packet
was carrying 8 channels instead of 6 channels.

The new GPA configuration sets the sample_present.sp3 bit to 0, then
0x13 is not a valid channel allocation. So, the channel allocation is
set to a valid value (0xb), when the number of channels is 6.

Also a typo is fixed in the comments for the eight channel case.

Change-Id: I3c987a4efdaf9f9594c99dc1fca1470b53a59355
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
7 years agoOMAPDSS: OMAP5: HDMI: Audio InfoFrame DB1 field offsets
Misael Lopez Cruz [Sun, 2 Jun 2013 23:01:51 +0000 (18:01 -0500)]
OMAPDSS: OMAP5: HDMI: Audio InfoFrame DB1 field offsets

CHNL_COUNT is in bits 6:4 and CODING_TYPE in bits 3:0 of HDMI_CORE_FC_AUDICONF0
register, while in the CEA-861 definition DB1CC is in bits 2:0 and DB1CT in
bits 7:4.

Change-Id: Ifd6ca2c91209b7fcf31dfdc921707c0ad5c9378a
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: omap-hdmi-card: Remove redundant print
Misael Lopez Cruz [Sun, 16 Jun 2013 07:25:04 +0000 (02:25 -0500)]
ASoC: omap-hdmi-card: Remove redundant print

HDMI card name is already printed when card is registered in ALSA,
no need to print it again.

Change-Id: I4bbe1acc45ab647a6a28824f3cb86a14163ba054
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: DRA7: hwmod: Fix HDMI irq number
Misael Lopez Cruz [Sun, 2 Jun 2013 22:57:44 +0000 (17:57 -0500)]
ARM: DRA7: hwmod: Fix HDMI irq number

HDMI_IRQ is connected to IRQ_CROSSBAR_96 in DRA7, previous IRQ number
was for OMAP5.

Change-Id: Iedff41b2e2dc253be7f6aa8a18c0c0d23a7f989d
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: DRA7: clocks: Fix HDMI sys_clk mux register
Misael Lopez Cruz [Sun, 2 Jun 2013 22:55:36 +0000 (17:55 -0500)]
ARM: DRA7: clocks: Fix HDMI sys_clk mux register

HDMI sys_clk mux uses CM_CLKSEL_HDMI_PLL_SYS register for source
selection.

Change-Id: I3c762b2ff4e845978b69482ec3422dcbc736e49c
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: DRA7: dra7-evm: HACK: Set McASP DMA reqs in sDMA crossbar
Misael Lopez Cruz [Sun, 16 Jun 2013 22:15:09 +0000 (17:15 -0500)]
ASoC: DRA7: dra7-evm: HACK: Set McASP DMA reqs in sDMA crossbar

McASP3 and McASP6 don't have default DMA reqs assigned in sDMA
crossbar. In the meantime, McASP3 TX/RX DMA reqs are reassigned
to sDMA_78 and 79, and McASP6 TX/RX to sDMA_62 and 63.

Change-Id: I079e181cfeccd12a121ea3f864bd8905609d09ad
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: dts: dra7-evm: Add sound card node
Misael Lopez Cruz [Mon, 17 Jun 2013 16:37:05 +0000 (11:37 -0500)]
ARM: dts: dra7-evm: Add sound card node

Add node for McASP-based sound card which consists of the media
DAI link that connects McASP3 and tlv320aic3106. This DAI link
in I2S mode with a bit clock of 5.6448 MHz that allows 44.1kHz,
16-bits/sample.

Change-Id: I46aaa94a68c6b3c89069b9030edf96d57d2476ef
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: dts: dra7: Add ATL node
Misael Lopez Cruz [Mon, 17 Jun 2013 16:34:55 +0000 (11:34 -0500)]
ARM: dts: dra7: Add ATL node

ATL1 and ATL2 are the only instances enabled. ATL1 is used to supply
the audio clock for the 16-slots TDM DAI link, so it requires an output
freq of 11.2896 MHz. ATL2 is used for the I2S DAI link and is configured
to 5.6448 MHz.

Change-Id: I4cf5ed86e75aa517e1ab3dbb3de8e9227013311b
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: dts: dra7: Add McASP nodes
Misael Lopez Cruz [Mon, 17 Jun 2013 16:33:34 +0000 (11:33 -0500)]
ARM: dts: dra7: Add McASP nodes

McASP3 is configured in I2S mode with AXR0 as TX and AXR1 as RX.

McASP6 is configured in TDM mode (uses same op-mode property value
than I2S) with 8-slots, AXR0 is used for TX and AXR1 for RX.

Interrupt property in both nodes is using McASP1's in the meantime
since McASP3 and McASP6 don't have default interrupt lines and have
to be assigned through IRQ crossbar.

Change-Id: I766dcbea9190083c6fe0e01501104226d480a22f
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: dts: dra7-evm: Add audio pinctrl
Misael Lopez Cruz [Mon, 22 Jul 2013 19:46:04 +0000 (14:46 -0500)]
ARM: dts: dra7-evm: Add audio pinctrl

Add pinctrl entries for McASP3, McASP6 and ATL. McASP pins are
configured so that McASPs are masters in their corresponding
audio links.

Change-Id: I507ad5941cf679a4afab98fcca7cbeba5fe5cad8
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: DRA7: dra7-evm: Add initial support for DRA7 EVM
Misael Lopez Cruz [Sun, 7 Jul 2013 05:07:38 +0000 (00:07 -0500)]
ASoC: DRA7: dra7-evm: Add initial support for DRA7 EVM

Add initial support for DRA7 EVM, it includes the media DAI link that
connects McASP3 and tlv320aic3106 in I2S mode.

DRA7xx is a high-performance, infotainment application device, based on
enhanced OMAP architecture integrated on a 28-nm technology.

Change-Id: I3be3e94e2f9c5736f236e965297d3cb9d646c7fc
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: DRA7: atl: Add initial support for Audio Tracking Logic
Misael Lopez Cruz [Sun, 16 Jun 2013 23:33:50 +0000 (18:33 -0500)]
ASoC: DRA7: atl: Add initial support for Audio Tracking Logic

Add initial version of Audio Tracking Logic (ATL) driver. ATL is
used to synchronize the digital audio output to the baseband clock.
ATL produces a timing signal at the top of the audio clock tree.

Change-Id: I123ff440b8e478c12e28ff4db42d1196f0ae4f6b
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: DRA7: clocks: Append _ck to atl_clkin* and ref_clkin*
Misael Lopez Cruz [Fri, 7 Jun 2013 20:59:46 +0000 (15:59 -0500)]
ARM: DRA7: clocks: Append _ck to atl_clkin* and ref_clkin*

Suffix 'ck' is missing for 'atl_clkin*' and 'ref_clkin*' clocks in
mcasp and timer parent clock names list.

Fix also a missing "_" in 'atl_clkin3_ck'.

Change-Id: I0d1ced5c61b08c63577872a38b16390f506c9cba
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoARM: DRA7: clock: Fix the wrong ABE PLL lock frequency
Rajendra Nayak [Mon, 17 Jun 2013 13:29:44 +0000 (18:59 +0530)]
ARM: DRA7: clock: Fix the wrong ABE PLL lock frequency

The ABE PLL (used by ATL) was wrongly locked at twice the frequency.
Fix it and also set the dpll_abe_m2x2_ck rate explicitely so that we
have m2 set to 1.

Change-Id: I5efc593c46ee7b31f06326b361a85f27dd3310ec
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
7 years agoARM: DRA7: hwmod: Disable smart-idle for McASP
Misael Lopez Cruz [Sun, 16 Jun 2013 22:13:17 +0000 (17:13 -0500)]
ARM: DRA7: hwmod: Disable smart-idle for McASP

As per TRM, wakeup schema is not supported by McASP, so it's recommended to
use no-idle after McASP is enabled, and smart-idle after it's disabled.

Change-Id: Ia20eff9238b996dbcac4b534b4645ec93fd8bafb
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Add hw_rule for buffer_size when using AFIFO
Angela Stegmaier [Fri, 12 Jul 2013 20:17:34 +0000 (15:17 -0500)]
ASoC: davinci-mcasp: Add hw_rule for buffer_size when using AFIFO

The AFIFO threshold imposes a limiation on the buffer size.
When the AFIFO is used, the buffer size (in samples) needs to be
an integer multiple of the AFIFO threshold value (wnumevt, rnumevt).

This patch adds a hw_rule to the McASP driver for version 4
of the McASP to account for the limitation on the buffer size.

Change-Id: I3bd320130b10a55d3d84defd99572526ad6469fb
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
7 years agoASoC: davinci-mcasp: Add support for using McASP DATA port
Angela Stegmaier [Thu, 4 Jul 2013 07:03:03 +0000 (02:03 -0500)]
ASoC: davinci-mcasp: Add support for using McASP DATA port

By default the CFG port is used for data transfer. It
is desireable to use the DATA port so that the AFIFO
can be used on DRA7XX.

To enable DATA port usage, during the probe a check for
an IORESOURCE_MEM named "dat" is done. If the
resource is found, the data port will be used. If it is
not found, the driver will fall back to using the cfg
port.

Change-Id: I42c3cc04621354ef1fd7546f9feff003cf6b38ce
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
7 years agoASoC: davinci-mcasp: HACK: Add MCASP_VERSION_4 support
Misael Lopez Cruz [Tue, 23 Apr 2013 05:28:07 +0000 (00:28 -0500)]
ASoC: davinci-mcasp: HACK: Add MCASP_VERSION_4 support

McASP IP found in DRA7xx devices is similar to the one described by
VERSION_3 (TI81xx, AM33xx), except that a different DMA mechanism
is used. A new version is introduced to use DMA4 instead (OMAP's).

Long term plan is to keep McASP driver totally agnostic of the DMA
module (sDMA or eDMA).

Change-Id: I47a2fd117b3647a5ed6562cbaa00211cb95dea3a
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Add support for 1-channel
Misael Lopez Cruz [Thu, 18 Jul 2013 19:08:52 +0000 (14:08 -0500)]
ASoC: davinci-mcasp: Add support for 1-channel

McASP doesn't support 1-slot TDM mode needed for mono, however mono
can still be achieved by using 2-slots (or more) and transferring data
only in one slot.

Change-Id: Ic8420cf2d6cc1ee9b9c163ab592cfa347a679340
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Pass pin inactive state via DT
Misael Lopez Cruz [Thu, 18 Jul 2013 19:01:57 +0000 (14:01 -0500)]
ASoC: davinci-mcasp: Pass pin inactive state via DT

The state of transmit/receive pins during inactive slots can be controlled through
DISMOD. Previously, the default state (Hi-Z) was used all the time, but that might
not fit well for all applications. So, the inactive state is passed via DT:
"tx-inactive-state" and "rx-inactive-state".

The inactive states can actually be set per serializer, but for the sake of simplicity
we only differentiate them by stream direction.

Additionally, the DISMOD macro is also fixed as the argument part was incorrect.

Change-Id: I0e099c29fde94dd59175c1017c098554c43d18fe
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Wait until TX AFIFO is not empty
Misael Lopez Cruz [Fri, 5 Jul 2013 22:10:38 +0000 (17:10 -0500)]
ASoC: davinci-mcasp: Wait until TX AFIFO is not empty

Wait until TX AFIFO has at least one audio sample before TXBUF starts
consuming data, otherwise XRUN can be hit immediately at the start of
the stream.

Change-Id: Ie94dcd16f7a00046eb043aec1ceee21ce6009fbc
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Fix receive right-rotation value
Misael Lopez Cruz [Fri, 28 Jun 2013 06:31:19 +0000 (01:31 -0500)]
ASoC: davinci-mcasp: Fix receive right-rotation value

Receive right-rotation (RROT) for I2S/TDM falls in the MSB-first,
left-aligned streams whose suggested rotation value is slot size -
word size.

Change-Id: I53ac6a0a9c02cf78cc4a2f37c34b6dbc4f9a0bcc
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Keep TX and RX format symmetric
Misael Lopez Cruz [Fri, 19 Jul 2013 17:02:56 +0000 (12:02 -0500)]
ASoC: davinci-mcasp: Keep TX and RX format symmetric

[TR]XFMT and [TR]XFMTCTL registers are set symmetrically in most
part of the driver, no need to keep it stream direction dependent
only in one place.

Change-Id: I8bacf75c8e5147d086ea67ab8ea5400a6affba99
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Enable TX FSG for master mode
Misael Lopez Cruz [Wed, 26 Jun 2013 07:42:04 +0000 (02:42 -0500)]
ASoC: davinci-mcasp: Enable TX FSG for master mode

McASP is configured by default in synchronous mode so the TX frame sync
is also used for RX. If McASP is also in master mode (for FSYNC), the
transmit FSG needs to be running to provide the frame sync needed for RX.

In some cases, AFSR/ACLKR pins are not even used so AFSX/ACLKX pins have
to be active for RX too, this requires TX clock dividers to be released
from reset.

Change-Id: Iff0b7b93ed2665b7da8219e435fece512c4551e8
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Remove unnecesary runtime PM calls
Misael Lopez Cruz [Fri, 21 Jun 2013 08:44:19 +0000 (03:44 -0500)]
ASoC: davinci-mcasp: Remove unnecesary runtime PM calls

Runtime PM calls in trigger() are not symmetric, this causes that
usage counter always keeps increasing. Similarly, runtime PM calls
in driver probe() and remove() are not needed since ASoC already
takes care of calling the appropriate runtime PM calls as required
during stream lifecycle.

Change-Id: I29ef47d9dce3b21db47b54c50d1c64b2fe82d804
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Apply symmetry on sample bits
Misael Lopez Cruz [Thu, 4 Jul 2013 06:54:57 +0000 (01:54 -0500)]
ASoC: davinci-mcasp: Apply symmetry on sample bits

McASP instances with unified clock/sync domain share the same BCLK
and FSYNC for playback and capture, hence the slot size has to be
symmetric.

Change-Id: Ia0bc75f39aeeda05196ed73a393518f88f21a568
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Active slots depend on active serializers
Misael Lopez Cruz [Fri, 19 Jul 2013 16:55:37 +0000 (11:55 -0500)]
ASoC: davinci-mcasp: Active slots depend on active serializers

Active slots count depends on the number of channels in the stream
and the number of active serializers. Each serializer will handle
at most the number of channels specified via 'tdm-slots' parameter
in DT.

There are two possible scenarios:

- Single serializer: channel count fits in the max slots supported by
  McASP serializers, active slots is same as channel count

- Multiple serializers: channel count is bigger than max slots supported
  by a serializer. Channel count determines how many serializers are
  needed at their max slot count configuration

Change-Id: I690a8518a807b70cebdbeb131979d68bfb86e4fe
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: davinci-mcasp: Simplify channels retrieval
Misael Lopez Cruz [Sun, 9 Jun 2013 07:00:36 +0000 (02:00 -0500)]
ASoC: davinci-mcasp: Simplify channels retrieval

Channels can be extracted using params_channels() macro.

Change-Id: Ia48497cbb6d3b49d6e1ced9f3241d3e0dd4011ea
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agoASoC: omap-pcm: Initialize DMA slave config
Misael Lopez Cruz [Thu, 27 Jun 2013 19:21:33 +0000 (14:21 -0500)]
ASoC: omap-pcm: Initialize DMA slave config

OMAP DMA engine driver does parameter checking on src_addr_width and
dst_addr_width which can contain an invalid value if the DMA slave
config struct is not initialized.

Change-Id: I9ce81a7f069be08485d8c105d5430ddd2e398fd5
Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
7 years agodra7x: dts: pinctrl: Adding drv1/2_vbus pinctrl config to dra7x DT
Ravi Babu [Fri, 28 Jun 2013 09:52:12 +0000 (04:52 -0500)]
dra7x: dts: pinctrl: Adding drv1/2_vbus pinctrl config to dra7x DT

Add drv1_vbus pincontrol configuration to dra7-evm dts.
select muxmode 0, and enable drv1_vbus slewctrl and pulldown

Add drvr2_vbus pincontrol configuration to dra7-evm dts.
select muxmode 0, and enable drv1_vbus slewctrl and pulldown

Change-Id: I49135549c92e7860b832a4fcdae15853f1475695
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Somnath Mukherjee <somnath@ti.com>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: dra7x: Enable init rate for dpll usb
Nikhil Devshatwar [Fri, 28 Jun 2013 09:52:11 +0000 (04:52 -0500)]
usb: dra7x: Enable init rate for dpll usb

Add init rate fout=960Mhz to configure USB dpll
USB dpll is not locked correctly through the pm runtime

Change-Id: I51feacb546052120eb62be17f4119a7bb46d1c90
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Somnath Mukherjee <somnath@ti.com>
7 years agodra7xx: usb: dwc: device tree entrees for 2 usb_otg_ss
Ruchika Kharwar [Wed, 10 Jul 2013 19:18:15 +0000 (14:18 -0500)]
dra7xx: usb: dwc: device tree entrees for 2 usb_otg_ss

This introduces 2 usb otg subsystems to the dra7xx device tree.

Change-Id: I32df149d262fb527802faf528d7aa506fb883cef
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agoHACK: usb: dwc3: dwc3 wrapper update for multiple usb subsystems
Ruchika Kharwar [Thu, 11 Jul 2013 20:57:00 +0000 (15:57 -0500)]
HACK: usb: dwc3: dwc3 wrapper update for multiple usb subsystems

Allow a separate dma mask per usb_otg_ss instance.
REVISIT: This is based on the name of the node in the device tree and ugly.
Temporary to get DRA7xx going and hardly scalable.

"_omap" global still exists and the only reason his works is because dra7xx
does not use the palmas driver.

Change-Id: Iff9d09e837c1556516c28c42f7a3f41a2315befc
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: dwc3-omap: wrapper dwc3_omap_mailbox updated ret val
Ruchika Kharwar [Sat, 11 May 2013 16:04:20 +0000 (18:04 +0200)]
usb: dwc3-omap: wrapper dwc3_omap_mailbox updated ret val

Instead of returning IRQ_NONE, it returns a 0 on success.
This allows it to be called if needed from a non irq function routine
nicely.

Change-Id: Ic7db386a91bd6661f686c519d04d57a3c1e0407b
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: phy: omap_control_usb: addition of a dummy control register
Ruchika Kharwar [Wed, 22 May 2013 04:31:50 +0000 (23:31 -0500)]
usb: phy: omap_control_usb: addition of a dummy control register

This patch introduces a "dummy control register" to turn on addition
clocks for phy tpe 3.

Change-Id: I7ed4400e496a92940944637684bb5586f93da713
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: omap_control_usb: addition of a phy variation.
Ruchika Kharwar [Sat, 11 May 2013 15:34:58 +0000 (17:34 +0200)]
usb: omap_control_usb: addition of a phy variation.

Another phy type on dra7xx inspired the addition of a OMAP_CTRL_DEV_TYPE3
type of omap_control_usb system.
This phy is different in 2 ways
 - usb2 only
 - the power on is in different register with bit definitions dissimilar to
   dev_conf.

Change-Id: I39969ea675ff9916aa746b5168784ba99119a54f
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: phy: omap_control_usb: removal of globals
Ruchika Kharwar [Mon, 13 May 2013 21:35:10 +0000 (16:35 -0500)]
usb: phy: omap_control_usb: removal of globals

This patch removes the use of a global omap_control_usb.
This allows
- Multiple instances of the omap_control_usb when required such as in DRA7xx.
- The device node is looked up using the phandle.

Change-Id: Ib5bf866b00f945430c055344d6344d4edfc38882
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: phy: enable phy drivers to use the device node for optional clock names.
Ruchika Kharwar [Tue, 7 May 2013 15:12:26 +0000 (17:12 +0200)]
usb: phy: enable phy drivers to use the device node for optional clock names.

Allow the device drivers to use the required optional clock names
from the DT node data.This allows scalability when multiple usb_otg_ss
instances are in use.

Change-Id: Id4a941855d6011a195d5cc796d6b1861624f8f56
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: dwc3: update the maxpacket based on the maximum_speed
Ruchika Kharwar [Mon, 8 Jul 2013 15:49:44 +0000 (10:49 -0500)]
usb: dwc3: update the maxpacket based on the maximum_speed

During initialization of endpoints, the maximum_speed is used
to determine the maxpacket size of the control endpoint.
For non control endpoints it appears alright to set the maxpacketsize to
be 1024 for the controller, but the function dwc3_gadget_get_maxpacket() is
introduced merely for consistency.

Change-Id: Iececaa685f1dd1901d254bbdf8d83c517bab8c72
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agoarm: dts: dra7xx: Add voltage-tolerance to avs_mpu and avs_gpu
Hemant Hariyani [Thu, 18 Jul 2013 03:14:26 +0000 (03:14 +0000)]
arm: dts: dra7xx: Add voltage-tolerance to avs_mpu and avs_gpu

Without voltage tolerance, regulator code tries to set exact voltage
and this results in a falilure if this value differs even slightly
from what pmic expects. Adding a voltage-tolerance of 1% handles the
case where these voltage values differ slightly.

Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
7 years agoclk: omap5: Add CLK_SET_RATE_PARENT flag to gpu clocks
Hemant Hariyani [Thu, 18 Jul 2013 03:00:11 +0000 (03:00 +0000)]
clk: omap5: Add CLK_SET_RATE_PARENT flag to gpu clocks

clk_set_rate finds the topmost clock that needs to be changed
in order to set the desired clock to a particular frequency.

This is done only if CLK_SET_RATE_PARENT flag is set for a clock.
gpu_core_gclk_mux and gpu_hyd_gclk_mux need to have this flag
enabled in order for clk_set_rate to propagate to to their parent.

Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
7 years agoclk: dra7xx: Add CLK_SET_RATE_PARENT flag to gpu clocks
Hemant Hariyani [Thu, 18 Jul 2013 03:00:10 +0000 (03:00 +0000)]
clk: dra7xx: Add CLK_SET_RATE_PARENT flag to gpu clocks

clk_set_rate finds the topmost clock that needs to be changed
in order to set the desired clock to a particular frequency.

This is done only if CLK_SET_RATE_PARENT flag is set for a clock.
gpu_core_gclk_mux and gpu_hyd_gclk_mux need to have this flag
enabled in order for clk_set_rate to propagate to to their parent.

Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
7 years agoARM: OMAP5: board-generic: Modify the machine name
Praneeth Bajjuri [Wed, 17 Jul 2013 20:30:42 +0000 (15:30 -0500)]
ARM: OMAP5: board-generic: Modify the machine name

Changing the machine name to "OMAP5 panda board".

This is needed to populate the correct device name to sdk.

Revisit: Will change the name to official omap5 platform
name "OMAP5432 EVM board" later.

For now, lets keep it in a way so that userspace understands
and populates accordingly.

Change-Id: I857d53e732220fe7bd2324ce3620ef511a39bebd
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoregulator: core: Make set_voltage_tol() try for mid-range first
Mark Brown [Thu, 4 Jul 2013 16:27:14 +0000 (17:27 +0100)]
regulator: core: Make set_voltage_tol() try for mid-range first

The expected semantic for something expressed as a tolerance is that it
should deliver the specified value with some deviation allowed but this
is not what set_voltage_tol() currently does. Instead it just passes
the maximum possible range to set_voltage() which will typically result
in a voltage aimed at lower than the target voltage.

Instead first try to set a voltage between the target voltage and the
upper limit, then fall back on the full range. This will be much more
robust against physical variation in systems and makes the API behave
more like users would expect.

Signed-off-by: Mark Brown <broonie@linaro.org>
[cherry-pick from
https://git.kernel.org/cgit/linux/kernel/git/broonie/regulator.git/commit/?h=topic/core&id=dc9ceed6a12aff627c81e01ada191e8a23fcbe3e
]
Change-Id: I52e88a886e4277e5f7d9f97192931290b9775eab
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoomap5: device tree: usb: Specify optional clock names in dt
Ruchika Kharwar [Wed, 10 Jul 2013 04:01:01 +0000 (23:01 -0500)]
omap5: device tree: usb: Specify optional clock names in dt

Specify the optional clock names in the device tree.
This is required for scalablity.

Change-Id: Id80d0c0c92d1bb676f1fc713a20f668e3b0ee161
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: phy: protect against NULL phy pointers
Felipe Balbi [Sat, 6 Jul 2013 13:01:17 +0000 (08:01 -0500)]
usb: phy: protect against NULL phy pointers

In order to decrease the amount of work done
by PHY users, allow NULL phy pointers to be
passed.
[Backport from 3.10 patch http://www.spinics.net/lists/linux-usb/msg88622.html
- Ignored what could not be applied for 3.8
]
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
Change-Id: Ic921172d92214a4d0f8c840b6869beb7d320ff4a

7 years agousb: dwc3: core: make USB3 PHY optional
Felipe Balbi [Wed, 10 Jul 2013 19:00:34 +0000 (14:00 -0500)]
usb: dwc3: core: make USB3 PHY optional

If we want a port to work at any speed lower than Superspeed, it makes no
sense to even initialize/power up the USB3 transceiver, provided it won't
be used. We can use the oportunity to save some power and leave the
superspeed transceiver powered off. There is at least one such case which
is Texas Instruments' AM437x which has one of its USB3 ports without a matching
USB3 PHY (that port is hardwired to work on USB2 only).

http://git.kernel.org/cgit/linux/kernel/git/balbi/usb.git/commit/
?h=testing&id=d7e39d414310e098540605be2051d5187797be34

Change-Id: I61639c4d58aac671a5aade67814981dc6d20f2e6
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: dwc3: adapt to use dr_mode device tree helper
Ruchika Kharwar [Sat, 6 Jul 2013 12:04:05 +0000 (07:04 -0500)]
usb: dwc3: adapt to use dr_mode device tree helper

This patch adapts the dwc3 to use the device tree helper
"of_usb_get_dr_mode" for the mode of operation of the dwc3 instance
being probed.

Change-Id: Ic2c0fb31b23fda1acdda4269b1d09c5eec626417
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: dwc3: make maximum-speed a per-instance attribute
Felipe Balbi [Sat, 6 Jul 2013 11:12:01 +0000 (06:12 -0500)]
usb: dwc3: make maximum-speed a per-instance attribute

in order to allow different instances of the
core work in different maximum speeds, we will
move the maximum_speed module_parameter to
both DeviceTree (making use the new maximum-speed
DT property) and platform_data.

[Backport from http://permalink.gmane.org/gmane.linux.usb.general/89128
. K3.8 does not have the concept of platform_data
for dwc3, hence maximum_speed belongs to the dwc structure for this kernel]

Change-Id: Ia1e69440a6c91da7e19ac8e7197dd0d492cfcb29
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: common: introduce of_usb_get_maximum_speed()
Felipe Balbi [Sat, 6 Jul 2013 10:59:18 +0000 (05:59 -0500)]
usb: common: introduce of_usb_get_maximum_speed()

this helper will be used for controllers which
want to work at a lower speed even though they
support higher USB transfer rates.

One such case is Texas Instruments' AM437x
SoC where it uses a USB3 controller without
a USB3 PHY, rendering the controller USB2-only.

[backport from
http://www.mail-archive.com/linux-usb@vger.kernel.org/msg23583.html
 - Added in the entry to the bindings dwc3.txt file
 - fixed inconsistent names between dwc3.txt and the code
 - fixed a bug in the speed table "WIRELESS", else there is a runtime error.
]

Change-Id: I9b912e8fb50e470d7e3befdaf41ea65ad750811a
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agousb: add devicetree helpers for determining dr_mode and phy_type
Michael Grzeschik [Thu, 13 Jun 2013 14:59:55 +0000 (17:59 +0300)]
usb: add devicetree helpers for determining dr_mode and phy_type

This adds two little devicetree helper functions for determining the
dr_mode (host, peripheral, otg) and phy_type (utmi, ulpi,...) from
the devicetree.

[Backport from uncommitted patch to 3.10
 - Added the dr_mode to the bindings txt file
]

Change-Id: Id535eff4da66726cf74e5cba0f39a5a93432999c
Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agodra7xx : usb3_phy: Updated dpll M,N values.
Ruchika Kharwar [Tue, 7 May 2013 09:29:24 +0000 (11:29 +0200)]
dra7xx : usb3_phy: Updated dpll M,N values.

Addition of the M and N recommended values for the USB3 PHY DPLL.
Sysclk for DRA7xx is 20MHz.
This yields:
Clk = 20MHz * M/(N+1) = 20MHz * 1000 /(7+1) = 2.5 Ghz

Change-Id: I3ed359df12aa11f1f1c8580a9e38ce36bdf3b9ad
Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com>
Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
7 years agoMerge branch 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap into...
Praneeth Bajjuri [Wed, 17 Jul 2013 20:21:51 +0000 (15:21 -0500)]
Merge branch 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap into p-ti-linux-3.8.y

* 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap:
  PM / OPP: Export more symbols for module usage
  PM / OPP: switch exported symbols to GPL variant
  arm: dts: omap5: Add _ck to dpll_mpu
  arm: dts: dra7xx: Add _ck to dpll_mpu
  clk: OMAP: Remove _ck assumption for DT bindings

Change-Id: I565eb2c513a4ef0ad07960ec659a7237d62103b7
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoPM / OPP: Export more symbols for module usage
Mark Langsdorf [Mon, 28 Jan 2013 18:26:16 +0000 (18:26 +0000)]
PM / OPP: Export more symbols for module usage

Export cpufreq helpers in OPP to make the cpufreq-core0 and highbank-cpufreq
drivers loadable as modules.

Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
7 years agoPM / OPP: switch exported symbols to GPL variant
Nishanth Menon [Mon, 28 Jan 2013 18:26:15 +0000 (18:26 +0000)]
PM / OPP: switch exported symbols to GPL variant

We are GPLV2 library, so be clear in the symbols exported as well.

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
7 years agoarm: dts: omap5: Add _ck to dpll_mpu
Hemant Hariyani [Wed, 17 Jul 2013 19:02:19 +0000 (14:02 -0500)]
arm: dts: omap5: Add _ck to dpll_mpu

Clock frame work makes an incorrect assumption that all clock nodes
end in _ck. DT entries should have the whole name of the clock for
all clocks to be supported by omap clock framework. Not all clocks
have _ck suffix.
e.g: OMAP5 clocks: gpu_core_gclk_mux, mmc1_fclk_mux

Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
[cherry-pick and format for 3.8 sdk kernel]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoarm: dts: dra7xx: Add _ck to dpll_mpu
Hemant Hariyani [Wed, 17 Jul 2013 19:00:47 +0000 (14:00 -0500)]
arm: dts: dra7xx: Add _ck to dpll_mpu

Clock frame work makes an incorrect assumption that all clock nodes
end in _ck. DT entries should have the whole name of the clock for
all clocks to be supported by omap clock framework. Not all clocks
have _ck suffix.
e.g: DRA7xx clocks: gpu_core_gclk_mux, hdmi_dpll_clk_mux, eve_clk

Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
[cherry-pick and format for 3.8 sdk kernel]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoclk: OMAP: Remove _ck assumption for DT bindings
Hemant Hariyani [Wed, 17 Jul 2013 18:58:24 +0000 (13:58 -0500)]
clk: OMAP: Remove _ck assumption for DT bindings

Not all clocks have _ck suffix and this assumption was incorrect.
e.g: DRA7xx clocks: gpu_core_gclk_mux, hdmi_dpll_clk_mux, eve_clk

Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
[cherry-pick and format for 3.8 sdk kernel]
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoMerge branch 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap into...
Praneeth Bajjuri [Tue, 16 Jul 2013 23:31:02 +0000 (18:31 -0500)]
Merge branch 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap into p-ti-linux-3.8.y

* 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap:
  ARM: DTS: DRA7: Enable OPP High
  ARM: dts: omap5-sevm: remove un-supported platform

Change-Id: I576a173485ee5b25c8b2b6b15f08503b0a39a3c3
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoARM: DTS: DRA7: Enable OPP High
Praneeth Bajjuri [Tue, 16 Jul 2013 22:21:46 +0000 (17:21 -0500)]
ARM: DTS: DRA7: Enable OPP High

Enable OPP_HIGH since the DRA7 samples have this
feature supported.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoARM: dts: omap5-sevm: remove un-supported platform
Nishanth Menon [Tue, 16 Jul 2013 22:16:38 +0000 (17:16 -0500)]
ARM: dts: omap5-sevm: remove un-supported platform

Remove OMAP5-SEVM support which no longer is supported by TI.
 + build is broken with wrong Palmas LDO dependencies as well.
Just get rid of the platform we dont plan to maintain.

Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoMerge branch 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap into...
Praneeth Bajjuri [Mon, 15 Jul 2013 06:34:16 +0000 (01:34 -0500)]
Merge branch 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap into p-ti-linux-3.8.y

* 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap:
  ARM: OMAP: omap2plus_defconfig: Enable Kernel Preemption

Change-Id: I037d8dc2a2c81e8e21c686c046a34eaf8ed8dac0
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoARM: OMAP: omap2plus_defconfig: Enable Kernel Preemption
Praneeth Bajjuri [Mon, 15 Jul 2013 03:45:31 +0000 (22:45 -0500)]
ARM: OMAP: omap2plus_defconfig: Enable Kernel Preemption

This patch is to enable kernel preemption on minimal omap config.

This gives the ability for OS to preempt a current scheduled task
in favor of a higher priority one.

Change-Id: I5d39d9494172cbebf77386f9390ca813bab3533f
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoARM: OMAP: omap2plus_defconfig: Enable Kernel Preemption
Praneeth Bajjuri [Mon, 15 Jul 2013 03:45:31 +0000 (22:45 -0500)]
ARM: OMAP: omap2plus_defconfig: Enable Kernel Preemption

This patch is to enable kernel preemption on minimal omap config.

This gives the ability for OS to preempt a current scheduled task
in favor of a higher priority one.

Change-Id: I5d39d9494172cbebf77386f9390ca813bab3533f
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoMerge branch 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap into...
Praneeth Bajjuri [Sat, 13 Jul 2013 00:42:23 +0000 (19:42 -0500)]
Merge branch 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap into p-ti-linux-3.8.y

* 'p-ti-linux-3.8.y' of git://git.ti.com/android-sdk/kernel-omap:
  arm: dra: Add gpu interface clock
  arm: dra7xx: Add gpu hwmod
  arm/dts: dra7: Add gpu supply
  arm: dts: dra7xx: Add gpu data
  OMAPDSS: DISPC: Force L3_2 CD to NOSLEEP when dispc module is active
  OMAPDSS: DSS: Fix for mask query in manager blank api
  OMAPDSS: DSS: Fix for setting up the overlay channel
  OMAPDSS: DSS: fix for zorder checking logic
  OMAPDSS: DSS: Fix for DSS num_managers check in callbacks
  OMAPDSS: DSS: Fix for DSS manager IRQ mask ordering
  OMAPDSS: DSS: Enable dsscomp callbacks from apply IRQ
  OMAPDSS: DSS: Add callback for tracking overlay/manager changes
  OMAPDSS: DSS: Fix null pointer crash in DSS
  OMAPDSS: DSS: Initialize manager blank api.
  OMAPDSS: DISPC: errata i740 fix: force L3_1 CD to NOSLEEP when dispc module is active
  OMAPDSS: DSS: Invoke dsscomp callbacks for manually updated displays
  OMAPDSS: DSS: Add support for simultaneous multiple overlay updates
  OMAPDSS: DSS: Added Callback functionality to DSS

Change-Id: Ibcf6318fb778596daf542ec9566f2ee16d7c2ca8
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
7 years agoarm: dra: Add gpu interface clock
Hemant Hariyani [Mon, 6 May 2013 01:02:12 +0000 (20:02 -0500)]
arm: dra: Add gpu interface clock

Add gpu iclk.

Change-Id: Id9fcf210f67998682b4e21949699b8513aafecbf
Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
7 years agoarm: dra7xx: Add gpu hwmod
Hemant Hariyani [Sun, 5 May 2013 23:29:18 +0000 (18:29 -0500)]
arm: dra7xx: Add gpu hwmod

GPU hwmod data for DRA7xx

Change-Id: I17f4c491e9a6a69052e9640e6bb2e74d5a753579
Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
7 years agoarm/dts: dra7: Add gpu supply
Hemant Hariyani [Thu, 11 Jul 2013 15:28:04 +0000 (10:28 -0500)]
arm/dts: dra7: Add gpu supply

Add smps6_reg as gpu supply

Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
7 years agoarm: dts: dra7xx: Add gpu data
Hemant Hariyani [Mon, 6 May 2013 14:24:48 +0000 (07:24 -0700)]
arm: dts: dra7xx: Add gpu data

GPU DT entry for DRA7XX.

Change-Id: I94c9a33f942b590244692001eb2ec8f9c98187c3
Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
7 years agoOMAPDSS: DISPC: Force L3_2 CD to NOSLEEP when dispc module is active
Devaraj Rangasamy [Mon, 15 Apr 2013 18:17:43 +0000 (13:17 -0500)]
OMAPDSS: DISPC: Force L3_2 CD to NOSLEEP when dispc module is active

It has been identified that L3_2 CD is idling and not responding to the traffic
initiated by initiators. As per errata i740 worakaround, ISS-L3_2 noidle
constraint should be in place when ISS is effective.

But random hangs are observed if DSS-L3_2 is not enabled, and this patch is
a temporary workaround till actual issue is rootcaused and fixed.

Change-Id: Ida7e4d38916b6ef1a3ff429bca24d6b252d923cd
Signed-off-by: Arthur Philpott <arthur.philpott@ti.com>
7 years agoOMAPDSS: DSS: Fix for mask query in manager blank api
Sunita Nadampalli [Mon, 13 May 2013 17:25:34 +0000 (12:25 -0500)]
OMAPDSS: DSS: Fix for mask query in manager blank api

Change-Id: I8978cc1f80451b62bd06f8297471e077b677f5e0
Signed-off-by: Sunita Nadampalli <sunitan@ti.com>
7 years agoOMAPDSS: DSS: Fix for setting up the overlay channel
Sunita Nadampalli [Thu, 9 May 2013 18:57:14 +0000 (13:57 -0500)]
OMAPDSS: DSS: Fix for setting up the overlay channel

Change-Id: If0c0fb65d56c70e0ab2c009a7bb858e7802ca6bd
Signed-off-by: Sunita Nadampalli <sunitan@ti.com>
7 years agoOMAPDSS: DSS: fix for zorder checking logic
Sunita Nadampalli [Thu, 9 May 2013 18:25:56 +0000 (13:25 -0500)]
OMAPDSS: DSS: fix for zorder checking logic

while validating the configuration, check zorder for
only the active/enabled overlays.

Change-Id: I72005b79a37d715bd46eff419afc5db271352f94
Signed-off-by: Sunita Nadampalli <sunitan@ti.com>
7 years agoOMAPDSS: DSS: Fix for DSS num_managers check in callbacks
Sunita Nadampalli [Thu, 9 May 2013 17:26:04 +0000 (12:26 -0500)]
OMAPDSS: DSS: Fix for DSS num_managers check in callbacks

Change-Id: If608ff9b9a8eac971ce25c94afdafa1200d08680
Signed-off-by: Sunita Nadampalli <sunitan@ti.com>