Merge branch 'ion' into p-ti-android-3.8.y-video This contains the ION cleanup series and caching changes * ion: gpu: ion: add support for more cache operations gpu: ion: DRA7: ensure TILER 2d mappings are shared device ARM: dts: DRA7/OMAP5: reserve carveout buffers & fix carveout size gpu: ion: fix omap_ion_share_fd_to_buffers api gpu: ion: omap: add checks for carveout addresses and sizes gpu: ion: omap: Fix TILER secure heap base address gpu: ion: omap: re-populate flags parameters into buffer Signed-off-by: Sundar Raman <a0393242@ti.com>
Merge branch 'p-ti-android-3.8.y-video'
gpu: ion: DRA7: ensure TILER 2d mappings are shared device Write combined mappings are not supported for TILER 2D on DRA7 similar to OMAP5 due to h/w issue. So, shared mappings should be used. Added the check which was missing for DRA7. Change-Id: I8ba9bd676f2942dd6a8bd5737bab8e25c8f1cbd3 Signed-off-by: Sundar Raman <a0393242@ti.com>
ARM: dts: DRA7/OMAP5: reserve carveout buffers & fix carveout size Carveout buffers were initialized but not reserved for DRA7. This patch adds the missing memreserves without which there could be data corruption in highmem region. In addition, the carveout size for TILER secure heap was programmed wrongly to 96MB whereas it should have been 81 MB. This patch fixes this and re-adjusts the carveout base addresses. Change-Id: I151bd37f089aa7fbf590035ea4f612f1da12f53a Signed-off-by: Sundar Raman <a0393242@ti.com>
gpu: ion: fix omap_ion_share_fd_to_buffers api the output value from ion_share_dma_buf is a dma buf fd buffers array was filled mistakenly as the code was ported from k3.4 where the equivalent function ion_share used to return pointer to ion_buffer. updated the code to upref using ion_share_dma_buf() and get the handle to buffer using ion_handle_buffer(). Change-Id: I3bb39f918a9dde8ee78ffa3adcab447589295fdf Signed-off-by: Sundar Raman <a0393242@ti.com>
gpu: ion: omap: add checks for carveout addresses and sizes This patch adds sanity checks on the carveout and size parameters read from the device tree file and returns error. It also checks if the device tree is populated and returns error accordingly. Change-Id: Ic1f4e9d7c5f7e9361d9fe922544f9dbc105d99c3 Signed-off-by: Sundar Raman <a0393242@ti.com>
gpu: ion: omap: Fix TILER secure heap base address Access to ION TILER buffers were resulting in data aborts because of incorrect heap base address initialization. The omap_ion_heap_tiler_base variable was not being initialized. With this patch the ION tests pass. Change-Id: Ic072767a5b70b1eab37caf0a7fadb96f1da97b34 Signed-off-by: Sundar Raman <a0393242@ti.com>
gpu: ion: omap: re-populate flags parameters into buffer Since the flags function param of omap_tiler_heap_allocate is used to pass the omap_tiler_info struct, pass the actual flags param from the client inside omap_tiler_info struct and re-populate it into the buffer struct. Change-Id: I06f3b6125c2760f7b4bcc7f174458139d80ec000 Signed-off-by: Sundar Raman <a0393242@ti.com>
Merge branch 'p-ti-android-3.8.y-video' of git://git.ti.com/android-sdk/kernel-video into p-ti-android-3.8.y * 'p-ti-android-3.8.y-video' of git://git.ti.com/android-sdk/kernel-video: ARM: OMAP5/DRA7: hwmod: add ADDR_TYPE_RT to bb2d address flags gc320: gcx: [WA] Allocate MMU page tables as non cached gc320: Added missing programming of MTLB base second time gc320: Increase VRAM buffers to 4 gc320: adding gcxxx support in Makefiles gc320: Adapt GC320 driver for K3.8 devices: Initialize GC320 as part of devices init platform_data: Added platform data for GC320 gc320: OMAP4: Adding cache-2dmanager Change-Id: I7b240582c78cb9ba0c5d77e56ab0cf06d29a64a4 Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Merge remote-tracking branch 'origin/omaplfb' into p-ti-android-3.8.y-video This contains GC320 series * origin/omaplfb: ARM: OMAP5/DRA7: hwmod: add ADDR_TYPE_RT to bb2d address flags gc320: gcx: [WA] Allocate MMU page tables as non cached gc320: Added missing programming of MTLB base second time gc320: Increase VRAM buffers to 4 gc320: adding gcxxx support in Makefiles gc320: Adapt GC320 driver for K3.8 devices: Initialize GC320 as part of devices init platform_data: Added platform data for GC320 gc320: OMAP4: Adding cache-2dmanager Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
ARM: OMAP5/DRA7: hwmod: add ADDR_TYPE_RT to bb2d address flags This is required so that the omap_hwmod_get_mpu_rt_va() api returns a virtual register base address for the IP. Change-Id: I29aff07f34653c552b3eac3a1ac3f10e36b7efbb Signed-off-by: Sundar Raman <a0393242@ti.com>
Merge branch 'p-ti-android-3.8.y-video'
Merge branch 'p-ti-linux-3.8.y-video'
Merge branch 'omaplfb' into p-ti-android-3.8.y-video Enabled GC320 as of this commit on J6 EVM and validated via HWC Need to cherrypick http://review.omapzoom.org/#/c/33221/7 in addition.
gc320: gcx: [WA] Allocate MMU page tables as non cached In K3.8, the cache flushing APIs for the MMU page tables are not working correctly. Changed the allocations to non cached to workaround the problem until the correct root cause is found. Change-Id: Id87497b86d3d93941926f4fc417a4f8d81a5d570 Signed-off-by: Sundar Raman <a0393242@ti.com>
gc320: Added missing programming of MTLB base second time This patch fixes a crash when running the bvtest test case second time around. The MTLB base address was not programmed second time around leading to a bad MMU state. This patch ensures that the MTLB base is programmed correctly. Change-Id: Iab33425bc61c1e1618c78bdb17f64cbb9d7b4309 Signed-off-by: Alexei Shlychkov <shlychkov@gmail.com> Signed-off-by: Sundar Raman <a0393242@ti.com>
gc320: Increase VRAM buffers to 4 With GC320 driver integrated and LCD/HDMI output using VRAM buffers for SGX composition, it is necessary to increase the number of VRAM buffers to 4 inorder to allow GC320 to use 2 buffers for composition output. Change-Id: I2a481ab9c5c16cd26ac5635b543f41e8c5929fdf Signed-off-by: Sundar Raman <a0393242@ti.com>
gc320: adding gcxxx support in Makefiles Ported from k3.0, commit Id 6c14dfc5c011ce3 [ David Sin <davidsin@ti.com> ] Change-Id: Ie3b211ff273c9257b596560b6260058466152b35 Signed-off-by: Volodymyr Mieshkov <volodymyr.mieshkov@ti.com> Signed-off-by: Sundar Raman <sunds@ti.com>