arch/arm/boot/dts/am437x-sk-evm.dts

   1 /*
   2  * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  */
   8
   9 /* AM437x SK EVM */
  10
  11 /dts-v1/;
  12
  13 #include "am4372.dtsi"
  14 #include <dt-bindings/pinctrl/am43xx.h>
  15 #include <dt-bindings/pwm/pwm.h>
  16 #include <dt-bindings/gpio/gpio.h>
  17 #include <dt-bindings/input/input.h>
  18
  19 / {
  20         model = "TI AM437x SK EVM";
  21         compatible = "ti,am437x-sk-evm","ti,am4372","ti,am43";
  22
  23         aliases {
  24                 display0 = &lcd0;
  25         };
  26
  27         backlight {
  28                 compatible = "pwm-backlight";
  29                 pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
  30                 brightness-levels = <0 51 53 56 62 75 101 152 255>;
  31                 default-brightness-level = <8>;
  32         };
  33
  34         sound {
  35                 compatible = "ti,da830-evm-audio";
  36                 ti,model = "AM437x-SK-EVM";
  37                 ti,audio-codec = <&tlv320aic3106>;
  38                 ti,mcasp-controller = <&mcasp1>;
  39                 ti,codec-clock-rate = <24000000>;
  40                 ti,audio-routing =
  41                         "Headphone Jack",       "HPLOUT",
  42                         "Headphone Jack",       "HPROUT";
  43         };
  44
  45         matrix_keypad: matrix_keypad@0 {
  46                 compatible = "gpio-matrix-keypad";
  47
  48                 pinctrl-names = "default";
  49                 pinctrl-0 = <&matrix_keypad_pins>;
  50
  51                 debounce-delay-ms = <5>;
  52                 col-scan-delay-us = <5>;
  53
  54                 row-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH          /* Bank5, pin5 */
  55                                 &gpio5 6 GPIO_ACTIVE_HIGH>;     /* Bank5, pin6 */
  56
  57                 col-gpios = <&gpio5 13 GPIO_ACTIVE_HIGH         /* Bank5, pin13 */
  58                                 &gpio5 4 GPIO_ACTIVE_HIGH>;     /* Bank5, pin4 */
  59
  60                 linux,keymap = <
  61                                 MATRIX_KEY(0, 0, KEY_DOWN)
  62                                 MATRIX_KEY(0, 1, KEY_RIGHT)
  63                                 MATRIX_KEY(1, 0, KEY_LEFT)
  64                                 MATRIX_KEY(1, 1, KEY_UP)
  65                         >;
  66         };
  67
  68         leds {
  69                 compatible = "gpio-leds";
  70
  71                 pinctrl-names = "default";
  72                 pinctrl-0 = <&leds_pins>;
  73
  74                 led@0 {
  75                         label = "am437x-sk:red:heartbeat";
  76                         gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>;    /* Bank 5, pin 0 */
  77                         linux,default-trigger = "heartbeat";
  78                         default-state = "off";
  79                 };
  80
  81                 led@1 {
  82                         label = "am437x-sk:green:mmc1";
  83                         gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;    /* Bank 5, pin 1 */
  84                         linux,default-trigger = "mmc0";
  85                         default-state = "off";
  86                 };
  87
  88                 led@2 {
  89                         label = "am437x-sk:blue:cpu0";
  90                         gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;    /* Bank 5, pin 2 */
  91                         linux,default-trigger = "cpu0";
  92                         default-state = "off";
  93                 };
  94
  95                 led@3 {
  96                         label = "am437x-sk:blue:usr3";
  97                         gpios = <&gpio5 3 GPIO_ACTIVE_HIGH>;    /* Bank 5, pin 3 */
  98                         default-state = "off";
  99                 };
 100         };
 101
 102         lcd0: display {
 103                 compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi";
 104                 label = "lcd";
 105
 106                 pinctrl-names = "default";
 107                 pinctrl-0 = <&lcd_pins>;
 108
 109                 enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
 110
 111                 panel-timing {
 112                         clock-frequency = <9000000>;
 113                         hactive = <480>;
 114                         vactive = <272>;
 115                         hfront-porch = <2>;
 116                         hback-porch = <2>;
 117                         hsync-len = <41>;
 118                         vfront-porch = <2>;
 119                         vback-porch = <2>;
 120                         vsync-len = <10>;
 121                         hsync-active = <0>;
 122                         vsync-active = <0>;
 123                         de-active = <1>;
 124                         pixelclk-active = <1>;
 125                 };
 126
 127                 port {
 128                         lcd_in: endpoint {
 129                                 remote-endpoint = <&dpi_out>;
 130                         };
 131                 };
 132         };
 133 };
 134
 135 &am43xx_pinmux {
 136         matrix_keypad_pins: matrix_keypad_pins {
 137                 pinctrl-single,pins = <
 138                         0x24c (PIN_OUTPUT | MUX_MODE7)  /* gpio5_13.gpio5_13 */
 139                         0x250 (PIN_OUTPUT | MUX_MODE7)  /* spi4_sclk.gpio5_4 */
 140                         0x254 (PIN_INPUT | MUX_MODE7)   /* spi4_d0.gpio5_5 */
 141                         0x258 (PIN_INPUT | MUX_MODE7)   /* spi4_d1.gpio5_5 */
 142                 >;
 143         };
 144
 145         leds_pins: leds_pins {
 146                 pinctrl-single,pins = <
 147                         0x228 (PIN_OUTPUT | MUX_MODE7)  /* uart3_rxd.gpio5_2 */
 148                         0x22c (PIN_OUTPUT | MUX_MODE7)  /* uart3_txd.gpio5_3 */
 149                         0x230 (PIN_OUTPUT | MUX_MODE7)  /* uart3_ctsn.gpio5_0 */
 150                         0x234 (PIN_OUTPUT | MUX_MODE7)  /* uart3_rtsn.gpio5_1 */
 151                 >;
 152         };
 153
 154         i2c0_pins: i2c0_pins {
 155                 pinctrl-single,pins = <
 156                         0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_sda.i2c0_sda */
 157                         0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)  /* i2c0_scl.i2c0_scl */
 158                 >;
 159         };
 160
 161         i2c1_pins: i2c1_pins {
 162                 pinctrl-single,pins = <
 163                         0x15c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_cs0.i2c1_scl */
 164                         0x158 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2)  /* spi0_d1.i2c1_sda  */
 165                 >;
 166         };
 167
 168         mmc1_pins: pinmux_mmc1_pins {
 169                 pinctrl-single,pins = <
 170                         0x160 (PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
 171                 >;
 172         };
 173
 174         ecap0_pins: backlight_pins {
 175                 pinctrl-single,pins = <
 176                         0x164 (PIN_OUTPUT | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
 177                 >;
 178         };
 179
 180         edt_ft5306_ts_pins: edt_ft5306_ts_pins {
 181                 pinctrl-single,pins = <
 182                         0x74 (PIN_INPUT | MUX_MODE7)    /* gpmc_wpn.gpio0_31 */
 183                         0x78 (PIN_OUTPUT | MUX_MODE7)   /* gpmc_be1n.gpio1_28 */
 184                 >;
 185         };
 186
 187         vpfe0_pins_default: vpfe0_pins_default {
 188                 pinctrl-single,pins = <
 189                         0x1B0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_hd mode 0*/
 190                         0x1B4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_vd mode 0*/
 191                         0x1C0 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_pclk mode 0*/
 192                         0x1C4 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data8 mode 0*/
 193                         0x1C8 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data9 mode 0*/
 194                         0x208 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data0 mode 0*/
 195                         0x20C (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data1 mode 0*/
 196                         0x210 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data2 mode 0*/
 197                         0x214 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data3 mode 0*/
 198                         0x218 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data4 mode 0*/
 199                         0x21C (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data5 mode 0*/
 200                         0x220 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data6 mode 0*/
 201                         0x224 (PIN_INPUT_PULLUP | MUX_MODE0)  /* cam0_data7 mode 0*/
 202                         0x1E8 (PIN_INPUT_PULLUP | MUX_MODE7)  /* cam1_data0 mode 0*/
 203                 >;
 204         };
 205
 206         vpfe0_pins_sleep: vpfe0_pins_sleep {
 207                 pinctrl-single,pins = <
 208                         0x1B0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_hd mode 0*/
 209                         0x1B4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_vd mode 0*/
 210                         0x1C0 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_pclk mode 0*/
 211                         0x1C4 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data8 mode 0*/
 212                         0x1C8 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data9 mode 0*/
 213                         0x208 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data0 mode 0*/
 214                         0x20C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data1 mode 0*/
 215                         0x210 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data2 mode 0*/
 216                         0x214 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data3 mode 0*/
 217                         0x218 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data4 mode 0*/
 218                         0x21C (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data5 mode 0*/
 219                         0x220 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data6 mode 0*/
 220                         0x224 (DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)  /* cam0_data7 mode 0*/
 221                 >;
 222         };
 223
 224         clkout1_pin: pinmux_clkout1_pin {
 225                 pinctrl-single,pins = <
 226                         0x270 (PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* XDMA_EVENT_INTR0/CLKOUT1 */
 227                 >;
 228         };
 229
 230         cpsw_default: cpsw_default {
 231                 pinctrl-single,pins = <
 232                         /* Slave 1 */
 233                         0x12c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txclk.rmii1_tclk */
 234                         0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txen.rgmii1_tctl */
 235                         0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td0 */
 236                         0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td1 */
 237                         0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd0.rgmii1_td2 */
 238                         0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE2) /* mii1_txd1.rgmii1_td3 */
 239                         0x130 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxclk.rmii1_rclk */
 240                         0x118 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxdv.rgmii1_rctl */
 241                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd0 */
 242                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd1 */
 243                         0x138 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd0.rgmii1_rd2 */
 244                         0x134 (PIN_INPUT_PULLDOWN | MUX_MODE2)  /* mii1_rxd1.rgmii1_rd3 */
 245
 246                         /* Slave 2 */
 247                         0x58 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a6.rgmii2_tclk */
 248                         0x40 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a0.rgmii2_tctl */
 249                         0x54 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a5.rgmii2_td0 */
 250                         0x50 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a4.rgmii2_td1 */
 251                         0x4c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a3.rgmii2_td2 */
 252                         0x48 (PIN_OUTPUT_PULLDOWN | MUX_MODE2)  /* gpmc_a2.rgmii2_td3 */
 253                         0x5c (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a7.rgmii2_rclk */
 254                         0x44 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a1.rgmii2_rtcl */
 255                         0x6c (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a11.rgmii2_rd0 */
 256                         0x68 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a10.rgmii2_rd1 */
 257                         0x64 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a9.rgmii2_rd2 */
 258                         0x60 (PIN_INPUT_PULLDOWN | MUX_MODE2)   /* gpmc_a8.rgmii2_rd3 */
 259                 >;
 260         };
 261
 262         cpsw_sleep: cpsw_sleep {
 263                 pinctrl-single,pins = <
 264                         /* Slave 1 reset value */
 265                         0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 266                         0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 267                         0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 268                         0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 269                         0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 270                         0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 271                         0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 272                         0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 273                         0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 274                         0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 275                         0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 276                         0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 277
 278                         /* Slave 2 reset value */
 279                         0x58 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 280                         0x40 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 281                         0x54 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 282                         0x50 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 283                         0x4c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 284                         0x48 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 285                         0x5c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 286                         0x44 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 287                         0x6c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 288                         0x68 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 289                         0x64 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 290                         0x60 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 291                 >;
 292         };
 293
 294         davinci_mdio_default: davinci_mdio_default {
 295                 pinctrl-single,pins = <
 296                         /* MDIO */
 297                         0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0)    /* mdio_data.mdio_data */
 298                         0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0)                   /* mdio_clk.mdio_clk */
 299                 >;
 300         };
 301
 302         davinci_mdio_sleep: davinci_mdio_sleep {
 303                 pinctrl-single,pins = <
 304                         /* MDIO reset value */
 305                         0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
 306                         0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
 307                 >;
 308         };
 309
 310         dss_pins: dss_pins {
 311                 pinctrl-single,pins = <
 312                         0x020 (PIN_OUTPUT_PULLUP | MUX_MODE1)   /* gpmc ad 8 -> DSS DATA 23 */
 313                         0x024 (PIN_OUTPUT_PULLUP | MUX_MODE1)
 314                         0x028 (PIN_OUTPUT_PULLUP | MUX_MODE1)
 315                         0x02c (PIN_OUTPUT_PULLUP | MUX_MODE1)
 316                         0x030 (PIN_OUTPUT_PULLUP | MUX_MODE1)
 317                         0x034 (PIN_OUTPUT_PULLUP | MUX_MODE1)
 318                         0x038 (PIN_OUTPUT_PULLUP | MUX_MODE1)
 319                         0x03c (PIN_OUTPUT_PULLUP | MUX_MODE1)   /* gpmc ad 15 -> DSS DATA 16 */
 320                         0x0a0 (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* DSS DATA 0 */
 321                         0x0a4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 322                         0x0a8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 323                         0x0ac (PIN_OUTPUT_PULLUP | MUX_MODE0)
 324                         0x0b0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 325                         0x0b4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 326                         0x0b8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 327                         0x0bc (PIN_OUTPUT_PULLUP | MUX_MODE0)
 328                         0x0c0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 329                         0x0c4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 330                         0x0c8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 331                         0x0cc (PIN_OUTPUT_PULLUP | MUX_MODE0)
 332                         0x0d0 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 333                         0x0d4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 334                         0x0d8 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 335                         0x0dc (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* DSS DATA 15 */
 336                         0x0e0 (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* DSS VSYNC */
 337                         0x0e4 (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* DSS HSYNC */
 338                         0x0e8 (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* DSS PCLK */
 339                         0x0ec (PIN_OUTPUT_PULLUP | MUX_MODE0)   /* DSS AC BIAS EN */
 340
 341                 >;
 342         };
 343
 344         qspi_pins: qspi_pins {
 345                 pinctrl-single,pins = <
 346                         0x7c (PIN_OUTPUT_PULLUP | MUX_MODE3)    /* gpmc_csn0.qspi_csn */
 347                         0x88 (PIN_OUTPUT | MUX_MODE2)           /* gpmc_csn3.qspi_clk */
 348                         0x90 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_advn_ale.qspi_d0 */
 349                         0x94 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_oen_ren.qspi_d1 */
 350                         0x98 (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_wen.qspi_d2 */
 351                         0x9c (PIN_INPUT_PULLUP | MUX_MODE3)     /* gpmc_be0n_cle.qspi_d3 */
 352                 >;
 353         };
 354
 355         mcasp1_pins: mcasp1_pins {
 356                 pinctrl-single,pins = <
 357                         0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* mii1_crs.mcasp1_aclkx */
 358                         0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* mii1_rxerr.mcasp1_fsx */
 359                         0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
 360                         0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4)  /* rmii1_ref_clk.mcasp1_axr3 */
 361                 >;
 362         };
 363
 364         lcd_pins: lcd_pins {
 365                 pinctrl-single,pins = <
 366                         0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */
 367                 >;
 368         };
 369
 370         usb2_phy1_pins: usb2_phy1_pins {
 371                 pinctrl-single,pins = <
 372                         0x2c0 (PIN_OUTPUT_PULLDOWN | MUX_MODE0)
 373                 >;
 374         };
 375
 376         usb2_phy2_pins: usb2_phy2_pins {
 377                 pinctrl-single,pins = <
 378                         0x2c4 (PIN_OUTPUT_PULLUP | MUX_MODE0)
 379                 >;
 380         };
 381 };
 382
 383 &i2c0 {
 384         status = "okay";
 385         pinctrl-names = "default";
 386         pinctrl-0 = <&i2c0_pins>;
 387         clock-frequency = <100000>;
 388
 389         tps@24 {
 390                 compatible = "ti,tps65218";
 391                 reg = <0x24>;
 392                 interrupt-parent = <&gic>;
 393                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 394                 interrupt-controller;
 395                 #interrupt-cells = <2>;
 396
 397                 dcdc1: regulator-dcdc1 {
 398                         compatible = "ti,tps65218-dcdc1";
 399                         /* VDD_CORE limits min of OPP50 and max of OPP100 */
 400                         regulator-name = "vdd_core";
 401                         regulator-min-microvolt = <912000>;
 402                         regulator-max-microvolt = <1144000>;
 403                         regulator-boot-on;
 404                         regulator-always-on;
 405                 };
 406
 407                 dcdc2: regulator-dcdc2 {
 408                         compatible = "ti,tps65218-dcdc2";
 409                         /* VDD_MPU limits min of OPP50 and max of OPP_NITRO */
 410                         regulator-name = "vdd_mpu";
 411                         regulator-min-microvolt = <912000>;
 412                         regulator-max-microvolt = <1378000>;
 413                         regulator-boot-on;
 414                         regulator-always-on;
 415                 };
 416
 417                 dcdc3: regulator-dcdc3 {
 418                         compatible = "ti,tps65218-dcdc3";
 419                         regulator-name = "vdds_ddr";
 420                         regulator-min-microvolt = <1500000>;
 421                         regulator-max-microvolt = <1500000>;
 422                         regulator-boot-on;
 423                         regulator-always-on;
 424                         regulator-state-mem {
 425                                 regulator-on-in-suspend;
 426                         };
 427                         regulator-state-disk {
 428                                 regulator-off-in-suspend;
 429                         };
 430                 };
 431
 432                 dcdc4: regulator-dcdc4 {
 433                         compatible = "ti,tps65218-dcdc4";
 434                         regulator-name = "v3_3d";
 435                         regulator-min-microvolt = <3300000>;
 436                         regulator-max-microvolt = <3300000>;
 437                         regulator-boot-on;
 438                         regulator-always-on;
 439                 };
 440
 441                 dcdc5: regulator-dcdc5 {
 442                         compatible = "ti,tps65218-dcdc5";
 443                         regulator-name = "v1_0bat";
 444                         regulator-min-microvolt = <1000000>;
 445                         regulator-max-microvolt = <1000000>;
 446                         regulator-boot-on;
 447                         regulator-always-on;
 448                         regulator-state-mem {
 449                                 regulator-on-in-suspend;
 450                         };
 451                 };
 452
 453                 dcdc6: regulator-dcdc6 {
 454                         compatible = "ti,tps65218-dcdc6";
 455                         regulator-name = "v1_8bat";
 456                         regulator-min-microvolt = <1800000>;
 457                         regulator-max-microvolt = <1800000>;
 458                         regulator-boot-on;
 459                         regulator-always-on;
 460                         regulator-state-mem {
 461                                 regulator-on-in-suspend;
 462                         };
 463                 };
 464
 465                 ldo1: regulator-ldo1 {
 466                         compatible = "ti,tps65218-ldo1";
 467                         regulator-name = "v1_8d";
 468                         regulator-min-microvolt = <1800000>;
 469                         regulator-max-microvolt = <1800000>;
 470                         regulator-boot-on;
 471                         regulator-always-on;
 472                 };
 473
 474         };
 475
 476         at24@50 {
 477                 compatible = "at24,24c256";
 478                 pagesize = <64>;
 479                 reg = <0x50>;
 480         };
 481 };
 482
 483 &i2c1 {
 484         status = "okay";
 485         pinctrl-names = "default";
 486         pinctrl-0 = <&i2c1_pins>;
 487         clock-frequency = <400000>;
 488
 489         ov2659@30 {
 490                 compatible = "ti,ov2659";
 491                 reg = <0x30>;
 492                 pinctrl-names = "default";
 493                 pinctrl-0 = <&clkout1_pin>;
 494
 495                 port {
 496                         ov2659_1: endpoint {
 497                                 remote-endpoint = <&vpfe0_ep>;
 498                                 mclk-frequency = <25000000>;
 499                         };
 500                 };
 501         };
 502
 503         edt-ft5306@38 {
 504                 status = "okay";
 505                 compatible = "edt,edt-ft5306", "edt,edt-ft5x06";
 506                 pinctrl-names = "default";
 507                 pinctrl-0 = <&edt_ft5306_ts_pins>;
 508
 509                 reg = <0x38>;
 510                 interrupt-parent = <&gpio0>;
 511                 interrupts = <31 0>;
 512
 513                 reset-gpios = <&gpio1 28 GPIO_ACTIVE_LOW>;
 514
 515                 touchscreen-size-x = <480>;
 516                 touchscreen-size-y = <272>;
 517         };
 518
 519         tlv320aic3106: tlv320aic3106@1b {
 520                 compatible = "ti,tlv320aic3106";
 521                 reg = <0x1b>;
 522                 status = "okay";
 523
 524                 /* Regulators */
 525                 AVDD-supply = <&dcdc4>;
 526                 IOVDD-supply = <&dcdc4>;
 527                 DRVDD-supply = <&dcdc4>;
 528                 DVDD-supply = <&ldo1>;
 529         };
 530
 531         lis331dlh@18 {
 532                 compatible = "st,lis331dlh";
 533                 reg = <0x18>;
 534                 status = "okay";
 535
 536                 Vdd-supply = <&dcdc4>;
 537                 Vdd_IO-supply = <&dcdc4>;
 538                 interrupts-extended = <&gpio1 6 0>, <&gpio2 1 0>;
 539         };
 540 };
 541
 542 &epwmss0 {
 543         status = "okay";
 544 };
 545
 546 &ecap0 {
 547         status = "okay";
 548         pinctrl-names = "default";
 549         pinctrl-0 = <&ecap0_pins>;
 550 };
 551
 552 &gpio0 {
 553         status = "okay";
 554 };
 555
 556 &gpio1 {
 557         status = "okay";
 558 };
 559
 560 &gpio5 {
 561         status = "okay";
 562 };
 563
 564 &mmc1 {
 565         status = "okay";
 566         pinctrl-names = "default";
 567         pinctrl-0 = <&mmc1_pins>;
 568
 569         vmmc-supply = <&dcdc4>;
 570         bus-width = <4>;
 571         cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
 572 };
 573
 574 &usb2_phy1 {
 575         status = "okay";
 576         pinctrl-names = "default";
 577         pinctrl-0 = <&usb2_phy1_pins>;
 578 };
 579
 580 &usb1 {
 581         dr_mode = "otg";
 582         status = "okay";
 583 };
 584
 585 &usb2_phy2 {
 586         status = "okay";
 587         pinctrl-names = "default";
 588         pinctrl-0 = <&usb2_phy2_pins>;
 589 };
 590
 591 &usb2 {
 592         dr_mode = "host";
 593         status = "okay";
 594 };
 595
 596 &qspi {
 597         status = "okay";
 598         pinctrl-names = "default";
 599         pinctrl-0 = <&qspi_pins>;
 600
 601         spi-max-frequency = <48000000>;
 602         m25p80@0 {
 603                 compatible = "mx66l51235l";
 604                 spi-max-frequency = <48000000>;
 605                 reg = <0>;
 606                 spi-cpol;
 607                 spi-cpha;
 608                 spi-tx-bus-width = <1>;
 609                 spi-rx-bus-width = <4>;
 610                 #address-cells = <1>;
 611                 #size-cells = <1>;
 612
 613                 /* MTD partition table.
 614                  * The ROM checks the first 512KiB
 615                  * for a valid file to boot(XIP).
 616                  */
 617                 partition@0 {
 618                         label = "QSPI.U_BOOT";
 619                         reg = <0x00000000 0x000080000>;
 620                 };
 621                 partition@1 {
 622                         label = "QSPI.U_BOOT.backup";
 623                         reg = <0x00080000 0x00080000>;
 624                 };
 625                 partition@2 {
 626                         label = "QSPI.U-BOOT-SPL_OS";
 627                         reg = <0x00100000 0x00010000>;
 628                 };
 629                 partition@3 {
 630                         label = "QSPI.U_BOOT_ENV";
 631                         reg = <0x00110000 0x00010000>;
 632                 };
 633                 partition@4 {
 634                         label = "QSPI.U-BOOT-ENV.backup";
 635                         reg = <0x00120000 0x00010000>;
 636                 };
 637                 partition@5 {
 638                         label = "QSPI.KERNEL";
 639                         reg = <0x00130000 0x0800000>;
 640                 };
 641                 partition@6 {
 642                         label = "QSPI.FILESYSTEM";
 643                         reg = <0x00930000 0x36D0000>;
 644                 };
 645         };
 646 };
 647
 648 &mac {
 649         pinctrl-names = "default", "sleep";
 650         pinctrl-0 = <&cpsw_default>;
 651         pinctrl-1 = <&cpsw_sleep>;
 652         dual_emac = <1>;
 653         status = "okay";
 654 };
 655
 656 &davinci_mdio {
 657         pinctrl-names = "default", "sleep";
 658         pinctrl-0 = <&davinci_mdio_default>;
 659         pinctrl-1 = <&davinci_mdio_sleep>;
 660         status = "okay";
 661 };
 662
 663 &cpsw_emac0 {
 664         phy_id = <&davinci_mdio>, <4>;
 665         phy-mode = "rgmii";
 666         dual_emac_res_vlan = <1>;
 667 };
 668
 669 &cpsw_emac1 {
 670         phy_id = <&davinci_mdio>, <5>;
 671         phy-mode = "rgmii";
 672         dual_emac_res_vlan = <2>;
 673 };
 674
 675 &elm {
 676         status = "okay";
 677 };
 678
 679 &mcasp1 {
 680         pinctrl-names = "default";
 681         pinctrl-0 = <&mcasp1_pins>;
 682
 683         status = "okay";
 684
 685         op-mode = <0>;
 686         tdm-slots = <2>;
 687         serial-dir = <
 688                 0 0 1 2
 689         >;
 690
 691         tx-num-evt = <1>;
 692         rx-num-evt = <1>;
 693 };
 694
 695 &dss {
 696         status = "okay";
 697
 698         pinctrl-names = "default";
 699         pinctrl-0 = <&dss_pins>;
 700
 701         port {
 702                 dpi_out: endpoint@0 {
 703                         remote-endpoint = <&lcd_in>;
 704                         data-lines = <24>;
 705                 };
 706         };
 707 };
 708
 709 &rtc {
 710         status = "okay";
 711 };
 712
 713 &wdt {
 714         status = "okay";
 715 };
 716
 717 &cpu {
 718         cpu0-supply = <&dcdc2>;
 719 };
 720
 721 &vpfe0 {
 722         status = "okay";
 723         pinctrl-names = "default", "sleep";
 724         pinctrl-0 = <&vpfe0_pins_default>;
 725         pinctrl-1 = <&vpfe0_pins_sleep>;
 726
 727         /* Camera port */
 728         port {
 729                 vpfe0_ep: endpoint {
 730                         remote-endpoint = <&ov2659_1>;
 731                         if_type = <2>;
 732                         bus_width = <8>;
 733                         hdpol = <0>;
 734                         vdpol = <0>;
 735                 };
 736         };
 737 };
 738
 739 &wkup_m3 {
 740         ti,scale-data-fw = "am43x-evm-scale-data.bin";
 741 };