1 /*
2 * Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8 /dts-v1/;
10 #include "dra74x.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
14 / {
15 model = "TI AM5728 BeagleBoard-X15";
16 compatible = "ti,am572x-beagle-x15", "ti,am5728", "ti,dra742", "ti,dra74", "ti,dra7";
18 aliases {
19 rtc0 = &mcp_rtc;
20 rtc1 = &rtc;
21 rtc2 = &tps659038_rtc;
22 display0 = &hdmi0;
23 };
25 memory {
26 device_type = "memory";
27 reg = <0x80000000 0x80000000>;
28 };
30 reserved-memory {
31 #address-cells = <1>;
32 #size-cells = <1>;
33 ranges;
35 ipu2_cma_pool: ipu2_cma@95800000 {
36 compatible = "shared-dma-pool";
37 reg = <0x95800000 0x3800000>;
38 reusable;
39 status = "okay";
40 };
42 dsp1_cma_pool: dsp1_cma@99000000 {
43 compatible = "shared-dma-pool";
44 reg = <0x99000000 0x4000000>;
45 reusable;
46 status = "okay";
47 };
49 ipu1_cma_pool: ipu1_cma@9d000000 {
50 compatible = "shared-dma-pool";
51 reg = <0x9d000000 0x2000000>;
52 reusable;
53 status = "okay";
54 };
56 dsp2_cma_pool: dsp2_cma@9f000000 {
57 compatible = "shared-dma-pool";
58 reg = <0x9f000000 0x800000>;
59 reusable;
60 status = "okay";
61 };
62 };
64 vdd_3v3: fixedregulator-vdd_3v3 {
65 compatible = "regulator-fixed";
66 regulator-name = "vdd_3v3";
67 vin-supply = <®en1>;
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 };
72 aic_dvdd: fixedregulator-aic_dvdd {
73 compatible = "regulator-fixed";
74 regulator-name = "aic_dvdd_fixed";
75 vin-supply = <&vdd_3v3>;
76 regulator-min-microvolt = <1800000>;
77 regulator-max-microvolt = <1800000>;
78 };
80 vtt_fixed: fixedregulator-vtt {
81 /* TPS51200 */
82 compatible = "regulator-fixed";
83 regulator-name = "vtt_fixed";
84 vin-supply = <&smps3_reg>;
85 regulator-min-microvolt = <3300000>;
86 regulator-max-microvolt = <3300000>;
87 regulator-always-on;
88 regulator-boot-on;
89 enable-active-high;
90 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
91 };
93 extcon: extcon {
94 compatible = "linux,extcon-gpio";
95 pinctrl-names = "default";
96 pinctrl-0 = <&extcon_pins_default>;
98 gpios = <&gpio7 24 GPIO_ACTIVE_HIGH>;
99 cable-name = "USB-HOST";
100 };
102 hdmi0: connector@1 {
103 compatible = "hdmi-connector";
104 label = "hdmi";
106 type = "a";
108 port {
109 hdmi_connector_in: endpoint {
110 remote-endpoint = <&tpd12s015_out>;
111 };
112 };
113 };
115 tpd12s015: encoder@1 {
116 compatible = "ti,tpd12s015";
118 gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>, /* gpio7_10, CT CP HPD */
119 <&gpio6 28 GPIO_ACTIVE_HIGH>, /* gpio6_28, LS OE */
120 <&gpio7 12 GPIO_ACTIVE_HIGH>; /* gpio7_12/sp1_cs2, HPD */
122 ports {
123 #address-cells = <1>;
124 #size-cells = <0>;
126 port@0 {
127 reg = <0>;
129 tpd12s015_in: endpoint@0 {
130 remote-endpoint = <&hdmi_out>;
131 };
132 };
134 port@1 {
135 reg = <1>;
137 tpd12s015_out: endpoint@0 {
138 remote-endpoint = <&hdmi_connector_in>;
139 };
140 };
141 };
142 };
144 leds {
145 compatible = "gpio-leds";
146 pinctrl-names = "default", "sleep";
147 pinctrl-0 = <&leds_pins_default>;
148 pinctrl-1 = <&leds_pins_sleep>;
150 led@0 {
151 label = "beagle-x15:usr0";
152 gpios = <&gpio7 9 GPIO_ACTIVE_HIGH>;
153 linux,default-trigger = "heartbeat";
154 default-state = "off";
155 };
157 led@1 {
158 label = "beagle-x15:usr1";
159 gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>;
160 linux,default-trigger = "cpu0";
161 default-state = "off";
162 };
164 led@2 {
165 label = "beagle-x15:usr2";
166 gpios = <&gpio7 14 GPIO_ACTIVE_HIGH>;
167 linux,default-trigger = "mmc0";
168 default-state = "off";
169 };
171 led@3 {
172 label = "beagle-x15:usr3";
173 gpios = <&gpio7 15 GPIO_ACTIVE_HIGH>;
174 linux,default-trigger = "ide-disk";
175 default-state = "off";
176 };
177 };
179 sound {
180 compatible = "ti,da830-evm-audio";
181 ti,model = "BeagleBoard-X15";
182 ti,audio-codec = <&tlv320aic3104>;
183 ti,mcasp-controller = <&mcasp3>;
184 clocks = <&clkout2_clk>;
185 clock-names = "mclk";
186 ti,audio-routing =
187 "Line Out", "LLOUT",
188 "Line Out", "RLOUT",
189 "MIC3L", "Line In", /* Mic2L/LINE2L on aic3104 */
190 "MIC3R", "Line In"; /* Mic2R/LINE2R on aic3104 */
191 };
192 };
194 &dra7_pmx_core {
195 leds_pins_default: leds_pins_default {
196 pinctrl-single,pins = <
197 0x3a8 (PIN_OUTPUT | MUX_MODE14) /* spi1_d1.gpio7_8 */
198 0x3ac (PIN_OUTPUT | MUX_MODE14) /* spi1_d0.gpio7_9 */
199 0x3c0 (PIN_OUTPUT | MUX_MODE14) /* spi2_sclk.gpio7_14 */
200 0x3c4 (PIN_OUTPUT | MUX_MODE14) /* spi2_d1.gpio7_15 */
201 >;
202 };
204 leds_pins_sleep: leds_pins_sleep {
205 pinctrl-single,pins = <
206 0x3a8 (PIN_INPUT_PULLDOWN | MUX_MODE15)
207 0x3ac (PIN_INPUT_PULLDOWN | MUX_MODE15)
208 0x3c0 (PIN_INPUT_PULLDOWN | MUX_MODE15)
209 0x3c4 (PIN_INPUT_PULLDOWN | MUX_MODE15)
210 >;
211 };
213 i2c1_pins_default: i2c1_pins_default {
214 pinctrl-single,pins = <
215 0x400 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda.sda */
216 0x404 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl.scl */
217 >;
218 };
220 i2c1_pins_sleep: i2c1_pins_sleep {
221 pinctrl-single,pins = <
222 0x400 (PIN_INPUT | MUX_MODE15)
223 0x404 (PIN_INPUT | MUX_MODE15)
224 >;
225 };
227 i2c2_pins: pinmux_i2c2_pins {
228 pinctrl-single,pins = <
229 0x408 (PIN_INPUT | MUX_MODE1) /* hdmi1_ddc_scl */
230 0x40c (PIN_INPUT | MUX_MODE1) /* hdmi1_ddc_sda */
231 >;
232 };
234 i2c3_pins_default: i2c3_pins_default {
235 pinctrl-single,pins = <
236 0x2a4 (PIN_INPUT| MUX_MODE10) /* mcasp1_aclkx.i2c3_sda */
237 0x2a8 (PIN_INPUT| MUX_MODE10) /* mcasp1_fsx.i2c3_scl */
238 >;
239 };
241 i2c3_pins_sleep: i2c3_pins_sleep {
242 pinctrl-single,pins = <
243 0x2a4 (PIN_INPUT | MUX_MODE15)
244 0x2a8 (PIN_INPUT | MUX_MODE15)
245 >;
246 };
248 uart3_pins_default: uart3_pins_default {
249 pinctrl-single,pins = <
250 0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd.rxd */
251 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd.txd */
252 >;
253 };
255 uart3_pins_sleep: uart3_pins_sleep{
256 pinctrl-single,pins = <
257 0x248 (PIN_INPUT | MUX_MODE15)
258 0x24c (PIN_INPUT | MUX_MODE15)
259 >;
260 };
262 mmc1_pins_default: mmc1_pins_default {
263 pinctrl-single,pins = <
264 0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
265 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
266 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
267 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
268 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
269 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
270 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
271 >;
272 };
274 mmc1_pins_sleep: mmc1_pins_sleep {
275 pinctrl-single,pins = <
276 0x354 (PIN_INPUT | MUX_MODE15)
277 0x358 (PIN_INPUT | MUX_MODE15)
278 0x35c (PIN_INPUT | MUX_MODE15)
279 0x360 (PIN_INPUT | MUX_MODE15)
280 0x364 (PIN_INPUT | MUX_MODE15)
281 0x368 (PIN_INPUT | MUX_MODE15)
282 0x36c (PIN_INPUT | MUX_MODE15)
283 >;
284 };
286 mmc2_pins_default: mmc2_pins_default {
287 pinctrl-single,pins = <
288 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
289 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
290 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
291 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
292 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
293 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
294 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
295 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
296 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
297 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
298 >;
299 };
301 mmc2_pins_sleep: mmc2_pins_sleep {
302 pinctrl-single,pins = <
303 0x9c (PIN_INPUT | MUX_MODE15)
304 0xb0 (PIN_INPUT | MUX_MODE15)
305 0xa0 (PIN_INPUT | MUX_MODE15)
306 0xa4 (PIN_INPUT | MUX_MODE15)
307 0xa8 (PIN_INPUT | MUX_MODE15)
308 0xac (PIN_INPUT | MUX_MODE15)
309 0x8c (PIN_INPUT | MUX_MODE15)
310 0x90 (PIN_INPUT | MUX_MODE15)
311 0x94 (PIN_INPUT | MUX_MODE15)
312 0x98 (PIN_INPUT | MUX_MODE15)
313 >;
314 };
316 cpsw_pins_default: cpsw_pins_default {
317 pinctrl-single,pins = <
318 /* Slave 1 */
319 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tclk */
320 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_tctl */
321 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td3 */
322 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td2 */
323 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td1 */
324 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii1_td0 */
325 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii1_rclk */
326 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii1_rctl */
327 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd3 */
328 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd2 */
329 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii1_rd1 */
330 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii1_rd0 */
332 /* Slave 2 */
333 0x198 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tclk */
334 0x19c (PIN_OUTPUT | MUX_MODE3) /* rgmii2_tctl */
335 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td3 */
336 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td2 */
337 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td1 */
338 0x1ac (PIN_OUTPUT | MUX_MODE3) /* rgmii2_td0 */
339 0x1b0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rclk */
340 0x1b4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rctl */
341 0x1b8 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd3 */
342 0x1bc (PIN_INPUT | MUX_MODE3) /* rgmii2_rd2 */
343 0x1c0 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd1 */
344 0x1c4 (PIN_INPUT | MUX_MODE3) /* rgmii2_rd0 */
345 >;
347 };
349 cpsw_pins_sleep: cpsw_pins_sleep {
350 pinctrl-single,pins = <
351 /* Slave 1 */
352 0x250 (PIN_INPUT | MUX_MODE15)
353 0x254 (PIN_INPUT | MUX_MODE15)
354 0x258 (PIN_INPUT | MUX_MODE15)
355 0x25c (PIN_INPUT | MUX_MODE15)
356 0x260 (PIN_INPUT | MUX_MODE15)
357 0x264 (PIN_INPUT | MUX_MODE15)
358 0x268 (PIN_INPUT | MUX_MODE15)
359 0x26c (PIN_INPUT | MUX_MODE15)
360 0x270 (PIN_INPUT | MUX_MODE15)
361 0x274 (PIN_INPUT | MUX_MODE15)
362 0x278 (PIN_INPUT | MUX_MODE15)
363 0x27c (PIN_INPUT | MUX_MODE15)
365 /* Slave 1 */
366 0x198 (PIN_INPUT | MUX_MODE15)
367 0x19c (PIN_INPUT | MUX_MODE15)
368 0x1a0 (PIN_INPUT | MUX_MODE15)
369 0x1a4 (PIN_INPUT | MUX_MODE15)
370 0x1a8 (PIN_INPUT | MUX_MODE15)
371 0x1ac (PIN_INPUT | MUX_MODE15)
372 0x1b0 (PIN_INPUT | MUX_MODE15)
373 0x1b4 (PIN_INPUT | MUX_MODE15)
374 0x1b8 (PIN_INPUT | MUX_MODE15)
375 0x1bc (PIN_INPUT | MUX_MODE15)
376 0x1c0 (PIN_INPUT | MUX_MODE15)
377 0x1c4 (PIN_INPUT | MUX_MODE15)
378 >;
379 };
381 davinci_mdio_pins_default: davinci_mdio_pins_default {
382 pinctrl-single,pins = <
383 /* MDIO */
384 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_mclk */
385 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_d */
386 >;
387 };
389 davinci_mdio_pins_sleep: davinci_mdio_pins_sleep {
390 pinctrl-single,pins = <
391 0x23c (PIN_INPUT | MUX_MODE15)
392 0x240 (PIN_INPUT | MUX_MODE15)
393 >;
394 };
396 tps659038_pins_default: tps659038_pins_default {
397 pinctrl-single,pins = <
398 0x418 (PIN_INPUT_PULLUP | MUX_MODE14) /* wakeup0.gpio1_0 */
399 >;
400 };
402 tmp102_pins_default: tmp102_pins_default {
403 pinctrl-single,pins = <
404 0x3C8 (PIN_INPUT_PULLUP | MUX_MODE14) /* spi2_d0.gpio7_16 */
405 >;
406 };
408 tmp102_pins_sleep: tmp102_pins_sleep {
409 pinctrl-single,pins = <
410 0x3C8 (PIN_INPUT | MUX_MODE15)
411 >;
412 };
414 mcp79410_pins_default: mcp79410_pins_default {
415 pinctrl-single,pins = <
416 0x424 (PIN_INPUT_PULLUP | MUX_MODE1) /* wakeup3.sys_nirq1 */
417 >;
418 };
420 hdmi_pins: pinmux_hdmi_pins {
421 pinctrl-single,pins = <
422 0x3b0 (PIN_OUTPUT | MUX_MODE14) /* gpio7_10 */
423 0x3b8 (PIN_INPUT | MUX_MODE14) /* gpio7_12 */
424 0x370 (PIN_OUTPUT | MUX_MODE14) /* gpio6_28 */
425 >;
426 };
428 usb1_pins: pinmux_usb1_pins {
429 pinctrl-single,pins = <
430 0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */
431 >;
432 };
434 usb2_pins: pinmux_usb2_pins {
435 pinctrl-single,pins = <
436 0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
437 >;
438 };
440 extcon_pins_default: extcon_pins_default {
441 pinctrl-single,pins = <
442 0x3e8 (PIN_INPUT | MUX_MODE14) /* uart1_ctsn.gpio7_24 */
443 >;
444 };
446 clkout2_pins_default: clkout2_pins_default {
447 pinctrl-single,pins = <
448 0x294 (PIN_OUTPUT_PULLDOWN | MUX_MODE9) /* xref_clk0.clkout2 */
449 >;
450 };
452 clkout2_pins_sleep: clkout2_pins_sleep {
453 pinctrl-single,pins = <
454 0x294 (PIN_INPUT | MUX_MODE15) /* xref_clk0.clkout2 */
455 >;
456 };
458 mcasp3_pins_default: mcasp3_pins_default {
459 pinctrl-single,pins = <
460 0x324 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_aclkx.mcasp3_aclkx */
461 0x328 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_fsx.mcasp3_fsx */
462 0x32c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr0.mcasp3_axr0 */
463 0x330 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* mcasp3_axr1.mcasp3_axr1 */
464 >;
465 };
467 mcasp3_pins_sleep: mcasp3_pins_sleep {
468 pinctrl-single,pins = <
469 0x324 (PIN_INPUT | MUX_MODE15)
470 0x328 (PIN_INPUT | MUX_MODE15)
471 0x32c (PIN_INPUT | MUX_MODE15)
472 0x330 (PIN_INPUT | MUX_MODE15)
473 >;
474 };
475 };
477 &i2c1 {
478 status = "okay";
479 pinctrl-names = "default", "sleep";
480 pinctrl-0 = <&i2c1_pins_default>;
481 pinctrl-1 = <&i2c1_pins_sleep>;
482 clock-frequency = <400000>;
484 tps659038: tps659038@58 {
485 compatible = "ti,tps659038";
486 reg = <0x58>;
487 interrupts-extended = <&gpio1 0 IRQ_TYPE_LEVEL_HIGH
488 &dra7_pmx_core 0x418>;
490 pinctrl-names = "default";
491 pinctrl-0 = <&tps659038_pins_default>;
493 #interrupt-cells = <2>;
494 interrupt-controller;
496 ti,system-power-controller;
498 tps659038_pmic {
499 compatible = "ti,tps659038-pmic";
501 regulators {
502 smps12_reg: smps12 {
503 /* VDD_MPU */
504 regulator-name = "smps12";
505 regulator-min-microvolt = < 850000>;
506 regulator-max-microvolt = <1250000>;
507 regulator-always-on;
508 regulator-boot-on;
509 };
511 smps3_reg: smps3 {
512 /* VDD_DDR */
513 regulator-name = "smps3";
514 regulator-min-microvolt = <1350000>;
515 regulator-max-microvolt = <1350000>;
516 regulator-always-on;
517 regulator-boot-on;
518 };
520 smps45_reg: smps45 {
521 /* VDD_DSPEVE, VDD_IVA, VDD_GPU */
522 regulator-name = "smps45";
523 regulator-min-microvolt = < 850000>;
524 regulator-max-microvolt = <1150000>;
525 regulator-always-on;
526 regulator-boot-on;
527 };
529 smps6_reg: smps6 {
530 /* VDD_CORE */
531 regulator-name = "smps6";
532 regulator-min-microvolt = <850000>;
533 regulator-max-microvolt = <1030000>;
534 regulator-always-on;
535 regulator-boot-on;
536 };
538 /* SMPS7 unused */
540 smps8_reg: smps8 {
541 /* VDD_1V8 */
542 regulator-name = "smps8";
543 regulator-min-microvolt = <1800000>;
544 regulator-max-microvolt = <1800000>;
545 regulator-always-on;
546 regulator-boot-on;
547 };
549 /* SMPS9 unused */
551 ldo1_reg: ldo1 {
552 /* VDD_SD */
553 regulator-name = "ldo1";
554 regulator-min-microvolt = <1800000>;
555 regulator-max-microvolt = <3300000>;
556 regulator-boot-on;
557 };
559 ldo2_reg: ldo2 {
560 /* VDD_SHV5 */
561 regulator-name = "ldo2";
562 regulator-min-microvolt = <3300000>;
563 regulator-max-microvolt = <3300000>;
564 regulator-always-on;
565 regulator-boot-on;
566 };
568 ldo3_reg: ldo3 {
569 /* VDDA_1V8_PHY */
570 regulator-name = "ldo3";
571 regulator-min-microvolt = <1800000>;
572 regulator-max-microvolt = <1800000>;
573 regulator-always-on;
574 regulator-boot-on;
575 };
577 ldo9_reg: ldo9 {
578 /* VDD_RTC */
579 regulator-name = "ldo9";
580 regulator-min-microvolt = <1050000>;
581 regulator-max-microvolt = <1050000>;
582 regulator-always-on;
583 regulator-boot-on;
584 };
586 ldoln_reg: ldoln {
587 /* VDDA_1V8_PLL */
588 regulator-name = "ldoln";
589 regulator-min-microvolt = <1800000>;
590 regulator-max-microvolt = <1800000>;
591 regulator-always-on;
592 regulator-boot-on;
593 };
595 ldousb_reg: ldousb {
596 /* VDDA_3V_USB: VDDA_USBHS33 */
597 regulator-name = "ldousb";
598 regulator-min-microvolt = <3300000>;
599 regulator-max-microvolt = <3300000>;
600 regulator-boot-on;
601 };
603 regen1: regen1 {
604 /* VDD_3V3_ON */
605 regulator-name = "regen1";
606 regulator-boot-on;
607 regulator-always-on;
608 };
609 };
610 };
612 tps659038_rtc: tps659038_rtc {
613 compatible = "ti,palmas-rtc";
614 interrupt-parent = <&tps659038>;
615 interrupts = <8 IRQ_TYPE_NONE>;
616 wakeup-source;
617 };
619 tps659038_pwr_button: tps659038_pwr_button {
620 compatible = "ti,palmas-pwrbutton";
621 interrupt-parent = <&tps659038>;
622 interrupts = <1 IRQ_TYPE_NONE>;
623 wakeup-source;
624 ti,palmas-long-press-seconds = <13>;
625 };
626 };
628 tmp102: tmp102@48 {
629 compatible = "ti,tmp102";
630 reg = <0x48>;
631 pinctrl-names = "default", "sleep";
632 pinctrl-0 = <&tmp102_pins_default>;
633 pinctrl-1 = <&tmp102_pins_sleep>;
634 interrupt-parent = <&gpio7>;
635 interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
636 };
638 tlv320aic3104: tlv320aic3104@18 {
639 compatible = "ti,tlv320aic3106";
640 reg = <0x18>;
641 pinctrl-names = "default", "sleep";
642 pinctrl-0 = <&clkout2_pins_default>;
643 pinctrl-1 = <&clkout2_pins_sleep>;
644 status = "okay";
645 adc-settle-ms = <40>;
647 AVDD-supply = <&vdd_3v3>;
648 IOVDD-supply = <&vdd_3v3>;
649 DRVDD-supply = <&vdd_3v3>;
650 DVDD-supply = <&aic_dvdd>;
651 };
652 };
654 &i2c3 {
655 status = "okay";
656 pinctrl-names = "default", "sleep";
657 pinctrl-0 = <&i2c3_pins_default>;
658 pinctrl-1 = <&i2c3_pins_sleep>;
659 clock-frequency = <400000>;
661 mcp_rtc: rtc@6f {
662 compatible = "microchip,mcp7941x";
663 reg = <0x6f>;
664 vcc-supply = <&vdd_3v3>;
665 pinctrl-names = "default";
666 pinctrl-0 = <&mcp79410_pins_default>;
668 /* Rev A1 */
669 interrupts-extended = <&gic GIC_SPI 2 IRQ_TYPE_LEVEL_LOW
670 &dra7_pmx_core 0x424>;
671 wakeup-source;
672 };
673 };
675 &gpio7 {
676 ti,no-reset-on-init;
677 ti,no-idle-on-init;
678 };
680 &uart3 {
681 status = "okay";
682 pinctrl-names = "default";
683 pinctrl-0 = <&uart3_pins_default>;
685 interrupts-extended = <&gic GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
686 &dra7_pmx_core 0x248>;
687 };
689 &voltdm_mpu {
690 vdd-supply = <&smps12_reg>;
691 };
693 &voltdm_dspeve {
694 vdd-supply = <&smps45_reg>;
695 };
697 &voltdm_gpu {
698 vdd-supply = <&smps45_reg>;
699 };
701 &voltdm_ivahd {
702 vdd-supply = <&smps45_reg>;
703 };
705 &voltdm_core {
706 vdd-supply = <&smps6_reg>;
707 };
709 &cpu0 {
710 cpu0-voltdm = <&voltdm_mpu>;
711 voltage-tolerance = <1>;
712 };
714 &gpu {
715 gpu0-voltdm = <&voltdm_gpu>;
716 voltage-tolerance = <1>;
717 };
719 &mac {
720 status = "okay";
721 pinctrl-names = "default", "sleep";
722 pinctrl-0 = <&cpsw_pins_default>;
723 pinctrl-1 = <&cpsw_pins_sleep>;
724 dual_emac;
725 };
727 &cpsw_emac0 {
728 phy_id = <&davinci_mdio>, <1>;
729 phy-mode = "rgmii";
730 dual_emac_res_vlan = <1>;
731 };
733 &cpsw_emac1 {
734 phy_id = <&davinci_mdio>, <2>;
735 phy-mode = "rgmii";
736 dual_emac_res_vlan = <2>;
737 };
739 &davinci_mdio {
740 pinctrl-names = "default", "sleep";
741 pinctrl-0 = <&davinci_mdio_pins_default>;
742 pinctrl-1 = <&davinci_mdio_pins_sleep>;
743 };
745 &mmc1 {
746 status = "okay";
747 pinctrl-names = "default", "sleep";
748 pinctrl-0 = <&mmc1_pins_default>;
749 pinctrl-1 = <&mmc1_pins_sleep>;
750 vmmc-supply = <&ldo1_reg>;
751 vmmc_aux-supply = <&vdd_3v3>;
752 pbias-supply = <&pbias_regulator>;
753 bus-width = <4>;
754 cd-gpios = <&gpio6 27 0>; /* gpio 219 */
755 };
757 &mmc2 {
758 status = "okay";
759 pinctrl-names = "default", "sleep";
760 pinctrl-0 = <&mmc2_pins_default>;
761 pinctrl-1 = <&mmc2_pins_sleep>;
762 vmmc-supply = <&vdd_3v3>;
763 bus-width = <8>;
764 ti,non-removable;
765 cap-mmc-dual-data-rate;
766 };
768 &dss {
769 status = "ok";
771 vdda_video-supply = <&ldoln_reg>;
772 };
774 &hdmi {
775 status = "ok";
776 vdda-supply = <&ldo3_reg>;
777 pinctrl-names = "default";
778 pinctrl-0 = <&hdmi_pins &i2c2_pins>;
780 port {
781 hdmi_out: endpoint {
782 remote-endpoint = <&tpd12s015_in>;
783 };
784 };
785 };
787 &mailbox3 {
788 status = "okay";
789 mbox_pru1_0: mbox_pru1_0 {
790 status = "okay";
791 };
792 mbox_pru1_1: mbox_pru1_1 {
793 status = "okay";
794 };
795 };
797 &mailbox4 {
798 status = "okay";
799 mbox_pru2_0: mbox_pru2_0 {
800 status = "okay";
801 };
802 mbox_pru2_1: mbox_pru2_1 {
803 status = "okay";
804 };
805 };
807 &mailbox5 {
808 status = "okay";
809 mbox_ipu1_legacy: mbox_ipu1_legacy {
810 status = "okay";
811 };
812 mbox_dsp1_legacy: mbox_dsp1_legacy {
813 status = "okay";
814 };
815 };
817 &mailbox6 {
818 status = "okay";
819 mbox_ipu2_legacy: mbox_ipu2_legacy {
820 status = "okay";
821 };
822 mbox_dsp2_legacy: mbox_dsp2_legacy {
823 status = "okay";
824 };
825 };
827 &mmu0_dsp1 {
828 status = "okay";
829 };
831 &mmu1_dsp1 {
832 status = "okay";
833 };
835 &mmu0_dsp2 {
836 status = "okay";
837 };
839 &mmu1_dsp2 {
840 status = "okay";
841 };
843 &mmu_ipu1 {
844 status = "okay";
845 };
847 &mmu_ipu2 {
848 status = "okay";
849 };
851 &ipu2 {
852 status = "okay";
853 memory-region = <&ipu2_cma_pool>;
854 mboxes = <&mailbox6 &mbox_ipu2_legacy>;
855 timers = <&timer3>;
856 watchdog-timers = <&timer4>, <&timer9>;
857 };
859 &ipu1 {
860 status = "okay";
861 memory-region = <&ipu1_cma_pool>;
862 mboxes = <&mailbox5 &mbox_ipu1_legacy>;
863 timers = <&timer11>;
864 };
866 &dsp1 {
867 status = "okay";
868 memory-region = <&dsp1_cma_pool>;
869 mboxes = <&mailbox5 &mbox_dsp1_legacy>;
870 timers = <&timer5>;
871 };
873 &dsp2 {
874 status = "okay";
875 memory-region = <&dsp2_cma_pool>;
876 mboxes = <&mailbox6 &mbox_dsp2_legacy>;
877 timers = <&timer6>;
878 };
880 &usb1 {
881 dr_mode = "host";
882 pinctrl-names = "default";
883 pinctrl-0 = <&usb1_pins>;
884 };
886 &omap_dwc3_2 {
887 extcon = <&extcon>;
888 };
890 &usb2 {
891 /*
892 * NOTE(rev A1+): Assumes R321 is populated(default).
893 * If R321 is DNI and R320 is populated, this should be "host"
894 */
895 dr_mode = "peripheral";
896 pinctrl-names = "default";
897 pinctrl-0 = <&usb2_pins>;
898 };
900 &mcasp3 {
901 pinctrl-names = "default", "sleep";
902 pinctrl-0 = <&mcasp3_pins_default>;
903 pinctrl-1 = <&mcasp3_pins_sleep>;
904 status = "okay";
906 op-mode = <0>; /* MCASP_IIS_MODE */
907 tdm-slots = <2>;
908 /* 4 serializers */
909 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
910 1 2 0 0
911 >;
912 };
914 &pruss1 {
915 status = "okay";
916 pru1_0: pru@4b234000 {
917 mboxes = <&mailbox3 &mbox_pru1_0>;
918 status = "okay";
919 };
921 pru1_1: pru@4b238000 {
922 mboxes = <&mailbox3 &mbox_pru1_1>;
923 status = "okay";
924 };
925 };
927 &pruss2 {
928 status = "okay";
929 pru2_0: pru@4b2b4000 {
930 mboxes = <&mailbox4 &mbox_pru2_0>;
931 status = "okay";
932 };
934 pru2_1: pru@4b2b8000 {
935 mboxes = <&mailbox4 &mbox_pru2_1>;
936 status = "okay";
937 };
938 };